diff --git a/compiler/res/prog8lib/virtual/syslib.p8 b/compiler/res/prog8lib/virtual/syslib.p8
index 5a4bbd3eb..84ae37f19 100644
--- a/compiler/res/prog8lib/virtual/syslib.p8
+++ b/compiler/res/prog8lib/virtual/syslib.p8
@@ -233,8 +233,8 @@ sys {
 
 cx16 {
 
-    ; the sixteen virtual 16-bit registers that the CX16 has defined in the zeropage
-    ; they are simulated on the VirtualMachine as well but their location in memory is different
+    ; the sixteen virtual 16-bit registers that the Commander X16 has defined in the zeropage
+    ; they are on the VirtualMachine as well, but their location in memory is different
     &uword r0  = $ff02
     &uword r1  = $ff04
     &uword r2  = $ff06
diff --git a/docs/source/todo.rst b/docs/source/todo.rst
index f2b294ffc..e29f7dd2e 100644
--- a/docs/source/todo.rst
+++ b/docs/source/todo.rst
@@ -46,9 +46,6 @@ Future Things and Ideas
 
 IR/VM
 -----
-- cx16.r0-r15 should not be translated to their (fake) addresses but remain symbolical, so they can be translated to what the actual target system specifies for them.
-- prefix immediate values with '#' for readability reasons (no technical reason)
-- ExpressionCodeResult:  get rid of the separation between single result register and multiple result registers?
 - implement missing operators in AssignmentGen  (array shifts etc)
 - support %align on code chunks
 - fix call() return value handling
@@ -65,6 +62,7 @@ IR/VM
 - getting it in shape for code generation...
 - make optimizeBitTest work for IR too to use the BIT instruction?
 - make sure that a 6502 codegen based off the IR, still generates BIT instructions when testing bit 7 or 6 of a byte var.
+- ExpressionCodeResult:  get rid of the separation between single result register and multiple result registers? maybe not, this requires hundreds of lines to change
 
 
 Libraries
diff --git a/examples/test.p8 b/examples/test.p8
index b914de90c..512efea47 100644
--- a/examples/test.p8
+++ b/examples/test.p8
@@ -1,14 +1,22 @@
+%import textio
 %zeropage basicsafe
 %option no_sysinit
 
 
 main {
     sub start() {
-        const ubyte CVALUE = 123
-        const long CLONG = 555555
-        ubyte @shared vvalue = 99
+        &ubyte mmvar = $2000
 
-        cx16.r0L = CVALUE + 100
-        cx16.r1L = vvalue + 100
+        txt.print_ub(@($2000))
+        txt.nl()
+        @($2000) = 123
+        txt.print_ub(@($2000))
+        txt.nl()
+
+        mmvar = 42
+        txt.print_ub(@($2000))
+        txt.nl()
+
+        cx16.r0 = 123
     }
 }
diff --git a/intermediate/src/prog8/intermediate/IRInstructions.kt b/intermediate/src/prog8/intermediate/IRInstructions.kt
index d6245347c..75a99d6a5 100644
--- a/intermediate/src/prog8/intermediate/IRInstructions.kt
+++ b/intermediate/src/prog8/intermediate/IRInstructions.kt
@@ -1106,11 +1106,11 @@ data class IRInstruction(
                 result.add(",")
             }
             immediate?.let {
-                result.add(it.toHex())
+                result.add("#${it.toHex()}")
                 result.add(",")
             }
             immediateFp?.let {
-                result.add(it.toString())
+                result.add("#${it}")
                 result.add(",")
             }
             address?.let {
diff --git a/intermediate/src/prog8/intermediate/Utils.kt b/intermediate/src/prog8/intermediate/Utils.kt
index 6dcedea69..1212e4304 100644
--- a/intermediate/src/prog8/intermediate/Utils.kt
+++ b/intermediate/src/prog8/intermediate/Utils.kt
@@ -137,8 +137,8 @@ fun parseIRCodeLine(line: String): Either<IRInstruction, String> {
                 if (fpReg1 == null) fpReg1 = oper.substring(2).toInt()
                 else if (fpReg2 == null) fpReg2 = oper.substring(2).toInt()
                 else throw IRParseException("too many fp register operands")
-            } else if (oper[0].isDigit() || oper[0] == '$' || oper[0] == '%' || oper[0] == '-' || oper.startsWith("0x")) {
-                val value = parseIRValue(oper)
+            } else if (oper[0] in "0123456789$%-#" || oper.startsWith("0x")) {
+                val value = if(oper[0]=='#') parseIRValue(oper.drop(1)) else parseIRValue(oper)
                 if (format.immediate) {
                     if (immediateInt == null && immediateFp == null) {
                         if (type == IRDataType.FLOAT)
diff --git a/intermediate/test/TestInstructions.kt b/intermediate/test/TestInstructions.kt
index 2bdc0f897..a9c24c1c0 100644
--- a/intermediate/test/TestInstructions.kt
+++ b/intermediate/test/TestInstructions.kt
@@ -34,7 +34,7 @@ class TestInstructions: FunSpec({
         ins.immediate shouldBe 0
         ins.immediateFp shouldBe null
         ins.labelSymbol shouldBe null
-        ins.toString() shouldBe "add.b r42,0,$63"
+        ins.toString() shouldBe "add.b r42,#0,$63"
     }
 
     test("with label") {
@@ -49,7 +49,7 @@ class TestInstructions: FunSpec({
         ins.immediate shouldBe 0
         ins.immediateFp shouldBe null
         ins.labelSymbol shouldBe "a.b.c"
-        ins.toString() shouldBe "add.w r11,0,a.b.c"
+        ins.toString() shouldBe "add.w r11,#0,a.b.c"
     }
 
     test("with output registers") {