fixed module parent linking mistakes in unit tests: module's parent should always be the GlobalNamespace

This commit is contained in:
Irmen de Jong 2021-10-11 01:34:55 +02:00
parent f38fe092ee
commit 2d26b9c994
6 changed files with 19 additions and 21 deletions

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@ -1309,7 +1309,7 @@ $repeatLabel lda $counterVar
}
/**
* TODO: %asminclude and %asmbinary should be done earlier than code gen (-> put content into AST)
* TODO: %asminclude and %asmbinary should be done earlier than code gen (-> put content into AST) ... (describe why?)
*/
private fun translate(stmt: Directive) {
when(stmt.directive) {

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@ -70,7 +70,7 @@ locallabel:
val module = Module("test", mutableListOf(block), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program.namespace)?!
module.linkParents(program.namespace)
return program
}

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@ -222,7 +222,7 @@ class TestModuleImporter {
assertThat("startCol; should be 0-based", it.position.startCol, equalTo(6))
assertThat("endCol; should be 0-based", it.position.endCol, equalTo(6))
}
// TODO("assertThat(program.modules.size, equalTo(2))")
assertThat(program.modules.size, equalTo(2))
}
}
}
@ -295,7 +295,7 @@ class TestModuleImporter {
assertThat("startCol; should be 0-based", it.position.startCol, equalTo(6))
assertThat("endCol; should be 0-based", it.position.endCol, equalTo(6))
}
// TODO("assertThat(program.modules.size, equalTo(1))")
assertThat(program.modules.size, equalTo(2))
}
}

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@ -23,8 +23,6 @@ import kotlin.io.path.exists
class TestCompilerOnExamples {
private val examplesDir = assumeDirectory(workingDir, "../examples")
// TODO: make assembly stage testable - in case of failure (eg of 64tass) it Process.exit s
private fun makeDynamicCompilerTest(name: String, platform: ICompilationTarget, optimize: Boolean) : DynamicTest {
val searchIn = mutableListOf(examplesDir)
if (platform == Cx16Target) {

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@ -71,29 +71,28 @@ class TestMemory {
@Test
fun testInValidRamC64_memory_identifiers() {
var target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.VAR)
val program = Program("test", DummyFunctions, DummyMemsizer)
var target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.VAR)
assertTrue(C64Target.isInRegularRAM(target, program))
target = createTestProgramForMemoryRefViaVar(0xd020, VarDeclType.VAR)
target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.VAR)
assertFalse(C64Target.isInRegularRAM(target, program))
target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.CONST)
target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.CONST)
assertTrue(C64Target.isInRegularRAM(target, program))
target = createTestProgramForMemoryRefViaVar(0xd020, VarDeclType.CONST)
target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.CONST)
assertFalse(C64Target.isInRegularRAM(target, program))
target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.MEMORY)
target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.MEMORY)
assertFalse(C64Target.isInRegularRAM(target, program))
}
@Test
private fun createTestProgramForMemoryRefViaVar(address: Int, vartype: VarDeclType): AssignTarget {
private fun createTestProgramForMemoryRefViaVar(program: Program, address: Int, vartype: VarDeclType): AssignTarget {
val decl = VarDecl(vartype, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, Position.DUMMY)
val memexpr = IdentifierReference(listOf("address"), Position.DUMMY)
val target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY)
val subroutine = Subroutine("test", emptyList(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, mutableListOf(decl, assignment), Position.DUMMY)
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
module.linkParents(ParentSentinel)
module.linkParents(program.namespace)
return target
}
@ -114,7 +113,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertTrue(C64Target.isInRegularRAM(target, program))
}
@ -128,7 +127,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertTrue(C64Target.isInRegularRAM(target, program))
}
@ -142,7 +141,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertFalse(C64Target.isInRegularRAM(target, program))
}
@ -156,7 +155,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertTrue(C64Target.isInRegularRAM(target, program))
}
@ -171,7 +170,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertTrue(C64Target.isInRegularRAM(target, program))
}
@ -186,7 +185,7 @@ class TestMemory {
val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
val program = Program("test", DummyFunctions, DummyMemsizer)
.addModule(module)
module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
module.linkParents(program.namespace)
assertFalse(C64Target.isInRegularRAM(target, program))
}
}

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@ -251,7 +251,7 @@ class Program(val name: String,
internedStringsModule.statements.add(block)
_modules.add(0, internedStringsModule)
internedStringsModule.linkParents(namespace) // TODO: was .linkParents(this) - probably wrong?!
internedStringsModule.linkParents(namespace)
internedStringsModule.program = this
}
@ -361,6 +361,7 @@ open class Module(override val name: String,
}
override fun linkParents(parent: Node) {
require(parent is GlobalNamespace)
this.parent = parent
statements.forEach {it.linkParents(this)}
}