diff --git a/compiler/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt b/compiler/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt
index 3407bd0d4..1f32fd104 100644
--- a/compiler/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt
+++ b/compiler/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt
@@ -1309,7 +1309,7 @@ $repeatLabel    lda  $counterVar
     }
 
     /**
-     * TODO: %asminclude and %asmbinary should be done earlier than code gen (-> put content into AST)
+     * TODO: %asminclude and %asmbinary should be done earlier than code gen (-> put content into AST) ... (describe why?)
      */
     private fun translate(stmt: Directive) {
         when(stmt.directive) {
diff --git a/compiler/test/AsmgenTests.kt b/compiler/test/AsmgenTests.kt
index b4ee7e05e..f1f385f37 100644
--- a/compiler/test/AsmgenTests.kt
+++ b/compiler/test/AsmgenTests.kt
@@ -70,7 +70,7 @@ locallabel:
         val module = Module("test", mutableListOf(block), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program.namespace)?!
+        module.linkParents(program.namespace)
         return program
     }
 
diff --git a/compiler/test/ModuleImporterTests.kt b/compiler/test/ModuleImporterTests.kt
index 40f9fc16a..d85652761 100644
--- a/compiler/test/ModuleImporterTests.kt
+++ b/compiler/test/ModuleImporterTests.kt
@@ -222,7 +222,7 @@ class TestModuleImporter {
                             assertThat("startCol; should be 0-based", it.position.startCol, equalTo(6))
                             assertThat("endCol; should be 0-based", it.position.endCol, equalTo(6))
                         }
-//                        TODO("assertThat(program.modules.size, equalTo(2))")
+                        assertThat(program.modules.size, equalTo(2))
                     }
                 }
             }
@@ -295,7 +295,7 @@ class TestModuleImporter {
                             assertThat("startCol; should be 0-based", it.position.startCol, equalTo(6))
                             assertThat("endCol; should be 0-based", it.position.endCol, equalTo(6))
                         }
-//                        TODO("assertThat(program.modules.size, equalTo(1))")
+                        assertThat(program.modules.size, equalTo(2))
                     }
                 }
 
diff --git a/compiler/test/TestCompilerOnExamples.kt b/compiler/test/TestCompilerOnExamples.kt
index 1a98cfdf9..a5fa1854c 100644
--- a/compiler/test/TestCompilerOnExamples.kt
+++ b/compiler/test/TestCompilerOnExamples.kt
@@ -23,8 +23,6 @@ import kotlin.io.path.exists
 class TestCompilerOnExamples {
     private val examplesDir = assumeDirectory(workingDir, "../examples")
 
-    // TODO: make assembly stage testable - in case of failure (eg of 64tass) it Process.exit s
-
     private fun makeDynamicCompilerTest(name: String, platform: ICompilationTarget, optimize: Boolean) : DynamicTest {
         val searchIn = mutableListOf(examplesDir)
         if (platform == Cx16Target) {
diff --git a/compiler/test/TestMemory.kt b/compiler/test/TestMemory.kt
index 83c4b7f0c..6f6fef236 100644
--- a/compiler/test/TestMemory.kt
+++ b/compiler/test/TestMemory.kt
@@ -71,29 +71,28 @@ class TestMemory {
 
     @Test
     fun testInValidRamC64_memory_identifiers() {
-        var target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.VAR)
         val program = Program("test", DummyFunctions, DummyMemsizer)
+        var target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.VAR)
 
         assertTrue(C64Target.isInRegularRAM(target, program))
-        target = createTestProgramForMemoryRefViaVar(0xd020, VarDeclType.VAR)
+        target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.VAR)
         assertFalse(C64Target.isInRegularRAM(target, program))
-        target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.CONST)
+        target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.CONST)
         assertTrue(C64Target.isInRegularRAM(target, program))
-        target = createTestProgramForMemoryRefViaVar(0xd020, VarDeclType.CONST)
+        target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.CONST)
         assertFalse(C64Target.isInRegularRAM(target, program))
-        target = createTestProgramForMemoryRefViaVar(0x1000, VarDeclType.MEMORY)
+        target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.MEMORY)
         assertFalse(C64Target.isInRegularRAM(target, program))
     }
 
-    @Test
-    private fun createTestProgramForMemoryRefViaVar(address: Int, vartype: VarDeclType): AssignTarget {
+    private fun createTestProgramForMemoryRefViaVar(program: Program, address: Int, vartype: VarDeclType): AssignTarget {
         val decl = VarDecl(vartype, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, Position.DUMMY)
         val memexpr = IdentifierReference(listOf("address"), Position.DUMMY)
         val target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
         val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY)
         val subroutine = Subroutine("test", emptyList(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, mutableListOf(decl, assignment), Position.DUMMY)
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
-        module.linkParents(ParentSentinel)
+        module.linkParents(program.namespace)
         return target
     }
 
@@ -114,7 +113,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertTrue(C64Target.isInRegularRAM(target, program))
     }
 
@@ -128,7 +127,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertTrue(C64Target.isInRegularRAM(target, program))
     }
 
@@ -142,7 +141,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertFalse(C64Target.isInRegularRAM(target, program))
     }
 
@@ -156,7 +155,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertTrue(C64Target.isInRegularRAM(target, program))
     }
 
@@ -171,7 +170,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertTrue(C64Target.isInRegularRAM(target, program))
     }
 
@@ -186,7 +185,7 @@ class TestMemory {
         val module = Module("test", mutableListOf(subroutine), Position.DUMMY, null)
         val program = Program("test", DummyFunctions, DummyMemsizer)
             .addModule(module)
-        module.linkParents(ParentSentinel) // TODO: why not module.linkParents(program) or .linkParents(program.namespace)?
+        module.linkParents(program.namespace)
         assertFalse(C64Target.isInRegularRAM(target, program))
     }
 }
diff --git a/compilerAst/src/prog8/ast/AstToplevel.kt b/compilerAst/src/prog8/ast/AstToplevel.kt
index 36409ae40..dd8dd937f 100644
--- a/compilerAst/src/prog8/ast/AstToplevel.kt
+++ b/compilerAst/src/prog8/ast/AstToplevel.kt
@@ -251,7 +251,7 @@ class Program(val name: String,
         internedStringsModule.statements.add(block)
 
         _modules.add(0, internedStringsModule)
-        internedStringsModule.linkParents(namespace) // TODO: was .linkParents(this) - probably wrong?!
+        internedStringsModule.linkParents(namespace)
         internedStringsModule.program = this
     }
 
@@ -361,6 +361,7 @@ open class Module(override val name: String,
     }
 
     override fun linkParents(parent: Node) {
+        require(parent is GlobalNamespace)
         this.parent = parent
         statements.forEach {it.linkParents(this)}
     }