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fix and optimize inplace invert and negate

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Irmen de Jong 2023-07-24 23:28:32 +02:00
parent 78e84182f0
commit 2f756f1e3a
1 changed files with 67 additions and 20 deletions
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87
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
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@ -289,20 +289,61 @@ internal class AssignmentAsmGen(private val program: PtProgram,
is PtPrefix -> { is PtPrefix -> {
if(assign.target.array==null) { if(assign.target.array==null) {
if(assign.source.datatype==assign.target.datatype) { if(assign.source.datatype==assign.target.datatype) {
// First assign the value to the target then apply the operator in place on the target. if(assign.source.datatype in IntegerDatatypes) {
// This saves a temporary variable val signed = assign.source.datatype in SignedDatatypes
translateNormalAssignment( if(assign.source.datatype in ByteDatatypes) {
AsmAssignment( assignExpressionToRegister(value.value, RegisterOrPair.A, signed)
AsmAssignSource.fromAstSource(value.value, program, asmgen), when(value.operator) {
assign.target, program.memsizer, assign.position "+" -> {}
), scope "-" -> {
) if(asmgen.isTargetCpu(CpuType.CPU65c02))
when (value.operator) { asmgen.out(" eor #255 | ina")
"+" -> {} else
"-" -> inplaceNegate(assign, true, scope) asmgen.out(" eor #255 | clc | adc #1")
"~" -> inplaceInvert(assign, scope) }
"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0") "~" -> asmgen.out(" eor #255")
else -> throw AssemblyError("invalid prefix operator") "not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
else -> throw AssemblyError("invalid prefix operator")
}
assignRegisterByte(assign.target, CpuRegister.A, signed)
} else {
assignExpressionToRegister(value.value, RegisterOrPair.AY, signed)
when(value.operator) {
"+" -> {}
"-" -> {
asmgen.out("""
sec
eor #255
adc #0
pha
tya
eor #255
adc #0
tay
pla""")
}
"~" -> asmgen.out(" pha | tya | eor #255 | tay | pla | eor #255")
"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
else -> throw AssemblyError("invalid prefix operator")
}
assignRegisterpairWord(assign.target, RegisterOrPair.AY)
}
} else {
// First assign the value to the target then apply the operator in place on the target.
// This saves a temporary variable
translateNormalAssignment(
AsmAssignment(
AsmAssignSource.fromAstSource(value.value, program, asmgen),
assign.target, program.memsizer, assign.position
), scope
)
when (value.operator) {
"+" -> {}
"-" -> inplaceNegate(assign, true, scope)
"~" -> inplaceInvert(assign, scope)
"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
else -> throw AssemblyError("invalid prefix operator")
}
} }
} else { } else {
// use a temporary variable // use a temporary variable
@ -3657,11 +3698,18 @@ internal class AssignmentAsmGen(private val program: PtProgram,
DataType.BYTE -> { DataType.BYTE -> {
when (target.kind) { when (target.kind) {
TargetStorageKind.VARIABLE -> { TargetStorageKind.VARIABLE -> {
asmgen.out(""" if(asmgen.isTargetCpu(CpuType.CPU65c02))
lda #0 asmgen.out("""
sec lda ${target.asmVarname}
sbc ${target.asmVarname} eor #255
sta ${target.asmVarname}""") ina
sta ${target.asmVarname}""")
else
asmgen.out("""
lda #0
sec
sbc ${target.asmVarname}
sta ${target.asmVarname}""")
} }
TargetStorageKind.REGISTER -> { TargetStorageKind.REGISTER -> {
when(target.register!!) { when(target.register!!) {
@ -3670,7 +3718,6 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" eor #255 | ina") asmgen.out(" eor #255 | ina")
else else
asmgen.out(" eor #255 | clc | adc #1") asmgen.out(" eor #255 | clc | adc #1")
} }
RegisterOrPair.X -> asmgen.out(" txa | eor #255 | tax | inx") RegisterOrPair.X -> asmgen.out(" txa | eor #255 | tax | inx")
RegisterOrPair.Y -> asmgen.out(" tya | eor #255 | tay | iny") RegisterOrPair.Y -> asmgen.out(" tya | eor #255 | tay | iny")