mirror of
https://github.com/irmen/prog8.git
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c64 irq handling routines
This commit is contained in:
Irmen de Jong
parent
aea1292f92
commit
2f9eabeac7
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@ -6,6 +6,7 @@
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ubyte time_changed
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sub irq() {
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; activated automatically if run in StackVm
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global_time++
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time_changed = 1
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}
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@ -31,7 +32,6 @@
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float[len(zcoor)] rotatedz
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sub start() {
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set_irqvec()
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while true {
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if irq.time_changed {
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irq.time_changed = 0
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@ -53,24 +53,28 @@
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@(SP0Y+i*2) = rnd()
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}
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c64.SPENA = 255 ; enable all sprites
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set_irqvec() ; enable animation
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c64.SPENA = 255 ; enable all sprites
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c64utils.set_rasterirq(51) ; enable animation
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}
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}
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~ irq {
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sub irq() {
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c64.EXTCOL--
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; float up & wobble horizontally
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; @todo for loop with step 2 doesn't work
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for ubyte i in 0 to 7 {
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@(main.SP0Y+i*2)--
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@(main.SP0Y+i+i)--
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ubyte r = rnd()
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if r>208
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@(main.SP0X+i*2)++
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@(main.SP0X+i+i)++
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else if r<48
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@(main.SP0X+i*2)--
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@(main.SP0X+i+i)--
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}
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c64.EXTCOL++
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}
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}
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@ -1658,6 +1658,12 @@ class Subroutine(override val name: String,
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override fun toString(): String {
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return "Subroutine(name=$name, parameters=$parameters, returntypes=$returntypes, ${statements.size} statements, address=$asmAddress)"
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}
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fun amountOfRtsInAsm(): Int = statements
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.asSequence()
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.filter { it is InlineAssembly }
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.map { (it as InlineAssembly).assembly }
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.count { " rti" in it || "\trti" in it || " rts" in it || "\trts" in it || " jmp" in it || "\tjmp" in it }
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}
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@ -100,12 +100,21 @@ class AstChecker(private val namespace: INameScope,
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}
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// there can be an optional 'irq' block with a 'irq' subroutine in it,
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// which will be used as the 60hz irq routine in the vm if it's present (and enabled via set_irqvec()/set_irqvec_excl())
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// which will be used as the 60hz irq routine in the vm if it's present
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val irqBlock = module.statements.singleOrNull { it is Block && it.name=="irq" } as? Block?
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val irqSub = irqBlock?.subScopes()?.get("irq") as? Subroutine
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if(irqSub!=null) {
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if(irqSub.parameters.isNotEmpty() || irqSub.returntypes.isNotEmpty())
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checkResult.add(SyntaxError("irq entrypoint subroutine can't have parameters and/or return values", irqSub.position))
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} else {
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// @todo this is a little hack to make the assembler happy;
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// certain assembler routines are -for now- always included and *require* an irq.irq routine to be present
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val pos = module.statements.last().position
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val dummyIrqBlock = Block("irq", address = null, statements = mutableListOf(
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Subroutine("irq", listOf(), listOf(), listOf(), listOf(), setOf(), null, true,mutableListOf(), pos)
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), position = pos)
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dummyIrqBlock.linkParents(module)
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module.statements.add(dummyIrqBlock)
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}
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}
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@ -238,12 +247,7 @@ class AstChecker(private val namespace: INameScope,
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// subroutine must contain at least one 'return' or 'goto'
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// (or if it has an asm block, that must contain a 'rts' or 'jmp')
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if(subroutine.statements.count { it is Return || it is Jump } == 0) {
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val amountOfRtsInAsm = subroutine.statements
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.asSequence()
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.filter { it is InlineAssembly }
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.map { (it as InlineAssembly).assembly }
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.count { " rti" in it || "\trti" in it || " rts" in it || "\trts" in it || " jmp" in it || "\tjmp" in it }
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if (amountOfRtsInAsm == 0) {
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if (subroutine.amountOfRtsInAsm() == 0) {
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if (subroutine.returntypes.isNotEmpty()) {
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// for asm subroutines with an address, no statement check is possible.
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if (subroutine.asmAddress == null)
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@ -101,7 +101,8 @@ class StatementReorderer(private val namespace: INameScope, private val heap: He
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if(subroutine.returntypes.isEmpty()) {
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// add the implicit return statement at the end (if it's not there yet), but only if it's not a kernel routine.
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if(subroutine.asmAddress==null) {
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// and if an assembly block doesn't contain a rts/rti
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if(subroutine.asmAddress==null && subroutine.amountOfRtsInAsm()==0) {
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if (subroutine.statements.lastOrNull {it !is VarDecl} !is Return) {
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val returnStmt = Return(emptyList(), subroutine.position)
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returnStmt.linkParents(subroutine)
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@ -433,49 +433,7 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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if (ins.arg!!.numericValue() in syscallsForStackVm.map { it.callNr })
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throw CompilerException("cannot translate vm syscalls to real assembly calls - use *real* subroutine calls instead. Syscall ${ins.arg.numericValue()}")
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val call = Syscall.values().find { it.callNr==ins.arg.numericValue() }
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when (call) {
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Syscall.FUNC_SET_IRQVEC ->
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"""
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sei
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lda #<_prog8_irq_handler
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sta c64.CINV
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lda #>_prog8_irq_handler
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sta c64.CINV+1
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cli
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jmp +
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_prog8_irq_handler jsr irq.irq
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jmp c64.IRQDFRT ; continue with normal kernel irq routine
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+
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"""
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Syscall.FUNC_SET_IRQVEC_EXCL ->
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"""
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sei
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lda #<_prog8_irq_handler_excl
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sta c64.CINV
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lda #>_prog8_irq_handler_excl
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sta c64.CINV+1
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cli
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jmp +
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_prog8_irq_handler_excl
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jsr irq.irq
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lda ${'$'}dc0d ; acknowledge CIA interrupt
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jmp c64.IRQDFEND ; end irq processing - don't call kernel
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+
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"""
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Syscall.FUNC_RESTORE_IRQVEC ->
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"""
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sei
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lda #<c64.IRQDFRT
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sta c64.CINV
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lda #>c64.IRQDFRT
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sta c64.CINV+1
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cli
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"""
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else -> " jsr prog8_lib.${call.toString().toLowerCase()}"
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}
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" jsr prog8_lib.${call.toString().toLowerCase()}"
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}
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Opcode.BREAKPOINT -> {
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breakpointCounter++
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@ -54,10 +54,7 @@ val BuiltinFunctions = mapOf(
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"clear_carry" to FunctionSignature(false, emptyList(), null),
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"set_irqd" to FunctionSignature(false, emptyList(), null),
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"clear_irqd" to FunctionSignature(false, emptyList(), null),
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"set_irqvec" to FunctionSignature(false, emptyList(), null),
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"set_irqvec_excl" to FunctionSignature(false, emptyList(), null),
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"restore_irqvec" to FunctionSignature(false, emptyList(), null),
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"memcopy" to FunctionSignature(false, listOf(
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"memcopy" to FunctionSignature(false, listOf(
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BuiltinFunctionParam("from", IntegerDatatypes + IterableDatatypes),
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BuiltinFunctionParam("to", IntegerDatatypes + IterableDatatypes),
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BuiltinFunctionParam("numbytes", IntegerDatatypes)), null),
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@ -70,9 +70,6 @@ enum class Syscall(val callNr: Short) {
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FUNC_SUM_UW(132),
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FUNC_SUM_W(133),
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FUNC_SUM_F(134),
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FUNC_SET_IRQVEC(135),
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FUNC_SET_IRQVEC_EXCL(136),
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FUNC_RESTORE_IRQVEC(137),
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FUNC_MEMCOPY(138)
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// note: not all builtin functions of the Prog8 language are present as functions:
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@ -133,7 +130,7 @@ class StackVm(private var traceOutputFile: String?) {
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private val rnd = Random()
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private val bootTime = System.currentTimeMillis()
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private lateinit var currentIns: Instruction
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private var irqStartInstruction: Instruction? = null // set to first instr of irq routine, if any
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private var irqStartInstruction: Instruction? = null
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var sourceLine: String = ""
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private set
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@ -161,7 +158,7 @@ class StackVm(private var traceOutputFile: String?) {
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P_irqd = false
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sourceLine = ""
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currentIns = this.program[0]
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irqStartInstruction = null
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irqStartInstruction = labels["irq.irq"] // set to first instr of irq routine, if any
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}
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fun step(instructionCount: Int = 5000) {
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@ -1647,12 +1644,6 @@ class StackVm(private var traceOutputFile: String?) {
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val value = heap.get(iterable.heapId)
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evalstack.push(Value(DataType.UBYTE, if (value.array!!.all { v -> v != 0 }) 1 else 0))
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}
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Syscall.FUNC_SET_IRQVEC, Syscall.FUNC_SET_IRQVEC_EXCL -> {
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irqStartInstruction = labels["irq.irq"]
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}
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Syscall.FUNC_RESTORE_IRQVEC -> {
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irqStartInstruction = null
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}
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Syscall.FUNC_MEMCOPY -> {
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val numbytes = evalstack.pop().integerValue()
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val to = evalstack.pop().integerValue()
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@ -633,20 +633,6 @@ set_irqd() / clear_irqd()
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Set (or clear) the CPU status register Interrupt Disable flag. No result value.
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(translated into ``SEI`` or ``CLI`` cpu instruction)
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set_irqvec_excl()
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Sets the system's IRQ vector to the special ``irq.irq`` subroutine exclusively -- the system's
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default IRQ handler is no longer called. The routine should be defined as a parameterless subroutine
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``irq`` in a block ``irq``.
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set_irqvec()
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Add the special ``irq.irq`` subroutine to the system's IRQ vector -- the system's
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default IRQ handler will still be called after your custom subroutine finishes.
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The routine should be defined as a parameterless subroutine
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``irq`` in a block ``irq``.
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restore_irqvec()
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Restore the IRQ vector to the default system IRQ handling subroutine.
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rsave()
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Saves the CPU registers and the status flags.
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You can now more or less 'safely' use the registers directly, until you
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@ -94,6 +94,44 @@
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; ---- end of VIC-II registers ----
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; ---- CIA 1 & 2 registers ----
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memory ubyte CIA1PRA = $DC00 ; CIA 1 DRA, keyboard column drive
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memory ubyte CIA1PRB = $DC01 ; CIA 1 DRB, keyboard row port
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memory ubyte CIA1DDRA = $DC02 ; CIA 1 DDRA, keyboard column
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memory ubyte CIA1DDRB = $DC03 ; CIA 1 DDRB, keyboard row
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memory ubyte CIA1TALO = $DC04 ; CIA 1 timer A low byte
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memory ubyte CIA1TAHI = $DC05 ; CIA 1 timer A high byte
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memory ubyte CIA1TBLO = $DC06 ; CIA 1 timer B low byte
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memory ubyte CIA1TBHI = $DC07 ; CIA 1 timer B high byte
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memory ubyte CIA1TOD10 = $DC08 ; time of day, 1/10 sec.
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memory ubyte CIA1TODS = $DC09 ; time of day, seconds
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memory ubyte CIA1TODM = $DC0A ; time of day, minutes
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memory ubyte CIA1TODH = $DC0B ; time of day, hours
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memory ubyte CIA1SDR = $DC0C ; Serial Data Register
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memory ubyte CIA1ICR = $DC0D
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memory ubyte CIA1CRA = $DC0E
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memory ubyte CIA1CRB = $DC0F
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memory ubyte CIA2PRA = $DD00 ; CIA 2 DRA, serial port and video address
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memory ubyte CIA2PRB = $DD01 ; CIA 2 DRB, RS232 port / USERPORT
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memory ubyte CIA2DDRA = $DD02 ; CIA 2 DDRA, serial port and video address
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memory ubyte CIA2DDRB = $DD03 ; CIA 2 DDRB, RS232 port / USERPORT
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memory ubyte CIA2TALO = $DD04 ; CIA 2 timer A low byte
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memory ubyte CIA2TAHI = $DD05 ; CIA 2 timer A high byte
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memory ubyte CIA2TBLO = $DD06 ; CIA 2 timer B low byte
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memory ubyte CIA2TBHI = $DD07 ; CIA 2 timer B high byte
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memory ubyte CIA2TOD10 = $DD08 ; time of day, 1/10 sec.
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memory ubyte CIA2TODS = $DD09 ; time of day, seconds
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memory ubyte CIA2TODM = $DD0A ; time of day, minutes
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memory ubyte CIA2TODH = $DD0B ; time of day, hours
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memory ubyte CIA2SDR = $DD0C ; Serial Data Register
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memory ubyte CIA2ICR = $DD0D
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memory ubyte CIA2CRA = $DD0E
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memory ubyte CIA2CRB = $DD0F
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; ---- end of CIA registers ----
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; ---- C64 basic and kernal ROM float constants and functions ----
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; note: the fac1 and fac2 are working registers and take 6 bytes each,
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@ -408,7 +408,120 @@ _mod2b lda #0 ; self-modified
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bne -
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_done rts
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.pend
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}}
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}}
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asmsub set_irqvec_excl() -> clobbers(A) -> () {
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%asm {{
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sei
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lda #<_irq_handler
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sta c64.CINV
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lda #>_irq_handler
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sta c64.CINV+1
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cli
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rts
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_irq_handler jsr irq.irq
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lda #$ff
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sta c64.VICIRQ ; acknowledge raster irq
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lda c64.CIA1ICR ; acknowledge CIA1 interrupt
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jmp c64.IRQDFEND ; end irq processing - don't call kernel
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}}
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}
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asmsub set_irqvec() -> clobbers(A) -> () {
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%asm {{
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sei
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lda #<_irq_handler
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sta c64.CINV
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lda #>_irq_handler
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sta c64.CINV+1
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cli
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rts
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_irq_handler jsr irq.irq
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jmp c64.IRQDFRT ; continue with normal kernel irq routine
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}}
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}
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asmsub restore_irqvec() -> clobbers() -> () {
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%asm {{
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sei
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lda #<c64.IRQDFRT
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sta c64.CINV
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lda #>c64.IRQDFRT
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sta c64.CINV+1
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lda #0
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sta c64.IREQMASK ; disable raster irq
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lda #%10000001
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sta c64.CIA1ICR ; restore CIA1 irq
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cli
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rts
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}}
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}
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asmsub set_rasterirq(uword rasterpos @ AY) -> clobbers(A) -> () {
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%asm {{
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sei
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jsr _setup_raster_irq
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lda #<_raster_irq_handler
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sta c64.CINV
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lda #>_raster_irq_handler
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sta c64.CINV+1
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cli
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rts
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_raster_irq_handler
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jsr irq.irq
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lda #$ff
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sta c64.VICIRQ ; acknowledge raster irq
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jmp c64.IRQDFRT
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_setup_raster_irq
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pha
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lda #%01111111
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sta c64.CIA1ICR ; "switch off" interrupts signals from cia-1
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sta c64.CIA2ICR ; "switch off" interrupts signals from cia-2
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and c64.SCROLY
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sta c64.SCROLY ; clear most significant bit of raster position
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lda c64.CIA1ICR ; ack previous irq
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lda c64.CIA2ICR ; ack previous irq
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pla
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sta c64.RASTER ; set the raster line number where interrupt should occur
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cpy #0
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beq +
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lda c64.SCROLY
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ora #%10000000
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sta c64.SCROLY ; set most significant bit of raster position
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+ lda #%00000001
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sta c64.IREQMASK ;enable raster interrupt signals from vic
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rts
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}}
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}
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asmsub set_rasterirq_excl(uword rasterpos @ AY) -> clobbers(A) -> () {
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%asm {{
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sei
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jsr set_rasterirq._setup_raster_irq
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lda #<_raster_irq_handler
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sta c64.CINV
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lda #>_raster_irq_handler
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sta c64.CINV+1
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cli
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rts
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_raster_irq_handler
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jsr irq.irq
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lda #$ff
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sta c64.VICIRQ ; acknowledge raster irq
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jmp c64.IRQDFEND ; end irq processing - don't call kernel
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}}
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}
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} ; ------ end of block c64utils
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@ -476,7 +476,6 @@ abs_f .proc
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add_w .proc
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; -- push word+word / uword+uword
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; @todo INLINE THIS
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inx
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clc
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lda ESTACK_LO,x
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@ -490,7 +489,6 @@ add_w .proc
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sub_w .proc
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; -- push word-word
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; @todo INLINE THIS
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inx
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sec
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lda ESTACK_LO+1,x
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