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https://github.com/irmen/prog8.git
synced 2024-07-05 22:29:04 +00:00
optimized cx16.vpoke etc. to be asmsubroutines instead
This commit is contained in:
parent
07b00bec61
commit
3307f673f6
@ -279,19 +279,18 @@ asmsub vpeek(ubyte bank @A, uword address @XY) -> ubyte @A {
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}
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}
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sub vaddr(ubyte bank, uword address, ubyte addrsel, byte incrdecr) {
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asmsub vaddr(uword address @R0, ubyte bank @R1, ubyte addrsel @A, byte incrdecr @Y) {
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; -- setup the VERA's address register 0 or 1
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; -- setup the VERA's address register 0 or 1
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%asm {{
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%asm {{
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lda addrsel
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and #1
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and #1
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sta cx16.VERA_CTRL
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sta cx16.VERA_CTRL
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lda address
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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sta cx16.VERA_ADDR_L
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lda address+1
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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sta cx16.VERA_ADDR_M
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lda bank
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lda cx16.r1
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and #1
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and #1
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ldy incrdecr
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cpy #0
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bmi _decr
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bmi _decr
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beq _seth
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beq _seth
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ora #%00010000
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ora #%00010000
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@ -303,76 +302,70 @@ _decr ora #%00011000
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}
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}
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; TODO make asmsub versions once that no longer generates larger code...
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asmsub vpoke(uword address @R0, ubyte bank @A, ubyte value @Y) {
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sub vpoke(ubyte bank, uword address, ubyte value) {
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; -- write a single byte to VERA's video memory
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; -- write a single byte to VERA's video memory
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; note: inefficient when writing multiple sequential bytes!
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; note: inefficient when writing multiple sequential bytes!
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%asm {{
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%asm {{
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stz cx16.VERA_CTRL
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stz cx16.VERA_CTRL
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lda bank
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and #1
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and #1
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sta cx16.VERA_ADDR_H
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sta cx16.VERA_ADDR_H
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lda address
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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sta cx16.VERA_ADDR_L
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lda address+1
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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sta cx16.VERA_ADDR_M
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lda value
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sty cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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rts
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}}
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}}
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}
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}
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sub vpoke_or(ubyte bank, uword address, ubyte value) {
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asmsub vpoke_or(uword address @R0, ubyte bank @A, ubyte value @Y) {
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; -- or a single byte to the value already in the VERA's video memory at that location
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; -- or a single byte to the value already in the VERA's video memory at that location
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; note: inefficient when writing multiple sequential bytes!
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; note: inefficient when writing multiple sequential bytes!
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%asm {{
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%asm {{
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stz cx16.VERA_CTRL
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stz cx16.VERA_CTRL
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lda bank
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and #1
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and #1
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sta cx16.VERA_ADDR_H
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sta cx16.VERA_ADDR_H
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lda address
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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sta cx16.VERA_ADDR_L
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lda address+1
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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sta cx16.VERA_ADDR_M
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lda value
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tya
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ora cx16.VERA_DATA0
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ora cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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rts
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}}
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}}
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}
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}
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sub vpoke_and(ubyte bank, uword address, ubyte value) {
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asmsub vpoke_and(uword address @R0, ubyte bank @A, ubyte value @Y) {
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; -- and a single byte to the value already in the VERA's video memory at that location
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; -- and a single byte to the value already in the VERA's video memory at that location
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; note: inefficient when writing multiple sequential bytes!
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; note: inefficient when writing multiple sequential bytes!
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%asm {{
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%asm {{
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stz cx16.VERA_CTRL
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stz cx16.VERA_CTRL
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lda bank
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and #1
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and #1
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sta cx16.VERA_ADDR_H
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sta cx16.VERA_ADDR_H
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lda address
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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sta cx16.VERA_ADDR_L
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lda address+1
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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sta cx16.VERA_ADDR_M
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lda value
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tya
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and cx16.VERA_DATA0
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and cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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rts
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}}
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}}
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}
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}
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sub vpoke_xor(ubyte bank, uword address, ubyte value) {
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asmsub vpoke_xor(uword address @R0, ubyte bank @A, ubyte value @Y) {
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; -- xor a single byte to the value already in the VERA's video memory at that location
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; -- xor a single byte to the value already in the VERA's video memory at that location
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; note: inefficient when writing multiple sequential bytes!
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; note: inefficient when writing multiple sequential bytes!
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%asm {{
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%asm {{
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stz cx16.VERA_CTRL
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stz cx16.VERA_CTRL
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lda bank
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and #1
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and #1
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sta cx16.VERA_ADDR_H
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sta cx16.VERA_ADDR_H
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lda address
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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sta cx16.VERA_ADDR_L
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lda address+1
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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sta cx16.VERA_ADDR_M
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lda value
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tya
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eor cx16.VERA_DATA0
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eor cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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rts
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@ -14,6 +14,12 @@ main {
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ubyte mode
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ubyte mode
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for mode in modes {
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for mode in modes {
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gfx2.set_mode(mode)
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gfx2.set_mode(mode)
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; gfx2.location(20, 50)
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; repeat 200 {
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; gfx2.next_pixel(255)
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; }
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draw()
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draw()
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cx16.wait(120)
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cx16.wait(120)
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}
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}
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@ -129,12 +135,23 @@ gfx2 {
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sub plot(uword x, uword y, ubyte color) {
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sub plot(uword x, uword y, ubyte color) {
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ubyte[8] bits = [128, 64, 32, 16, 8, 4, 2, 1]
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ubyte[8] bits = [128, 64, 32, 16, 8, 4, 2, 1]
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uword addr
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ubyte value
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when active_mode {
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when active_mode {
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0 -> cx16.vpoke_or(0, y*(320/8) + x/8, bits[lsb(x)&7])
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0 -> {
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128 -> cx16.vpoke_or(0, y*(640/8) + x/8, bits[lsb(x)&7])
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addr = x/8 + y*(320/8)
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value = bits[lsb(x)&7]
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cx16.vpoke_or(addr, 0, value)
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}
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128 -> {
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addr = x/8 + y*(640/8)
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value = bits[lsb(x)&7]
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cx16.vpoke_or(addr, 0, value)
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}
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1 -> {
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1 -> {
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void addr_mul_320_add_24(y, x) ; 24 bits result is in r0 and r1L
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void addr_mul_320_add_24(y, x) ; 24 bits result is in r0 and r1L
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cx16.vpoke(lsb(cx16.r1), cx16.r0, color)
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ubyte bank = lsb(cx16.r1)
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cx16.vpoke(cx16.r0, bank, color)
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}
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}
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}
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}
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; activate vera auto-increment mode so next_pixel() can be used after this
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; activate vera auto-increment mode so next_pixel() can be used after this
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@ -143,12 +160,20 @@ gfx2 {
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}
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}
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sub location(uword x, uword y) {
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sub location(uword x, uword y) {
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uword address
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when active_mode {
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when active_mode {
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0 -> cx16.vaddr(0, y*(320/8) + x/8, 0, 1)
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0 -> {
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128 -> cx16.vaddr(0, y*(640/8) + x/8, 0, 1)
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address = y*(320/8) + x/8
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cx16.vaddr(address, 0, 0, 1)
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}
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128 -> {
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address = y*(640/8) + x/8
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cx16.vaddr(address, 0, 0, 1)
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}
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1 -> {
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1 -> {
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void addr_mul_320_add_24(y, x) ; 24 bits result is in r0 and r1L
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void addr_mul_320_add_24(y, x) ; 24 bits result is in r0 and r1L
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cx16.vaddr(lsb(cx16.r1), cx16.r0, 0, 1)
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ubyte bank = lsb(cx16.r1)
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cx16.vaddr(cx16.r0, bank, 0, 1)
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}
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}
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}
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}
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}
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}
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@ -9,7 +9,6 @@
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main {
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main {
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; TODO asmsub version generates LARGER CODE , why is this?
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sub vpoke(ubyte bank, uword address, ubyte value) {
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sub vpoke(ubyte bank, uword address, ubyte value) {
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%asm {{
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%asm {{
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rts
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rts
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@ -29,6 +28,7 @@ main {
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ubyte value = 123
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ubyte value = 123
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bank++
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bank++
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vpoke(bank, address, value)
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vpoke(bank, address, value)
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vpokeasm(address, bank, value)
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vpokeasm(address, bank, value) ; TODO generates params on stack if expression is used such as lsb(bank). CHECK STACK UNWINDING!!!
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; TODO also see if we can do this via R0-R15 temp registers rather than using the estack???
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}
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}
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}
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}
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