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@ -936,6 +936,8 @@ skip:
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}
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}
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asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
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asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
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; using verafx 32 bits writes here would make this faster but it's safer to
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; use verafx only explicitly when you know what you're doing.
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%asm {{
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%asm {{
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ldy #80
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ldy #80
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- sta cx16.VERA_DATA0
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- sta cx16.VERA_DATA0
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@ -890,6 +890,8 @@ skip:
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}
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}
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asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
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asmsub cs_innerloop640(ubyte color @A) clobbers(Y) {
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; using verafx 32 bits writes here would make this faster but it's safer to
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; use verafx only explicitly when you know what you're doing.
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%asm {{
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%asm {{
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cmp #0
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cmp #0
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beq +
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beq +
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@ -3,17 +3,11 @@ TODO
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====
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====
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- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
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- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
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- once VAL_1 is merged into the kernal properly, remove all the workarounds in cx16 floats.parse_f()
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...
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...
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Need help with
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^^^^^^^^^^^^^^
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- getting the IR in shape for code generation
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- atari target: more details details about the machine, fixing library routines. I have no clue whatsoever.
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See the :ref:`portingguide` for details on what information is needed.
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Future Things and Ideas
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Future Things and Ideas
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^^^^^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^^^^^
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Compiler:
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Compiler:
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@ -34,6 +28,7 @@ Compiler:
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- (need separate step in codegen and IR to write the "golden" variables)
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- (need separate step in codegen and IR to write the "golden" variables)
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- do we need (array)variable alignment tag instead of block alignment tag? You want to align the data, not the code in the block?
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- do we need (array)variable alignment tag instead of block alignment tag? You want to align the data, not the code in the block?
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- ir: getting it in shape for code generation
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- ir: related to the one above: block alignment doesn't translate well to variables in the block (the actual stuff that needs to be aligned in memory) but: need variable alignment tag instead of block alignment tag, really
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- ir: related to the one above: block alignment doesn't translate well to variables in the block (the actual stuff that needs to be aligned in memory) but: need variable alignment tag instead of block alignment tag, really
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- ir: idea: (but LLVM IR simply keeps the variables, so not a good idea then?...): replace all scalar variables by an allocated register. Keep a table of the variable to register mapping (including the datatype)
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- ir: idea: (but LLVM IR simply keeps the variables, so not a good idea then?...): replace all scalar variables by an allocated register. Keep a table of the variable to register mapping (including the datatype)
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global initialization values are simply a list of LOAD instructions.
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global initialization values are simply a list of LOAD instructions.
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@ -49,14 +44,10 @@ Compiler:
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Once new codegen is written that is based on the IR, this point is mostly moot anyway as that will have its own dead code removal on the IR level.
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Once new codegen is written that is based on the IR, this point is mostly moot anyway as that will have its own dead code removal on the IR level.
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- Zig-like try-based error handling where the V flag could indicate error condition? and/or BRK to jump into monitor on failure? (has to set BRK vector for that) But the V flag is also set on certain normal instructions
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- Zig-like try-based error handling where the V flag could indicate error condition? and/or BRK to jump into monitor on failure? (has to set BRK vector for that) But the V flag is also set on certain normal instructions
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- generate WASM to eventually run prog8 on a browser canvas? Use binaryen toolkit or my binaryen kotlin library?
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- generate WASM to eventually run prog8 on a browser canvas? Use binaryen toolkit or my binaryen kotlin library?
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- add Vic20 target
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Libraries:
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Libraries:
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- gfx2 cs_innerloop640() extend number of bytes cleared, and use vera fx cached writes (speed up screen clear)
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- gfx2 horizontal_line and vertical_line: use vera fx cached writes
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- use verafx transparent writes to speed up pixel plotting in gfx2 and monogfx modules (avoids read/mask/write)
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- port gfx2 to the vm? First add colors to the vm?
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- fix the problems in atari target, and flesh out its libraries.
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- fix the problems in atari target, and flesh out its libraries.
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- c128 target: make syslib more complete (missing kernal routines)?
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- c128 target: make syslib more complete (missing kernal routines)?
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- pet32 target: make syslib more complete (missing kernal routines)?
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- pet32 target: make syslib more complete (missing kernal routines)?
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