refactor cpuCheck

This commit is contained in:
Irmen de Jong 2021-02-19 18:48:12 +01:00
parent 219d17de34
commit 39d32a3600
7 changed files with 54 additions and 52 deletions

View File

@ -89,6 +89,7 @@ internal class AsmGen(private val program: Program,
return AssemblyProgram(program.name, outputDir, compTarget.name)
}
internal fun isTargetCpu(cpu: CpuType) = compTarget.machine.cpu == cpu
private fun header() {
val ourName = this.javaClass.name
@ -524,7 +525,7 @@ internal class AsmGen(private val program: Program,
val sourceName = asmVariableName(pointervar)
val vardecl = pointervar.targetVarDecl(program)!!
val scopedName = vardecl.makeScopedName(vardecl.name)
if (compTarget.machine.cpu == CpuType.CPU65c02) {
if (isTargetCpu(CpuType.CPU65c02)) {
return if (isZpVar(scopedName)) {
// pointervar is already in the zero page, no need to copy
out(" lda ($sourceName)")
@ -559,7 +560,7 @@ internal class AsmGen(private val program: Program,
private fun fixNameSymbols(name: String) = name.replace("<", "prog8_").replace(">", "") // take care of the autogenerated invalid (anon) label names
internal fun saveRegisterLocal(register: CpuRegister, scope: Subroutine) {
if (compTarget.machine.cpu == CpuType.CPU65c02) {
if (isTargetCpu(CpuType.CPU65c02)) {
// just use the cpu's stack for all registers, shorter code
when (register) {
CpuRegister.A -> out(" pha")
@ -588,7 +589,7 @@ internal class AsmGen(private val program: Program,
when (register) {
CpuRegister.A -> out(" pha")
CpuRegister.X -> {
if (compTarget.machine.cpu == CpuType.CPU65c02) out(" phx")
if (isTargetCpu(CpuType.CPU65c02)) out(" phx")
else {
if(keepA)
out(" sta P8ZP_SCRATCH_REG | txa | pha | lda P8ZP_SCRATCH_REG")
@ -597,7 +598,7 @@ internal class AsmGen(private val program: Program,
}
}
CpuRegister.Y -> {
if (compTarget.machine.cpu == CpuType.CPU65c02) out(" phy")
if (isTargetCpu(CpuType.CPU65c02)) out(" phy")
else {
if(keepA)
out(" sta P8ZP_SCRATCH_REG | tya | pha | lda P8ZP_SCRATCH_REG")
@ -609,7 +610,7 @@ internal class AsmGen(private val program: Program,
}
internal fun restoreRegisterLocal(register: CpuRegister) {
if (compTarget.machine.cpu == CpuType.CPU65c02) {
if (isTargetCpu(CpuType.CPU65c02)) {
when (register) {
// this just used the stack, for all registers. Shorter code.
CpuRegister.A -> out(" pla")
@ -634,7 +635,7 @@ internal class AsmGen(private val program: Program,
out(" pla")
}
CpuRegister.X -> {
if (compTarget.machine.cpu == CpuType.CPU65c02) out(" plx")
if (isTargetCpu(CpuType.CPU65c02)) out(" plx")
else {
if(keepA)
out(" sta P8ZP_SCRATCH_REG | pla | tax | lda P8ZP_SCRATCH_REG")
@ -643,7 +644,7 @@ internal class AsmGen(private val program: Program,
}
}
CpuRegister.Y -> {
if (compTarget.machine.cpu == CpuType.CPU65c02) out(" ply")
if (isTargetCpu(CpuType.CPU65c02)) out(" ply")
else {
if(keepA)
out(" sta P8ZP_SCRATCH_REG | pla | tay | lda P8ZP_SCRATCH_REG")
@ -1328,7 +1329,7 @@ $label nop""")
// sign extend signed byte on stack to signed word on stack
when(valueDt) {
DataType.UBYTE -> {
if(compTarget.machine.cpu == CpuType.CPU65c02)
if(isTargetCpu(CpuType.CPU65c02))
out(" stz P8ESTACK_HI+1,x")
else
out(" lda #0 | sta P8ESTACK_HI+1,x")
@ -1342,7 +1343,7 @@ $label nop""")
// sign extend signed byte in a var to a full word in that variable
when(valueDt) {
DataType.UBYTE -> {
if(compTarget.machine.cpu == CpuType.CPU65c02)
if(isTargetCpu(CpuType.CPU65c02))
out(" stz $asmvar+1")
else
out(" lda #0 | sta $asmvar+1")

View File

@ -972,7 +972,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
// pointervar is already in the zero page, no need to copy
asmgen.saveRegisterLocal(CpuRegister.X, (fcall as Node).definingSubroutine()!!)
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.AX)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if (asmgen.isTargetCpu(CpuType.CPU65c02)) {
asmgen.out("""
sta ($varname)
txa
@ -1023,7 +1023,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
val varname = asmgen.asmVariableName(addrExpr)
if(asmgen.isZpVar(addrExpr)) {
// pointervar is already in the zero page, no need to copy
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if (asmgen.isTargetCpu(CpuType.CPU65c02)) {
asmgen.out("""
ldy #1
lda ($varname),y

View File

@ -1393,7 +1393,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
when(typecast.type) {
DataType.UBYTE, DataType.BYTE -> {}
DataType.UWORD, DataType.WORD -> {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_HI+1,x")
else
asmgen.out(" lda #0 | sta P8ESTACK_HI+1,x")
@ -1459,7 +1459,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
fun assignViaExprEval() {
asmgen.assignExpressionToVariable(expr.addressExpression, asmgen.asmVariableName("P8ZP_SCRATCH_W2"), DataType.UWORD, null)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if (asmgen.isTargetCpu(CpuType.CPU65c02)) {
if (pushResultOnEstack) {
asmgen.out(" lda (P8ZP_SCRATCH_W2) | dex | sta P8ESTACK_LO+1,x")
} else {
@ -1673,7 +1673,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
}
DataType.UWORD -> {
if(amount>=16) {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_LO+1,x | stz P8ESTACK_HI+1,x")
else
asmgen.out(" lda #0 | sta P8ESTACK_LO+1,x | sta P8ESTACK_HI+1,x")

View File

@ -168,7 +168,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
lda P8ESTACK_LO$plusIdxStr,x
sta cx16.${argi.value.second.registerOrPair.toString().toLowerCase()}
""")
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if (asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz cx16.${argi.value.second.registerOrPair.toString().toLowerCase()}+1")
else
asmgen.out(" lda #0 | sta cx16.${argi.value.second.registerOrPair.toString().toLowerCase()}+1")

View File

@ -1,5 +1,6 @@
package prog8.compiler.target.c64.codegen.assignment
import prog8.ast.IMemSizer
import prog8.ast.Program
import prog8.ast.base.*
import prog8.ast.expressions.*
@ -207,13 +208,13 @@ internal class AsmAssignSource(val kind: SourceStorageKind,
internal class AsmAssignment(val source: AsmAssignSource,
val target: AsmAssignTarget,
val isAugmentable: Boolean,
compTarget: ICompilationTarget,
memsizer: IMemSizer,
val position: Position) {
init {
if(target.register !in setOf(RegisterOrPair.XY, RegisterOrPair.AX, RegisterOrPair.AY))
require(source.datatype != DataType.STRUCT) { "must not be placeholder datatype" }
require(compTarget.memorySize(source.datatype) <= compTarget.memorySize(target.datatype)) {
require(memsizer.memorySize(source.datatype) <= memsizer.memorySize(target.datatype)) {
"source storage size must be less or equal to target datatype storage size"
}
}

View File

@ -114,7 +114,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
SourceStorageKind.MEMORY -> {
fun assignViaExprEval(expression: Expression) {
assignExpressionToVariable(expression, asmgen.asmVariableName("P8ZP_SCRATCH_W2"), DataType.UWORD, assign.target.scope)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if (asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" lda (P8ZP_SCRATCH_W2)")
else
asmgen.out(" ldy #0 | lda (P8ZP_SCRATCH_W2),y")
@ -319,7 +319,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
fun assignViaExprEval(addressExpression: Expression) {
asmgen.assignExpressionToVariable(addressExpression, asmgen.asmVariableName("P8ZP_SCRATCH_W2"), DataType.UWORD, null)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if (asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" lda (P8ZP_SCRATCH_W2)")
else
asmgen.out(" ldy #0 | lda (P8ZP_SCRATCH_W2),y")
@ -473,7 +473,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName")
}
DataType.UWORD, DataType.WORD -> {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName | stz $targetAsmVarName+1")
else
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName | lda #0 | sta $targetAsmVarName+1")
@ -496,7 +496,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName")
}
DataType.UWORD -> {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName | stz $targetAsmVarName+1")
else
asmgen.out(" lda $sourceAsmVarName | sta $targetAsmVarName | lda #0 | sta $targetAsmVarName+1")
@ -592,7 +592,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName")
}
DataType.UWORD, DataType.WORD -> {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName | stz $targetAsmVarName+1")
else
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName | lda #0 | sta $targetAsmVarName+1")
@ -620,7 +620,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName")
}
DataType.UWORD -> {
if(asmgen.compTarget.machine.cpu==CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName | stz $targetAsmVarName+1")
else
asmgen.out(" st${regs.toString().toLowerCase()} $targetAsmVarName | lda #0 | sta $targetAsmVarName+1")
@ -1295,7 +1295,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
when(wordtarget.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname}")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${wordtarget.asmVarname}+1")
else
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+1")
@ -1304,7 +1304,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
if (wordtarget.constArrayIndexValue!=null) {
val scaledIdx = wordtarget.constArrayIndexValue!! * 2
asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname}+$scaledIdx")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${wordtarget.asmVarname}+$scaledIdx+1")
else
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+$scaledIdx+1")
@ -1329,7 +1329,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
}
TargetStorageKind.STACK -> {
asmgen.out(" lda $sourceName | sta P8ESTACK_LO,x")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_HI,x | dex")
else
asmgen.out(" lda #0 | sta P8ESTACK_HI,x | dex")
@ -1571,7 +1571,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
}
private fun assignConstantWord(target: AsmAssignTarget, word: Int) {
if(word==0 && asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if(word==0 && asmgen.isTargetCpu(CpuType.CPU65c02)) {
// optimize setting zero value for this processor
when(target.kind) {
TargetStorageKind.VARIABLE -> {
@ -1666,7 +1666,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
}
private fun assignConstantByte(target: AsmAssignTarget, byte: Short) {
if(byte==0.toShort() && asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if(byte==0.toShort() && asmgen.isTargetCpu(CpuType.CPU65c02)) {
// optimize setting zero value for this cpu
when(target.kind) {
TargetStorageKind.VARIABLE -> {
@ -1736,7 +1736,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
RegisterOrPair.FAC1, RegisterOrPair.FAC2 -> throw AssemblyError("expected typecasted byte to float")
in Cx16VirtualRegisters -> {
asmgen.out(" lda #${byte.toHex()} | sta cx16.${target.register.toString().toLowerCase()}")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz cx16.${target.register.toString().toLowerCase()}+1\n")
else
asmgen.out(" lda #0 | sta cx16.${target.register.toString().toLowerCase()}+1\n")
@ -1757,7 +1757,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
// optimized case for float zero
when(target.kind) {
TargetStorageKind.VARIABLE -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out("""
stz ${target.asmVarname}
stz ${target.asmVarname}+1
@ -1778,7 +1778,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
TargetStorageKind.ARRAY -> {
if (target.array!!.indexer.indexNum!=null) {
val indexValue = target.array.indexer.constIndex()!! * asmgen.compTarget.memorySize(DataType.FLOAT)
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out("""
stz ${target.asmVarname}+$indexValue
stz ${target.asmVarname}+$indexValue+1
@ -1975,7 +1975,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
when(wordtarget.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out(" lda ${address.toHex()} | sta ${wordtarget.asmVarname}")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${wordtarget.asmVarname}+1")
else
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+1")
@ -1991,7 +1991,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
}
TargetStorageKind.STACK -> {
asmgen.out(" lda ${address.toHex()} | sta P8ESTACK_LO,x")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_HI,x | dex")
else
asmgen.out(" lda #0 | sta P8ESTACK_HI,x | dex")
@ -2003,7 +2003,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
TargetStorageKind.VARIABLE -> {
asmgen.loadByteFromPointerIntoA(identifier)
asmgen.out(" sta ${wordtarget.asmVarname}")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${wordtarget.asmVarname}+1")
else
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+1")
@ -2023,7 +2023,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
TargetStorageKind.STACK -> {
asmgen.loadByteFromPointerIntoA(identifier)
asmgen.out(" sta P8ESTACK_LO,x")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_HI,x | dex")
else
asmgen.out(" lda #0 | sta P8ESTACK_HI,x | dex")
@ -2041,7 +2041,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
when(addressExpr) {
is NumericLiteralValue, is IdentifierReference -> {
assignExpressionToVariable(addressExpr, asmgen.asmVariableName("P8ZP_SCRATCH_W2"), DataType.UWORD, null)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if (asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" sta (P8ZP_SCRATCH_W2)")
else
asmgen.out(" ldy #0 | sta (P8ZP_SCRATCH_W2),y")
@ -2051,7 +2051,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
asmgen.out(" pha")
assignExpressionToVariable(addressExpr, asmgen.asmVariableName("P8ZP_SCRATCH_W2"), DataType.UWORD, null)
asmgen.out(" pla")
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if (asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" sta (P8ZP_SCRATCH_W2)")
else
asmgen.out(" ldy #0 | sta (P8ZP_SCRATCH_W2),y")
@ -2063,7 +2063,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
val sourceName = asmgen.asmVariableName(pointervar)
val vardecl = pointervar.targetVarDecl(program)!!
val scopedName = vardecl.makeScopedName(vardecl.name)
if (asmgen.compTarget.machine.cpu == CpuType.CPU65c02) {
if (asmgen.isTargetCpu(CpuType.CPU65c02)) {
if (asmgen.isZpVar(scopedName)) {
// pointervar is already in the zero page, no need to copy
asmgen.out(" sta ($sourceName)")

View File

@ -631,7 +631,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
"<<" -> {
if(value>=8) {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name")
else
asmgen.out(" lda #0 | sta $name")
@ -642,7 +642,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
if(value>0) {
if (dt == DataType.UBYTE) {
if(value>=8) {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name")
else
asmgen.out(" lda #0 | sta $name")
@ -857,14 +857,14 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
"<<" -> {
when {
value>=16 -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name | stz $name+1")
else
asmgen.out(" lda #0 | sta $name | sta $name+1")
}
value==8 -> {
asmgen.out(" lda $name | sta $name+1")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name")
else
asmgen.out(" lda #0 | sta $name")
@ -884,14 +884,14 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
if(dt==DataType.UWORD) {
when {
value>=16 -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name | stz $name+1")
else
asmgen.out(" lda #0 | sta $name | sta $name+1")
}
value==8 -> {
asmgen.out(" lda $name+1 | sta $name")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name+1")
else
asmgen.out(" lda #0 | sta $name+1")
@ -940,13 +940,13 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
"&", "and" -> {
when {
value == 0 -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name | stz $name+1")
else
asmgen.out(" lda #0 | sta $name | sta $name+1")
}
value and 255 == 0 -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name")
else
asmgen.out(" lda #0 | sta $name")
@ -954,7 +954,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
value < 0x0100 -> {
asmgen.out(" lda $name | and #$value | sta $name")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name+1")
else
asmgen.out(" lda #0 | sta $name+1")
@ -1041,7 +1041,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
"*" -> {
asmgen.out(" lda $otherName | sta P8ZP_SCRATCH_W1")
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ZP_SCRATCH_W1+1")
else
asmgen.out(" lda #0 | sta P8ZP_SCRATCH_W1+1")
@ -1092,7 +1092,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
"&", "and" -> {
asmgen.out(" lda $otherName | and $name | sta $name")
if(dt in WordDatatypes) {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name+1")
else
asmgen.out(" lda #0 | sta $name+1")
@ -1351,7 +1351,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
asmgen.out(" and $name | sta $name")
if(dt in WordDatatypes) {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name+1")
else
asmgen.out(" lda #0 | sta $name+1")
@ -1644,7 +1644,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
DataType.UBYTE, DataType.BYTE -> {
when(target.kind) {
TargetStorageKind.VARIABLE -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${target.asmVarname}+1")
else
asmgen.out(" lda #0 | sta ${target.asmVarname}+1")
@ -1654,7 +1654,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
asmgen.out(" lda #0 | sta ${target.asmVarname},y")
}
TargetStorageKind.STACK -> {
if(asmgen.compTarget.machine.cpu == CpuType.CPU65c02)
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz P8ESTACK_HI+1,x")
else
asmgen.out(" lda #0 | sta P8ESTACK_HI+1,x")