prepare parser to allow chained array indexing later

This commit is contained in:
Irmen de Jong 2023-09-03 19:06:47 +02:00
parent c3fbdf34ca
commit 525a9b5036
3 changed files with 22 additions and 12 deletions

View File

@ -317,9 +317,10 @@ private fun Prog8ANTLRParser.Assign_targetContext.toAst() : AssignTarget {
is MemoryTargetContext ->
AssignTarget(null, null, DirectMemoryWrite(directmemory().expression().toAst(), directmemory().toPosition()), toPosition())
is ArrayindexedTargetContext -> {
val arrayvar = scoped_identifier().toAst()
val index = arrayindex().toAst()
val arrayindexed = ArrayIndexedExpression(arrayvar, index, scoped_identifier().toPosition())
val ax = arrayindexed()
val arrayvar = ax.scoped_identifier().toAst()
val index = ax.arrayindex().toAst()
val arrayindexed = ArrayIndexedExpression(arrayvar, index, ax.toPosition())
AssignTarget(null, arrayindexed, null, toPosition())
}
else -> throw FatalAstException("weird assign target node $this")
@ -434,10 +435,11 @@ private fun Prog8ANTLRParser.ExpressionContext.toAst() : Expression {
}
}
if(arrayindex()!=null) {
val identifier = scoped_identifier().toAst()
val index = arrayindex().toAst()
return ArrayIndexedExpression(identifier, index, scoped_identifier().toPosition())
if(arrayindexed()!=null) {
val ax = arrayindexed()
val identifier = ax.scoped_identifier().toAst()
val index = ax.arrayindex().toAst()
return ArrayIndexedExpression(identifier, index, ax.toPosition())
}
if(scoped_identifier()!=null)

View File

@ -1,8 +1,7 @@
TODO
====
- prefix prog8 subroutines with p8s_ instead of p8_ to not let them clash with variables in the asm?
- allow 'chained' array indexing for expressions: value = ptrarray[0][0]
- allow 'chained' array indexing for assign targets: ptrarray[0][0] = 42 this is just evaluating the lhs as a uword pointer expression
- prefix prog8 subroutines with p8s_ instead of p8_ to not let them clash with variables in the asm??
- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
- IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? etc), but only after setting the status bits is verified!
@ -21,6 +20,9 @@ Future Things and Ideas
^^^^^^^^^^^^^^^^^^^^^^^
Compiler:
- allow 'chained' array indexing for expressions: value = ptrarray[0][0]
- allow 'chained' array indexing for assign targets: ptrarray[0][0] = 42 this is just evaluating the lhs as a uword pointer expression
- [much work:] more support for (64tass) SEGMENTS ?
- (What, how, isn't current BSS support enough?)
- Add a mechanism to allocate variables into golden ram (or segments really) (see GoldenRam class)

View File

@ -153,7 +153,7 @@ augassignment :
assign_target:
scoped_identifier #IdentifierTarget
| scoped_identifier arrayindex #ArrayindexedTarget // TODO expression instead of just scoped_identifier
| arrayindexed #ArrayindexedTarget
| directmemory #MemoryTarget
;
@ -180,12 +180,18 @@ expression :
| left = expression EOL? bop = 'xor' EOL? right = expression
| literalvalue
| scoped_identifier
| scoped_identifier arrayindex // TODO expression instead of just scoped_identifier
| arrayindexed
| directmemory
| addressof
| expression typecast
;
arrayindexed:
scoped_identifier arrayindex
// TODO to allow chained array indexing: | arrayindexed arrayindex
;
typecast : 'as' datatype;
directmemory : '@' '(' expression ')';