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fixed assigning byte to word not clearing msb sometimes
This commit is contained in:
Irmen de Jong
parent
450eaf7c4a
commit
5659742d97
@ -45,12 +45,12 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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val variable = assign.source.asmVarname
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when (assign.target.datatype) {
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DataType.UBYTE, DataType.BYTE -> assignVariableByte(assign.target, variable)
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DataType.WORD -> assignVariableWord(assign.target, variable)
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DataType.WORD -> assignVariableWord(assign.target, variable, assign.source.datatype)
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DataType.UWORD -> {
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if(assign.source.datatype in PassByReferenceDatatypes)
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assignAddressOf(assign.target, variable)
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else
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assignVariableWord(assign.target, variable)
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assignVariableWord(assign.target, variable, assign.source.datatype)
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}
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DataType.FLOAT -> assignVariableFloat(assign.target, variable)
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DataType.STR -> assignVariableString(assign.target, variable)
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@ -288,20 +288,45 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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is PtPrefix -> {
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if(assign.target.array==null) {
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// First assign the value to the target then apply the operator in place on the target.
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// This saves a temporary variable
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translateNormalAssignment(
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AsmAssignment(
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AsmAssignSource.fromAstSource(value.value, program, asmgen),
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assign.target, program.memsizer, assign.position
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), scope
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)
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when (value.operator) {
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"+" -> {}
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"-" -> inplaceNegate(assign, true, scope)
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"~" -> inplaceInvert(assign, scope)
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"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
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else -> throw AssemblyError("invalid prefix operator")
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if(assign.source.datatype==assign.target.datatype) {
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// First assign the value to the target then apply the operator in place on the target.
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// This saves a temporary variable
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translateNormalAssignment(
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AsmAssignment(
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AsmAssignSource.fromAstSource(value.value, program, asmgen),
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assign.target, program.memsizer, assign.position
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), scope
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)
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when (value.operator) {
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"+" -> {}
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"-" -> inplaceNegate(assign, true, scope)
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"~" -> inplaceInvert(assign, scope)
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"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
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else -> throw AssemblyError("invalid prefix operator")
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}
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} else {
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// use a temporary variable
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val tempvar = if(value.type in ByteDatatypes) "P8ZP_SCRATCH_B1" else "P8ZP_SCRATCH_W1"
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assignExpressionToVariable(value.value, tempvar, value.type)
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when (value.operator) {
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"+" -> {}
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"-", "~" -> {
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val assignTempvar = AsmAssignment(
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AsmAssignSource(SourceStorageKind.VARIABLE, program, asmgen, value.type, variableAsmName = tempvar),
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AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, value.type, scope, assign.position, variableAsmName = tempvar),
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program.memsizer, assign.position)
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if(value.operator=="-")
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inplaceNegate(assignTempvar, true, scope)
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else
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inplaceInvert(assignTempvar, scope)
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}
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"not" -> throw AssemblyError("not should have been replaced in the Ast by ==0")
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else -> throw AssemblyError("invalid prefix operator")
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}
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if(value.type in ByteDatatypes)
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assignVariableByte(assign.target, tempvar)
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else
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assignVariableWord(assign.target, tempvar, value.type)
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}
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} else {
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assignPrefixedExpressionToArrayElt(assign, scope)
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@ -338,7 +363,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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asmgen.translateNormalAssignment(assignToTempvar, scope)
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when(assign.target.datatype) {
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in ByteDatatypes -> assignVariableByte(assign.target, tempvar)
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in WordDatatypes -> assignVariableWord(assign.target, tempvar)
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in WordDatatypes -> assignVariableWord(assign.target, tempvar, assign.source.datatype)
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DataType.FLOAT -> assignVariableFloat(assign.target, tempvar)
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else -> throw AssemblyError("weird dt")
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}
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@ -827,7 +852,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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DataType.UWORD -> {
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1")
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asmgen.out(" jsr math.divmod_uw_asm")
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assignVariableWord(assign.target, "P8ZP_SCRATCH_W2")
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assignVariableWord(assign.target, "P8ZP_SCRATCH_W2", DataType.UWORD)
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return true
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}
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else -> return false
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@ -2049,19 +2074,29 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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}
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private fun assignVariableWord(target: AsmAssignTarget, sourceName: String) {
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private fun assignVariableWord(target: AsmAssignTarget, sourceName: String, sourceDt: DataType) {
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require(sourceDt in WordDatatypes || sourceDt==DataType.UBYTE)
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when(target.kind) {
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TargetStorageKind.VARIABLE -> {
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asmgen.out("""
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lda $sourceName
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ldy $sourceName+1
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sta ${target.asmVarname}
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sty ${target.asmVarname}+1""")
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if(sourceDt==DataType.UBYTE) {
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asmgen.out(" lda $sourceName | sta ${target.asmVarname}")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz ${target.asmVarname}")
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else
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asmgen.out(" lda #0 | sta ${target.asmVarname}")
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}
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else
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asmgen.out("""
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lda $sourceName
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ldy $sourceName+1
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sta ${target.asmVarname}
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sty ${target.asmVarname}+1""")
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}
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TargetStorageKind.MEMORY -> {
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throw AssemblyError("assign word to memory ${target.memory} should have gotten a typecast")
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}
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TargetStorageKind.ARRAY -> {
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if(sourceDt==DataType.UBYTE) TODO("assign byte to word array")
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target.array!!
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if(target.constArrayIndexValue!=null) {
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val scaledIdx = target.constArrayIndexValue!! * program.memsizer.memorySize(target.datatype).toUInt()
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@ -2137,29 +2172,53 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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}
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TargetStorageKind.REGISTER -> {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" ldx $sourceName+1 | lda $sourceName")
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RegisterOrPair.AY -> asmgen.out(" ldy $sourceName+1 | lda $sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldy $sourceName+1 | ldx $sourceName")
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in Cx16VirtualRegisters -> {
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asmgen.out(
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"""
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lda $sourceName
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sta cx16.${target.register.toString().lowercase()}
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lda $sourceName+1
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sta cx16.${target.register.toString().lowercase()}+1
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""")
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if(sourceDt==DataType.UBYTE) {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" ldx #0 | lda $sourceName")
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RegisterOrPair.AY -> asmgen.out(" ldy #0 | lda $sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldy #0 | ldx $sourceName")
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in Cx16VirtualRegisters -> {
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asmgen.out(" lda $sourceName | sta cx16.${target.register.toString().lowercase()}")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz cx16.${target.register.toString().lowercase()}+1")
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else
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asmgen.out(" lda #0 | sta cx16.${target.register.toString().lowercase()}+1")
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}
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else -> throw AssemblyError("can't load word in a single 8-bit register")
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}
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} else {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" ldx $sourceName+1 | lda $sourceName")
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RegisterOrPair.AY -> asmgen.out(" ldy $sourceName+1 | lda $sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldy $sourceName+1 | ldx $sourceName")
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in Cx16VirtualRegisters -> {
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asmgen.out(
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"""
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lda $sourceName
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sta cx16.${target.register.toString().lowercase()}
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lda $sourceName+1
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sta cx16.${target.register.toString().lowercase()}+1
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""")
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}
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else -> throw AssemblyError("can't load word in a single 8-bit register")
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}
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else -> throw AssemblyError("can't load word in a single 8-bit register")
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}
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}
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TargetStorageKind.STACK -> {
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asmgen.out("""
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lda $sourceName
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sta P8ESTACK_LO,x
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lda $sourceName+1
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sta P8ESTACK_HI,x
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dex""")
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if(sourceDt==DataType.UBYTE) {
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asmgen.out(" lda $sourceName | sta P8ESTACK_LO,x")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz P8ESTACK_HI,x")
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else
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asmgen.out(" lda #0 | sta P8ESTACK_HI,x")
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}
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else
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asmgen.out("""
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lda $sourceName
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sta P8ESTACK_LO,x
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lda $sourceName+1
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sta P8ESTACK_HI,x
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dex""")
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}
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}
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}
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@ -5,11 +5,11 @@ package prog8.buildversion
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*/
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const val MAVEN_GROUP = "prog8"
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const val MAVEN_NAME = "compiler"
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const val VERSION = "9.1-SNAPSHOT"
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const val GIT_REVISION = 3930
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const val GIT_SHA = "b4e94ae4dd1c29a966bb5ea0454ab31f1e9863cb"
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const val GIT_DATE = "2023-07-05T21:15:04Z"
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const val VERSION = "9.2-SNAPSHOT"
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const val GIT_REVISION = 3964
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const val GIT_SHA = "aaa30e4a583fa7c8da61998cf7cbb2a60b52afb0"
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const val GIT_DATE = "2023-07-16T21:16:18Z"
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const val GIT_BRANCH = "master"
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const val BUILD_DATE = "2023-07-05T21:15:07Z"
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const val BUILD_UNIX_TIME = 1688591707834L
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const val BUILD_DATE = "2023-07-16T21:16:23Z"
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const val BUILD_UNIX_TIME = 1689542183583L
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const val DIRTY = 1
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@ -285,4 +285,37 @@ derp {
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compileText(VMTarget(), true, src, writeAssembly = true) shouldNotBe null
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compileText(Cx16Target(), true, src, writeAssembly = true) shouldNotBe null
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}
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test("prefix expressions with typecasting") {
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val src="""
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main
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{
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sub start()
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{
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uword uw = 54321
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ubyte ub = 123
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word sw = -12345
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byte sb = -123
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func_uw(~ub as uword)
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func_ub(~uw as ubyte)
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func_uw(~sb as uword)
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func_ub(~sw as ubyte)
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func_w(-sb as word)
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func_b(-sw as byte)
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}
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sub func_uw(uword arg) {
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}
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sub func_w(word arg) {
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}
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sub func_ub(ubyte arg) {
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}
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sub func_b(byte arg) {
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}
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}"""
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compileText(VMTarget(), false, src, writeAssembly = true) shouldNotBe null
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compileText(Cx16Target(), false, src, writeAssembly = true) shouldNotBe null
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}
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})
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@ -5,37 +5,22 @@ main
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{
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sub start()
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{
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uword zc = 54321
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ubyte zb = 123
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ubyte shift = 2
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uword uw = 54321
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ubyte ub = 123
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word sw = -12345
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byte sb = -123
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; txt.print_uw(zc<<shift)
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; txt.nl()
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; txt.print_uw(zc>>shift)
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; txt.nl()
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; txt.print_ub(zb<<shift)
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; txt.nl()
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; txt.print_ub(zb>>shift)
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; txt.nl()
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;
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; word szc = -12345
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; byte szb = -123
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; txt.print_w(szc<<shift)
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; txt.nl()
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; txt.print_w(szc>>shift)
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; txt.nl()
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; txt.print_b(szb<<shift)
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; txt.nl()
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; txt.print_b(szb>>shift)
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; txt.nl()
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;
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txt.print_uw(~zc as ubyte)
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txt.spc()
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txt.print_uw(~zb as uword)
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txt.print_uw(~ub as uword) ;132
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txt.nl()
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txt.print_ub(~uw as ubyte) ;206
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txt.nl()
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txt.print_uw(~sb as uword) ;122
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txt.nl()
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txt.print_ub(~sw as ubyte) ;56
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txt.nl()
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txt.print_w(-sb as word) ;123
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txt.nl()
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txt.print_b(-sw as byte) ;57
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txt.nl()
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; cx16.r1L = (zc<<shift) as ubyte
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; txt.print_ub(cx16.r1L)
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}
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}
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