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fix "fpReg1 out of bounds" crash for vm target for in-place float array assignment. #85

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This commit is contained in:
Irmen de Jong 2022-10-29 17:04:39 +02:00
parent 6d6db70e42
commit 5b35232ab4
5 changed files with 28 additions and 11 deletions
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2
codeGenIntermediate/src/prog8/codegen/intermediate/AssignmentGen.kt
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@ -239,7 +239,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
} else {
val indexReg = codeGen.registers.nextFree()
code += loadIndexReg(array, itemsize, indexReg, array.position)
code += IRInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, labelSymbol = variable)
code += IRInstruction(Opcode.STOREX, vmDt, reg1 = indexReg, fpReg1 = resultFpRegister, labelSymbol = variable)
}
} else {
if(fixedIndex!=null) {

11
codeGenIntermediate/src/prog8/codegen/intermediate/ExpressionGen.kt
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@ -58,7 +58,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
}
}
is PtTypeCast -> code += translate(expr, resultRegister, resultFpRegister)
is PtPrefix -> code += translate(expr, resultRegister)
is PtPrefix -> code += translate(expr, resultRegister, resultFpRegister)
is PtArrayIndexer -> code += translate(expr, resultRegister, resultFpRegister)
is PtBinaryExpression -> code += translate(expr, resultRegister, resultFpRegister)
is PtBuiltinFunctionCall -> code += codeGen.translateBuiltinFunc(expr, resultRegister)
@ -139,14 +139,17 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
return code
}
private fun translate(expr: PtPrefix, resultRegister: Int): IRCodeChunk {
private fun translate(expr: PtPrefix, resultRegister: Int, resultFpRegister: Int): IRCodeChunk {
val code = IRCodeChunk(expr.position)
code += translateExpression(expr.value, resultRegister, -1)
code += translateExpression(expr.value, resultRegister, resultFpRegister)
val vmDt = codeGen.irType(expr.type)
when(expr.operator) {
"+" -> { }
"-" -> {
code += IRInstruction(Opcode.NEG, vmDt, reg1=resultRegister)
if(vmDt==IRDataType.FLOAT)
code += IRInstruction(Opcode.NEG, vmDt, fpReg1 = resultFpRegister)
else
code += IRInstruction(Opcode.NEG, vmDt, reg1 = resultRegister)
}
"~" -> {
val mask = if(vmDt==IRDataType.BYTE) 0x00ff else 0xffff

6
codeOptimizers/src/prog8/optimizer/StatementOptimizer.kt
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@ -97,11 +97,13 @@ class StatementOptimizer(private val program: Program,
if(constvalue!=null) {
return if(constvalue.asBooleanValue){
// always true -> keep only if-part
errors.warn("condition is always true", ifElse.condition.position)
if(!ifElse.definingModule.isLibrary)
errors.warn("condition is always true", ifElse.condition.position)
listOf(IAstModification.ReplaceNode(ifElse, ifElse.truepart, parent))
} else {
// always false -> keep only else-part
errors.warn("condition is always false", ifElse.condition.position)
if(!ifElse.definingModule.isLibrary)
errors.warn("condition is always false", ifElse.condition.position)
listOf(IAstModification.ReplaceNode(ifElse, ifElse.elsepart, parent))
}
}

18
compiler/test/codegeneration/TestArrayInplaceAssign.kt
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@ -41,8 +41,7 @@ main {
compileText(VMTarget(), false, text, writeAssembly = true) shouldNotBe null
}
// TODO implement this in 6502 codegen, fix the fpReg1 out of bounds issue in vmcodegen, and re-enable test
xtest("array in-place negation (float type) - ignored for now because not implemented in codegen yet") {
test("array in-place negation (float type) vm target") {
val text = """
%import floats
@ -55,6 +54,21 @@ main {
}
}"""
compileText(VMTarget(), false, text, writeAssembly = true) shouldNotBe null
}
// TODO implement this in 6502 codegen and re-enable test
xtest("array in-place negation (float type) 6502 target") {
val text = """
%import floats
main {
float[10] flt
sub start() {
flt[1] = 42.42
flt[1] = -flt[1]
}
}"""
compileText(C64Target(), false, text, writeAssembly = true) shouldNotBe null
}

2
docs/source/todo.rst
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@ -3,8 +3,6 @@ TODO
For next release
^^^^^^^^^^^^^^^^
- fix flt[1] = -flt[1] compiler crash for vm target: fpReg1 out of bounds, re enable test in TestArrayInplaceAssign
- ir: asmsub contents remains blank in IR file
...