diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt
index 37c0c401e..ee3d53655 100644
--- a/codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt
+++ b/codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt
@@ -381,15 +381,9 @@ private fun optimizeStoreLoadSame(
         } else if(first=="phx" && second=="pla") {
             mods.add(Modification(lines[1].index, true, null))
             mods.add(Modification(lines[2].index, false, "  txa"))
-        } else if(first=="phx" && second=="ply") {
-            mods.add(Modification(lines[1].index, true, null))
-            mods.add(Modification(lines[2].index, false, "  txy"))
         } else if(first=="phy" && second=="pla") {
             mods.add(Modification(lines[1].index, true, null))
             mods.add(Modification(lines[2].index, false, "  tya"))
-        } else if(first=="phy" && second=="plx") {
-            mods.add(Modification(lines[1].index, true, null))
-            mods.add(Modification(lines[2].index, false, "  tyx"))
         }
     }
     return mods
diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
index fb2914cc2..e939c6867 100644
--- a/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
+++ b/codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
@@ -3040,7 +3040,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                     CpuRegister.X -> when(target.register!!) {
                         RegisterOrPair.A -> { asmgen.out("  txa") }
                         RegisterOrPair.X -> {  }
-                        RegisterOrPair.Y -> { asmgen.out("  txy") }
+                        RegisterOrPair.Y -> { asmgen.out("  stx  P8ZP_SCRATCH_REG |  ldy  P8ZP_SCRATCH_REG") }
                         RegisterOrPair.AY -> {
                             require(extendWord)
                             if(signed)
@@ -3090,7 +3090,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
                     }
                     CpuRegister.Y -> when(target.register!!) {
                         RegisterOrPair.A -> { asmgen.out("  tya") }
-                        RegisterOrPair.X -> { asmgen.out("  tyx") }
+                        RegisterOrPair.X -> { asmgen.out("  sty  P8ZP_SCRATCH_REG |  ldx  P8ZP_SCRATCH_REG") }
                         RegisterOrPair.Y -> { }
                         RegisterOrPair.AY -> {
                             require(extendWord)
diff --git a/docs/source/todo.rst b/docs/source/todo.rst
index d33c3fc21..4bfa84157 100644
--- a/docs/source/todo.rst
+++ b/docs/source/todo.rst
@@ -2,7 +2,6 @@
 TODO
 ====
 
-- fix "txy" and "tyx" non-existing instructions (assembler/experiment/* causes them to be used)
 - fix a1%a2 being parsed as directive
 - fix bitshift.p8
 - add crc8 and crc16 and crc32 to math