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fixed output of force_output blocks

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Irmen de Jong 2019-08-04 23:08:58 +02:00
parent e834924857
commit 6544fcdc36
1 changed files with 8 additions and 3 deletions
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11
compiler/src/prog8/compiler/target/c64/codegen2/AsmGen2.kt
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@ -149,7 +149,8 @@ internal class AsmGen2(val program: Program,
private fun block2asm(block: Block) { private fun block2asm(block: Block) {
out("\n; ---- block: '${block.name}' ----") out("\n; ---- block: '${block.name}' ----")
out("${block.name}\t.proc\n") // TODO not if force_output? out("${block.name}\t" + (if("force_output" in block.options()) ".block\n" else ".proc\n"))
if(block.address!=null) { if(block.address!=null) {
out(".cerror * > ${block.address.toHex()}, 'block address overlaps by ', *-${block.address.toHex()},' bytes'") out(".cerror * > ${block.address.toHex()}, 'block address overlaps by ', *-${block.address.toHex()},' bytes'")
out("* = ${block.address.toHex()}") out("* = ${block.address.toHex()}")
@ -166,7 +167,7 @@ internal class AsmGen2(val program: Program,
stmts.forEach { translate(it) } stmts.forEach { translate(it) }
subroutine.forEach { translateSubroutine(it as Subroutine) } subroutine.forEach { translateSubroutine(it as Subroutine) }
out("\n\t.pend\n") // TODO not if force_output? out(if("force_output" in block.options()) "\n\t.bend\n" else "\n\t.pend\n")
} }
private var generatedLabelSequenceNumber: Int = 0 private var generatedLabelSequenceNumber: Int = 0
@ -2471,8 +2472,12 @@ $endLabel""")
out(" lda #<$arrayVarName+$indexValue | ldy #>$arrayVarName+$indexValue | jsr c64flt.pop_float") out(" lda #<$arrayVarName+$indexValue | ldy #>$arrayVarName+$indexValue | jsr c64flt.pop_float")
} else { } else {
translateArrayIndexIntoA(targetArrayIdx) translateArrayIndexIntoA(targetArrayIdx)
out(" sta ${C64Zeropage.SCRATCH_REG} | asl a | asl a | clc | adc ${C64Zeropage.SCRATCH_REG}")
out(""" out("""
sta ${C64Zeropage.SCRATCH_REG}
asl a
asl a
clc
adc ${C64Zeropage.SCRATCH_REG}
tay tay
lda $constFloat lda $constFloat
sta $arrayVarName,y sta $arrayVarName,y