From 666d62dd7ae959543ac70d239c30085234c84e55 Mon Sep 17 00:00:00 2001 From: Irmen de Jong Date: Fri, 12 Aug 2022 17:27:58 +0200 Subject: [PATCH] fix cx16.r0 base address to be $04 on the C-64, and fix zeropage duplicate free addresses --- codeCore/src/prog8/code/target/atari/AtariZeropage.kt | 4 ++++ codeCore/src/prog8/code/target/c128/C128Zeropage.kt | 4 ++++ codeCore/src/prog8/code/target/c64/C64Zeropage.kt | 5 +++++ codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt | 4 ++++ compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt | 2 +- 5 files changed, 18 insertions(+), 1 deletion(-) diff --git a/codeCore/src/prog8/code/target/atari/AtariZeropage.kt b/codeCore/src/prog8/code/target/atari/AtariZeropage.kt index 7438d7b03..3606ec2f4 100644 --- a/codeCore/src/prog8/code/target/atari/AtariZeropage.kt +++ b/codeCore/src/prog8/code/target/atari/AtariZeropage.kt @@ -39,6 +39,10 @@ class AtariZeropage(options: CompilationOptions) : Zeropage(options) { } } + val distictFree = free.distinct() + free.clear() + free.addAll(distictFree) + removeReservedFromFreePool() } diff --git a/codeCore/src/prog8/code/target/c128/C128Zeropage.kt b/codeCore/src/prog8/code/target/c128/C128Zeropage.kt index 169419fcc..f6b0349fb 100644 --- a/codeCore/src/prog8/code/target/c128/C128Zeropage.kt +++ b/codeCore/src/prog8/code/target/c128/C128Zeropage.kt @@ -38,6 +38,10 @@ class C128Zeropage(options: CompilationOptions) : Zeropage(options) { } } + val distictFree = free.distinct() + free.clear() + free.addAll(distictFree) + removeReservedFromFreePool() } diff --git a/codeCore/src/prog8/code/target/c64/C64Zeropage.kt b/codeCore/src/prog8/code/target/c64/C64Zeropage.kt index a1f80e624..c7974d229 100644 --- a/codeCore/src/prog8/code/target/c64/C64Zeropage.kt +++ b/codeCore/src/prog8/code/target/c64/C64Zeropage.kt @@ -65,6 +65,10 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) { } } + val distictFree = free.distinct() + free.clear() + free.addAll(distictFree) + removeReservedFromFreePool() if(options.zeropage==ZeropageType.FULL || options.zeropage==ZeropageType.KERNALSAFE) { @@ -77,6 +81,7 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) { // Note: the 16 virtual registers R0-R15 are not regular allocated variables, they're *memory mapped* elsewhere to fixed addresses. // However, to be able for the compiler to "see" them as zero page variables, we have to register them here as well. // This is important because the compiler sometimes treats ZP variables more efficiently (for example if it's a pointer) + // The base addres is $04. Unfortunately it cannot be the same as on the Commander X16 ($02). for(reg in 0..15) { allocatedVariables[listOf("cx16", "r${reg}")] = ZpAllocation((4+reg*2).toUInt(), DataType.UWORD, 2) // cx16.r0 .. cx16.r15 allocatedVariables[listOf("cx16", "r${reg}s")] = ZpAllocation((4+reg*2).toUInt(), DataType.WORD, 2) // cx16.r0s .. cx16.r15s diff --git a/codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt b/codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt index 97597f949..10eca5cb4 100644 --- a/codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt +++ b/codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt @@ -43,6 +43,10 @@ class CX16Zeropage(options: CompilationOptions) : Zeropage(options) { else -> throw InternalCompilerException("for this machine target, zero page type 'floatsafe' is not available. ${options.zeropage}") } + val distictFree = free.distinct() + free.clear() + free.addAll(distictFree) + removeReservedFromFreePool() allocateCx16VirtualRegisters() diff --git a/compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt b/compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt index d8c30f90e..7bf6717bb 100644 --- a/compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt +++ b/compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt @@ -21,7 +21,7 @@ class AstPreprocessor(val program: Program, override fun before(program: Program): Iterable { if(options.compTarget.name==C64Target.NAME) { - relocateCx16VirtualRegisters(program, 0x0002u) // same address as CommanderX16 + relocateCx16VirtualRegisters(program, 0x0004u) // unfortunately, can't be the same address as CommanderX16 } else if(options.compTarget.name!=Cx16Target.NAME) { relocateCx16VirtualRegisters(program, options.compTarget.machine.ESTACK_HI)