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https://github.com/irmen/prog8.git
synced 2024-06-11 11:29:31 +00:00
fix & of pointervar indexing
This commit is contained in:
Irmen de Jong
parent
6a48de9a9f
commit
68669dbef0
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@ -665,6 +665,8 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
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}
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is PtAddressOf -> {
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val mem = PtMemoryByte(fcall.position)
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if((fcall.args[0] as PtAddressOf).isFromArrayElement)
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TODO("address-of arrayelement")
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if(msb) {
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val address = PtBinaryExpression("+", DataType.UWORD, fcall.args[0].position)
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address.add(fcall.args[0])
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@ -2522,67 +2522,87 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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private fun assignAddressOf(target: AsmAssignTarget, sourceName: String, arrayDt: DataType?, arrayIndexExpr: PtExpression?) {
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val offset = if(arrayIndexExpr!=null) {
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if(arrayIndexExpr!=null) {
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require(arrayDt !in SplitWordArrayTypes)
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val constIndex = arrayIndexExpr.asConstInteger()
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if(constIndex!=null) {
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if(arrayDt in SplitWordArrayTypes)
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constIndex
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else
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program.memsizer.memorySize(arrayDt!!, constIndex) // add arrayIndexExpr * elementsize to the address of the array variable.
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} else {
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val eltSize = if(arrayDt==DataType.UWORD) 1 else program.memsizer.memorySize(ArrayToElementTypes.getValue(arrayDt!!))
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assignExpressionToVariable(arrayIndexExpr, "P8ZP_SCRATCH_W1", DataType.UWORD)
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when(eltSize) {
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1 -> {}
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2 -> {
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if(arrayDt !in SplitWordArrayTypes)
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asmgen.out(" asl P8ZP_SCRATCH_W1 | rol P8ZP_SCRATCH_W1+1")
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}
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else -> TODO("address-of array element $sourceName size $eltSize with non-const index at ${target.position}")
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if (arrayDt == DataType.UWORD) {
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assignVariableToRegister(sourceName, RegisterOrPair.AY, false, arrayIndexExpr.definingISub(), arrayIndexExpr.position)
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if(constIndex>0)
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asmgen.out("""
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clc
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adc #$constIndex
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bne +
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iny
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+""")
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}
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else {
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if(constIndex>0) {
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val offset = program.memsizer.memorySize(arrayDt!!, constIndex) // add arrayIndexExpr * elementsize to the address of the array variable.
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asmgen.out(" lda #<($sourceName + $offset) | ldy #>($sourceName + $offset)")
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} else {
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asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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}
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}
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assignRegisterpairWord(target, RegisterOrPair.AY)
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return
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} else {
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if (arrayDt == DataType.UWORD) {
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assignVariableToRegister(sourceName, RegisterOrPair.AY, false, arrayIndexExpr.definingISub(), arrayIndexExpr.position)
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asmgen.saveRegisterStack(CpuRegister.A, false)
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asmgen.saveRegisterStack(CpuRegister.Y, false)
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assignExpressionToVariable(arrayIndexExpr, "P8ZP_SCRATCH_REG", DataType.UBYTE)
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asmgen.restoreRegisterStack(CpuRegister.Y, false)
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asmgen.restoreRegisterStack(CpuRegister.A, false)
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asmgen.out("""
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clc
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adc P8ZP_SCRATCH_REG
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bne +
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iny
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+""")
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}
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else {
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assignExpressionToRegister(arrayIndexExpr, RegisterOrPair.A, false)
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asmgen.out("""
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ldy #>$sourceName
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clc
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adc #<$sourceName
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bne +
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iny
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+""")
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}
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asmgen.out("""
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lda #<$sourceName
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clc
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adc P8ZP_SCRATCH_W1
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tax
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lda #>$sourceName
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adc P8ZP_SCRATCH_W1+1
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tay
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txa""")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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return
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}
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} else 0
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}
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// address of a normal variable
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when(target.kind) {
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TargetStorageKind.VARIABLE -> {
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asmgen.out("""
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lda #<$sourceName+$offset
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ldy #>$sourceName+$offset
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lda #<$sourceName
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ldy #>$sourceName
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sta ${target.asmVarname}
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sty ${target.asmVarname}+1
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""")
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sty ${target.asmVarname}+1""")
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}
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TargetStorageKind.MEMORY -> {
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throw AssemblyError("can't store word into memory byte")
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}
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TargetStorageKind.ARRAY -> {
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asmgen.out(" lda #<$sourceName+$offset | ldy #>$sourceName+$offset")
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asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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}
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TargetStorageKind.REGISTER -> {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" ldx #>$sourceName+$offset | lda #<$sourceName+$offset")
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RegisterOrPair.AY -> asmgen.out(" ldy #>$sourceName+$offset | lda #<$sourceName+$offset")
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RegisterOrPair.XY -> asmgen.out(" ldy #>$sourceName+$offset | ldx #<$sourceName+$offset")
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RegisterOrPair.AX -> asmgen.out(" ldx #>$sourceName | lda #<$sourceName")
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RegisterOrPair.AY -> asmgen.out(" ldy #>$sourceName | lda #<$sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldy #>$sourceName | ldx #<$sourceName")
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in Cx16VirtualRegisters -> {
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asmgen.out(
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"""
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lda #<$sourceName+$offset
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asmgen.out("""
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lda #<$sourceName
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ldy #>$sourceName
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sta cx16.${target.register.toString().lowercase()}
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lda #>$sourceName+$offset
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sta cx16.${target.register.toString().lowercase()}+1
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""")
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sty cx16.${target.register.toString().lowercase()}+1""")
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}
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else -> throw AssemblyError("can't load address in a single 8-bit register")
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}
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@ -89,16 +89,13 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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val result = mutableListOf<IRCodeChunkBase>()
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val resultRegister = codeGen.registers.nextFree()
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if(expr.isFromArrayElement) {
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require(expr.identifier.type !in SplitWordArrayTypes)
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addInstr(result, IRInstruction(Opcode.LOAD, vmDt, reg1 = resultRegister, labelSymbol = symbol), null)
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val indexTr2 = translateExpression(expr.arrayIndexExpr!!)
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addToResult(result, indexTr2, indexTr2.resultReg, -1)
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val indexWordReg = codeGen.registers.nextFree()
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addInstr(result, IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1=indexWordReg, reg2=indexTr2.resultReg), null)
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if(expr.identifier.type in SplitWordArrayTypes) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.ADDR, IRDataType.WORD, reg1=resultRegister, reg2=indexWordReg)
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}
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} else if(expr.identifier.type == DataType.UWORD) {
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if(expr.identifier.type == DataType.UWORD) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOADM, vmDt, reg1 = resultRegister, labelSymbol = symbol)
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it += IRInstruction(Opcode.ADDR, IRDataType.WORD, reg1=resultRegister, reg2=indexWordReg)
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@ -604,10 +604,12 @@ internal class AstChecker(private val program: Program,
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override fun visit(addressOf: AddressOf) {
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checkLongType(addressOf)
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val variable=addressOf.identifier.targetVarDecl(program)
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if(variable!=null && variable.type==VarDeclType.CONST && addressOf.arrayIndex==null) errors.err(
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"invalid pointer-of operand type",
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addressOf.position
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)
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if (variable!=null) {
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if (variable.type == VarDeclType.CONST && addressOf.arrayIndex == null)
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errors.err("invalid pointer-of operand type",addressOf.position)
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if (variable.splitArray)
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errors.err("cannot take address of split word array",addressOf.position)
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}
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super.visit(addressOf)
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}
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@ -533,11 +533,7 @@ class IntermediateAstMaker(private val program: Program, private val errors: IEr
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private fun transform(src: AddressOf): PtAddressOf {
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val addr = PtAddressOf(src.position)
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val (name, dt) = src.identifier.targetNameAndType(program)
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if(dt in SplitWordArrayTypes)
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addr.add(PtIdentifier(name+"_lsb", dt, src.identifier.position)) // NOTE: assumes _lsb is first in memory! (immediately followed by _msb)
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else
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addr.add(transform(src.identifier))
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addr.add(transform(src.identifier))
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if(src.arrayIndex!=null)
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addr.add(transformExpression(src.arrayIndex!!.indexExpr))
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return addr
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@ -262,6 +262,13 @@ internal class StatementReorderer(
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if(!errors.noErrors())
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return noModifications
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if(sourceVar.splitArray && targetVar.splitArray)
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TODO("copy split to split array")
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if(sourceVar.splitArray)
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TODO("copy from split source array to normal")
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if(targetVar.splitArray)
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TODO("copy from normal to split source array")
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val numelements = targetVar.arraysize!!.constIndex()!!
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val eltsize = program.memsizer.memorySize(ArrayToElementTypes.getValue(sourceVar.datatype))
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val memcopy = FunctionCallStatement(IdentifierReference(listOf("sys", "memcopy"), assign.position),
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@ -1,8 +1,8 @@
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TODO
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====
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&pointervar[x] isn't the correct value (6502, IR is fixed)
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@(s) where s is a str parameter, doesn't work
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fix TODO's to assign from and to split arrays (StatementReorderer) -- cannot use simple single memcopy here (6502 + IR)
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assembler, imageviewer is bigger than before (since commit "added string.lstripped() and string.ltrimmed()" )
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(after merge in boolean): move all "OperatorXinplace" from expressionGen to AssignmentGen, see if we can get rid of the Result return type.
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@ -6,18 +6,28 @@
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main {
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sub start() {
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foo("zzz")
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str name1 = "name1"
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str name2 = "name2"
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uword[] @split names = [name1, name2, "name3"]
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uword[] addresses = [0,0,0]
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names = [1111,2222,3333]
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addresses = names
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;foo("zzz")
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}
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sub foo (str sarg) {
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str svar = "irmen"
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ubyte[3] svar
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txt.print_uwhex(svar, true)
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txt.nl()
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txt.print_uwhex(&svar, true)
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txt.nl()
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txt.print_uwhex(&svar[2], true)
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txt.nl()
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cx16.r1L = 3
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txt.print_uwhex(&svar[cx16.r1L], true)
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txt.nl()
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txt.nl()
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txt.print_uwhex(sarg, true)
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txt.nl()
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txt.print_uwhex(&sarg, true)
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@ -27,5 +37,9 @@ main {
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cx16.r0 = &sarg[2]
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txt.print_uwhex(cx16.r0, true) ; TODO should be the same as the previous one sarg+2 (13)!
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txt.nl()
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cx16.r1L=3
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cx16.r0 = &sarg[cx16.r1L]
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txt.print_uwhex(cx16.r0, true) ; TODO should be the same as the previous one sarg+2 (13)!
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txt.nl()
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}
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}
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