ir: get rid of '_' symbol prefix

This commit is contained in:
Irmen de Jong 2022-11-03 20:17:55 +01:00
parent 562d722ad5
commit 6f67fc0e02
6 changed files with 32 additions and 31 deletions

View File

@ -257,6 +257,8 @@ class IRCodeGen(
sub.retvalRegisters,
sub.inline,
sub.position)
if(sub.children.isNotEmpty())
renamedSub.add(sub.children.single())
parent.children.remove(sub)
parent.add(renamedSub)
@ -1091,6 +1093,11 @@ class IRCodeGen(
irBlock += sub
}
is PtAsmSub -> {
if(child.address!=null) {
// romsub. No codegen needed: calls to this are jumping straight to the address.
require(child.children.isEmpty())
} else {
// regular asmsub
val assemblyChild = child.children.single() as PtInlineAssembly
val asmChunk = IRInlineAsmChunk(
child.name, assemblyChild.assembly, assemblyChild.isIR, null
@ -1105,6 +1112,7 @@ class IRCodeGen(
child.position
)
}
}
is PtInlineAssembly -> {
irBlock += IRInlineAsmChunk(null, child.assembly, child.isIR, null)
}

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@ -3,9 +3,6 @@ TODO
For next release
^^^^^^^^^^^^^^^^
- ir: get rid of '_' label prefix?
- fix expericodegen (ir code gen for regular cx16 target)
...
@ -21,7 +18,12 @@ Future Things and Ideas
Compiler:
- create BSS section in output program and put StStaticVariables in there with bss=true. Don't forget to add init code to zero out everything that was put in bss. If array in bss->only zero ONCE! So requires self-modifying code
- ir: mechanism to determine for chunks which registers are getting input values from "outside"
- ir: mechanism to determine for chunks which registers are passing values out? (i.e. are used again in another chunk)
- ir: peephole opt: renumber registers in chunks to start with 1 again every time (but keep entry values in mind!)
- ir peephole opt: reuse registers in chunks (but keep result registers in mind that pass values out!)
- ir: add more optimizations in IRPeepholeOptimizer
- ir: write addresses as hex into p8ir file
- see if we can let for loops skip the loop if end<start, like other programming languages. Without adding a lot of code size/duplicating the loop condition.
this is documented behavior to now loop around but it's too easy to forget about!
Lot of work because of so many special cases in ForLoopsAsmgen.....

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@ -815,10 +815,7 @@ data class IRInstruction(
result.add(",")
}
labelSymbol?.let {
if(it.startsWith('&'))
result.add(it) // address-of something
else
result.add("_$it")
result.add(it)
}
if(result.last() == ",")
result.removeLast()

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@ -269,7 +269,7 @@ class IRAsmSubroutine(
private val registersUsed by lazy { registersUsedInAssembly(asmChunk.isIR, asmChunk.assembly) }
fun usedRegisters() = registersUsed
fun isEmpty(): Boolean = asmChunk.isEmpty()
fun isEmpty(): Boolean = if(address==null) asmChunk.isEmpty() else false
}
sealed class IRCodeChunkBase(val label: String?, var next: IRCodeChunkBase?) {

View File

@ -125,12 +125,7 @@ fun parseIRCodeLine(line: String, location: Pair<IRCodeChunk, Int>?, placeholder
var labelSymbol: String? = null
fun parseValueOrPlaceholder(operand: String, location: Pair<IRCodeChunk, Int>?, rest: String, restIndex: Int): Float? {
return if(operand.startsWith('_')) {
labelSymbol = rest.split(",")[restIndex].trim().drop(1)
if(location!=null)
placeholders[location] = labelSymbol!!
null
} else if(operand[0].isLetter()) {
return if(operand[0].isLetter()) {
labelSymbol = rest.split(",")[restIndex].trim()
if(location!=null)
placeholders[location] = labelSymbol!!
@ -229,8 +224,7 @@ fun parseIRCodeLine(line: String, location: Pair<IRCodeChunk, Int>?, placeholder
floatValue = value
if(opcode in OpcodesForCpuRegisters) {
val regStr = rest.split(',').last().lowercase().trim()
val reg = if(regStr.startsWith('_')) regStr.substring(1) else regStr
val reg = rest.split(',').last().lowercase().trim()
if(reg !in setOf(
"a", "x", "y",
"ax", "ay", "xy",

View File

@ -43,7 +43,7 @@ class TestInstructions: FunSpec({
ins.reg2 shouldBe null
ins.value shouldBe null
ins.labelSymbol shouldBe "a.b.c"
ins.toString() shouldBe "bz.w r11,_a.b.c"
ins.toString() shouldBe "bz.w r11,a.b.c"
}
test("with output registers") {