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bugfix in direct memory assignment

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This commit is contained in:
Irmen de Jong 2020-08-20 17:02:22 +02:00
parent 6f3b2749b0
commit 7a3163f59a
2 changed files with 14 additions and 20 deletions
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30
compiler/src/prog8/compiler/target/c64/codegen/AssignmentAsmGen.kt
View File

@ -303,18 +303,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
popAndWriteArrayvalueWithIndexA(arrayDt, targetName) popAndWriteArrayvalueWithIndexA(arrayDt, targetName)
} }
target.memoryAddress != null -> { target.memoryAddress != null -> {
val addressExpr = target.memoryAddress.addressExpression storeByteViaRegisterAInMemoryAddress(sourceName, target.memoryAddress)
val addressLv = addressExpr as? NumericLiteralValue
when {
addressLv != null -> asmgen.out(" lda $sourceName | sta ${addressLv.number.toHex()}")
addressExpr is IdentifierReference -> {
val targetName = asmgen.asmIdentifierName(addressExpr)
asmgen.out(" lda $sourceName | sta $targetName")
}
else -> {
storeByteViaRegisterAInMemoryAddress(sourceName, target.memoryAddress)
}
}
} }
else -> throw AssemblyError("no asm gen for assign bytevar to $target") else -> throw AssemblyError("no asm gen for assign bytevar to $target")
} }
@ -497,6 +486,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
val targetIdent = target.identifier val targetIdent = target.identifier
val targetArrayIdx = target.arrayindexed val targetArrayIdx = target.arrayindexed
val targetMemory = target.memoryAddress val targetMemory = target.memoryAddress
// TODO all via method?
when { when {
targetIdent != null -> { targetIdent != null -> {
val targetName = asmgen.asmIdentifierName(targetIdent) val targetName = asmgen.asmIdentifierName(targetIdent)
@ -623,6 +613,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
private fun assignFromMemoryByte(target: AssignTarget, address: Int?, identifier: IdentifierReference?) { private fun assignFromMemoryByte(target: AssignTarget, address: Int?, identifier: IdentifierReference?) {
val targetIdent = target.identifier val targetIdent = target.identifier
val targetArrayIdx = target.arrayindexed val targetArrayIdx = target.arrayindexed
val targetMemory = target.memoryAddress
if (address != null) { if (address != null) {
when { when {
targetIdent != null -> { targetIdent != null -> {
@ -632,8 +623,8 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
sta $targetName sta $targetName
""") """)
} }
target.memoryAddress != null -> { targetMemory != null -> {
storeByteViaRegisterAInMemoryAddress(address.toHex(), target.memoryAddress) storeByteViaRegisterAInMemoryAddress(address.toHex(), targetMemory)
} }
targetArrayIdx != null -> { targetArrayIdx != null -> {
val index = targetArrayIdx.arrayspec.index val index = targetArrayIdx.arrayspec.index
@ -649,14 +640,15 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
val targetName = asmgen.asmIdentifierName(targetIdent) val targetName = asmgen.asmIdentifierName(targetIdent)
asmgen.out(""" asmgen.out("""
lda $sourceName lda $sourceName
sta (+) + 1 sta ${C64Zeropage.SCRATCH_W1}
lda $sourceName+1 lda $sourceName+1
sta (+) + 2 sta ${C64Zeropage.SCRATCH_W1+1}
+ lda ${'$'}ffff\t; modified ldy #0
lda (${C64Zeropage.SCRATCH_W1}),y
sta $targetName""") sta $targetName""")
} }
target.memoryAddress != null -> { targetMemory != null -> {
storeByteViaRegisterAInMemoryAddress(sourceName, target.memoryAddress) storeByteViaRegisterAInMemoryAddress(sourceName, targetMemory)
} }
targetArrayIdx != null -> { targetArrayIdx != null -> {
val index = targetArrayIdx.arrayspec.index val index = targetArrayIdx.arrayspec.index

4
examples/test.p8
View File

@ -9,7 +9,9 @@ main {
ubyte A=5 ubyte A=5
uword clr = $d020 uword clr = $d020
@(clr+1) = A A = @(clr)
A++
@(clr) = A
; uword xx = @(clr+1) ; uword xx = @(clr+1)
} }