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Optimize in-place word subtraction and negation
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parent
73dfb5f443
commit
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@ -1157,17 +1157,16 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
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+""")
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else
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asmgen.out("""
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ldy #0
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ldy #255
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lda $otherName
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bpl +
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dey ; sign extend
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+ sty P8ZP_SCRATCH_B1
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lda $name
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iny ; sign extend
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+ eor #255
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sec
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sbc $otherName
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adc $name
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sta $name
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lda $name+1
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sbc P8ZP_SCRATCH_B1
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tya
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adc $name+1
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sta $name+1""")
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}
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"*" -> {
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@ -1439,29 +1438,28 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
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sta $name+1""")
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}
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"-" -> {
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asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_REG", valueDt, null)
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asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_B1", valueDt, null)
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if(valueDt==DataType.UBYTE)
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asmgen.out("""
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lda $name
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sec
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sbc P8ZP_SCRATCH_REG
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sbc P8ZP_SCRATCH_B1
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sta $name
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bcs +
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dec $name+1
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+""")
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else
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asmgen.out("""
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ldy #0
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lda P8ZP_SCRATCH_REG
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ldy #255
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lda P8ZP_SCRATCH_B1
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bpl +
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dey ; sign extend
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+ sty P8ZP_SCRATCH_B1
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lda $name
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iny ; sign extend
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+ eor #255
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sec
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sbc P8ZP_SCRATCH_REG
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adc $name
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sta $name
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lda $name+1
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sbc P8ZP_SCRATCH_B1
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tya
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adc $name+1
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sta $name+1""")
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}
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"*" -> {
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@ -2098,40 +2096,38 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
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when(target.register!!) { //P8ZP_SCRATCH_REG
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RegisterOrPair.AX -> {
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asmgen.out("""
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sta P8ZP_SCRATCH_REG
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stx P8ZP_SCRATCH_REG+1
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lda #0
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sec
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sbc P8ZP_SCRATCH_REG
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eor #255
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adc #0
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pha
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lda #0
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sbc P8ZP_SCRATCH_REG+1
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txa
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eor #255
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adc #0
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tax
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pla""")
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}
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RegisterOrPair.AY -> {
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asmgen.out("""
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sta P8ZP_SCRATCH_REG
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sty P8ZP_SCRATCH_REG+1
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lda #0
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sec
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sbc P8ZP_SCRATCH_REG
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eor #255
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adc #0
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pha
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lda #0
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sbc P8ZP_SCRATCH_REG+1
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tya
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eor #255
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adc #0
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tay
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pla""")
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}
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RegisterOrPair.XY -> {
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asmgen.out("""
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stx P8ZP_SCRATCH_REG
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sty P8ZP_SCRATCH_REG+1
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lda #0
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sec
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sbc P8ZP_SCRATCH_REG
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txa
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eor #255
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adc #0
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tax
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lda #0
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sbc P8ZP_SCRATCH_REG+1
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tya
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eor #255
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adc #0
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tay""")
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}
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in Cx16VirtualRegisters -> throw AssemblyError("cx16 virtual regs should be variables, not real registers")
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