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preparing version 9.0
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9.0-dev
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9.0
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@ -26,6 +26,7 @@ Compiler:
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global initialization values are simply a list of LOAD instructions.
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global initialization values are simply a list of LOAD instructions.
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Variables replaced include all subroutine parameters! So the only variables that remain as variables are arrays and strings.
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Variables replaced include all subroutine parameters! So the only variables that remain as variables are arrays and strings.
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- ir: add more optimizations in IRPeepholeOptimizer
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- ir: add more optimizations in IRPeepholeOptimizer
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- ir: the @split arrays are also split in _lsb/_msb arrays in the IR, and operations take multiple (byte) instructions that may lead to verbose and slow operation and machine code generation down the line.
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- ir: for expressions with array indexes that occur multiple times, can we avoid loading them into new virtualregs everytime and just reuse a single virtualreg as indexer? (simple form of common subexpression elimination)
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- ir: for expressions with array indexes that occur multiple times, can we avoid loading them into new virtualregs everytime and just reuse a single virtualreg as indexer? (simple form of common subexpression elimination)
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- PtAst/IR: more complex common subexpression eliminations
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- PtAst/IR: more complex common subexpression eliminations
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- generate WASM to eventually run prog8 on a browser canvas? Use binaryen toolkit or my binaryen kotlin library?
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- generate WASM to eventually run prog8 on a browser canvas? Use binaryen toolkit or my binaryen kotlin library?
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@ -35,7 +36,7 @@ Compiler:
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But all library code written in asm uses .proc already..... (textual search/replace when writing the actual asm?)
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But all library code written in asm uses .proc already..... (textual search/replace when writing the actual asm?)
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Once new codegen is written that is based on the IR, this point is mostly moot anyway as that will have its own dead code removal on the IR level.
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Once new codegen is written that is based on the IR, this point is mostly moot anyway as that will have its own dead code removal on the IR level.
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- Zig-like try-based error handling where the V flag could indicate error condition? and/or BRK to jump into monitor on failure? (has to set BRK vector for that) But the V flag is also set on certain normal instructions
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- Zig-like try-based error handling where the V flag could indicate error condition? and/or BRK to jump into monitor on failure? (has to set BRK vector for that) But the V flag is also set on certain normal instructions
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- For c128 target; put floating point variables in bank 1 to make the FP routines work (is this even worth it? very few people will use fp)
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Libraries:
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Libraries:
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@ -126,7 +126,7 @@ class IRFileWriter(private val irProgram: IRProgram, outfileOverride: Path?) {
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private fun writeCodeChunk(chunk: IRCodeChunk) {
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private fun writeCodeChunk(chunk: IRCodeChunk) {
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xml.writeStartElement("CODE")
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xml.writeStartElement("CODE")
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chunk.label?.let { xml.writeAttribute("LABEL", chunk.label) }
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chunk.label?.let { xml.writeAttribute("LABEL", chunk.label) }
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xml.writeAttribute("used-registers", chunk.usedRegisters().toString())
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// xml.writeAttribute("used-registers", chunk.usedRegisters().toString())
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xml.writeCharacters("\n")
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xml.writeCharacters("\n")
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chunk.instructions.forEach { instr ->
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chunk.instructions.forEach { instr ->
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numInstr++
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numInstr++
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@ -97,18 +97,18 @@ bgesr reg1, reg2, address - jump to location in program given by l
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ble reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (unsigned)
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ble reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (unsigned)
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bles reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (signed)
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bles reg1, value, address - jump to location in program given by location, if reg1 <= immediate value (signed)
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( NOTE: there are no bltr/bler instructions because these are equivalent to bgtr/bger with the register operands swapped around.)
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( NOTE: there are no bltr/bler instructions because these are equivalent to bgtr/bger with the register operands swapped around.)
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sz reg1, reg2 - set reg1=1.b if reg2==0, otherwise set reg1=0.b
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sz reg1, reg2 - set reg1=1.b if reg2==0, else 0.b
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snz reg1, reg2 - set reg1=1.b if reg2!=0, otherwise set reg1=0.b
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snz reg1, reg2 - set reg1=1.b if reg2!=0, else 0.b
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seq reg1, reg2 - set reg1=1.b if reg1 == reg2, otherwise set reg1=0.b
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seq reg1, reg2 - set reg1=1.b if reg1 == reg2, else 0.b
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sne reg1, reg2 - set reg1=1.b if reg1 != reg2, otherwise set reg1=0.b
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sne reg1, reg2 - set reg1=1.b if reg1 != reg2, else 0.b
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slt reg1, reg2 - set reg1=1.b if reg1 < reg2 (unsigned), otherwise set reg1=0.b
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slt reg1, reg2 - set reg1=1.b if reg1 < reg2 (unsigned), else 0.b
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slts reg1, reg2 - set reg1=1.b if reg1 < reg2 (signed), otherwise set reg1=0.b
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slts reg1, reg2 - set reg1=1.b if reg1 < reg2 (signed), else 0.b
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sle reg1, reg2 - set reg1=1.b if reg1 <= reg2 (unsigned), otherwise set reg1=0.b
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sle reg1, reg2 - set reg1=1.b if reg1 <= reg2 (unsigned), else 0.b
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sles reg1, reg2 - set reg1=1.b if reg1 <= reg2 (signed), otherwise set reg1=0.b
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sles reg1, reg2 - set reg1=1.b if reg1 <= reg2 (signed), else 0.b
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sgt reg1, reg2 - set reg1=1.b if reg1 > reg2 (unsigned), otherwise set reg1=0.b
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sgt reg1, reg2 - set reg1=1.b if reg1 > reg2 (unsigned), else 0.b
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sgts reg1, reg2 - set reg1=1.b if reg1 > reg2 (signed), otherwise set reg1=0.b
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sgts reg1, reg2 - set reg1=1.b if reg1 > reg2 (signed), else 0.b
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sge reg1, reg2 - set reg1=1.b if reg1 >= reg2 (unsigned), otherwise set reg1=0.b
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sge reg1, reg2 - set reg1=1.b if reg1 >= reg2 (unsigned), else 0.b
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sges reg1, reg2 - set reg1=1.b if reg1 >= reg2 (signed), otherwise set reg1=0.b
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sges reg1, reg2 - set reg1=1.b if reg1 >= reg2 (signed), else 0.b
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ARITHMETIC
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ARITHMETIC
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