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clarified isInRegularRAM() by making it an extension method on AssignTarget
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@ -9,6 +9,7 @@ import prog8.ast.statements.*
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import prog8.ast.walk.AstWalker
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import prog8.ast.walk.IAstModification
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import prog8.ast.walk.IAstVisitor
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import prog8.compiler.astprocessing.isInRegularRAMof
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import prog8.compiler.target.ICompilationTarget
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@ -39,7 +40,7 @@ internal class BeforeAsmGenerationAstChanger(val program: Program, val errors: I
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// But it can only be done if the target variable IS NOT OCCURRING AS AN OPERAND ITSELF.
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if(!assignment.isAugmentable
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&& assignment.target.identifier != null
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&& compTarget.isInRegularRAM(assignment.target)) {
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&& assignment.target.isInRegularRAMof(compTarget.machine)) {
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val binExpr = assignment.value as? BinaryExpression
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if (binExpr != null && binExpr.operator !in comparisonOperators) {
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if (binExpr.left !is BinaryExpression) {
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@ -3,10 +3,9 @@ package prog8.compiler.astprocessing
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import prog8.ast.Node
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import prog8.ast.Program
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import prog8.ast.base.DataType
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import prog8.ast.expressions.CharLiteral
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import prog8.ast.expressions.NumericLiteralValue
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import prog8.ast.expressions.RangeExpr
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import prog8.ast.expressions.StringLiteralValue
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import prog8.ast.base.VarDeclType
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import prog8.ast.expressions.*
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import prog8.ast.statements.AssignTarget
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import prog8.ast.statements.Directive
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import prog8.ast.walk.AstWalker
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import prog8.ast.walk.IAstModification
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@ -15,6 +14,7 @@ import prog8.compiler.CompilationOptions
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import prog8.compiler.IErrorReporter
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import prog8.compiler.IStringEncoding
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import prog8.compiler.target.ICompilationTarget
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import prog8.compiler.target.IMachineDefinition
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import kotlin.math.abs
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@ -165,3 +165,47 @@ internal fun Program.moveMainAndStartToFirst() {
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modules[0].statements.add(0, directive)
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}
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}
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internal fun AssignTarget.isInRegularRAMof(machine: IMachineDefinition): Boolean {
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val memAddr = memoryAddress
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val arrayIdx = arrayindexed
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val ident = identifier
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when {
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memAddr != null -> {
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return when (memAddr.addressExpression) {
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is NumericLiteralValue -> {
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machine.isRegularRAMaddress((memAddr.addressExpression as NumericLiteralValue).number.toInt())
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}
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is IdentifierReference -> {
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val program = definingModule.program
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val decl = (memAddr.addressExpression as IdentifierReference).targetVarDecl(program)
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if ((decl?.type == VarDeclType.VAR || decl?.type == VarDeclType.CONST) && decl.value is NumericLiteralValue)
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machine.isRegularRAMaddress((decl.value as NumericLiteralValue).number.toInt())
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else
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false
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}
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else -> false
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}
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}
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arrayIdx != null -> {
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val program = definingModule.program
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val targetStmt = arrayIdx.arrayvar.targetVarDecl(program)
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return if (targetStmt?.type == VarDeclType.MEMORY) {
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val addr = targetStmt.value as? NumericLiteralValue
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if (addr != null)
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machine.isRegularRAMaddress(addr.number.toInt())
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else
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false
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} else true
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}
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ident != null -> {
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val program = definingModule.program
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val decl = ident.targetVarDecl(program)!!
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return if (decl.type == VarDeclType.MEMORY && decl.value is NumericLiteralValue)
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machine.isRegularRAMaddress((decl.value as NumericLiteralValue).number.toInt())
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else
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true
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}
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else -> return true
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}
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}
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@ -24,51 +24,6 @@ interface ICompilationTarget: IStringEncoding, IMemSizer {
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val machine: IMachineDefinition
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override fun encodeString(str: String, altEncoding: Boolean): List<Short>
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override fun decodeString(bytes: List<Short>, altEncoding: Boolean): String
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// TODO: rename param target, and also AST node AssignTarget - *different meaning of "target"!*
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fun isInRegularRAM(target: AssignTarget): Boolean {
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val memAddr = target.memoryAddress
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val arrayIdx = target.arrayindexed
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val ident = target.identifier
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when {
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memAddr != null -> {
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return when (memAddr.addressExpression) {
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is NumericLiteralValue -> {
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machine.isRegularRAMaddress((memAddr.addressExpression as NumericLiteralValue).number.toInt())
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}
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is IdentifierReference -> {
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val program = target.definingModule.program
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val decl = (memAddr.addressExpression as IdentifierReference).targetVarDecl(program)
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if ((decl?.type == VarDeclType.VAR || decl?.type == VarDeclType.CONST) && decl.value is NumericLiteralValue)
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machine.isRegularRAMaddress((decl.value as NumericLiteralValue).number.toInt())
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else
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false
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}
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else -> false
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}
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}
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arrayIdx != null -> {
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val program = target.definingModule.program
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val targetStmt = arrayIdx.arrayvar.targetVarDecl(program)
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return if (targetStmt?.type == VarDeclType.MEMORY) {
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val addr = targetStmt.value as? NumericLiteralValue
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if (addr != null)
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machine.isRegularRAMaddress(addr.number.toInt())
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else
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false
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} else true
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}
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ident != null -> {
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val program = target.definingModule.program
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val decl = ident.targetVarDecl(program)!!
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return if (decl.type == VarDeclType.MEMORY && decl.value is NumericLiteralValue)
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machine.isRegularRAMaddress((decl.value as NumericLiteralValue).number.toInt())
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else
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true
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}
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else -> return true
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}
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}
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}
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@ -9,6 +9,7 @@ import prog8.ast.statements.AssignTarget
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import prog8.ast.statements.Assignment
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import prog8.ast.walk.AstWalker
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import prog8.ast.walk.IAstModification
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import prog8.compiler.astprocessing.isInRegularRAMof
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import prog8.compiler.target.ICompilationTarget
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@ -79,7 +80,7 @@ X = BinExpr X = LeftExpr
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private fun isSimpleTarget(target: AssignTarget) =
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if (target.identifier!=null || target.memoryAddress!=null)
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compTarget.isInRegularRAM(target)
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target.isInRegularRAMof(compTarget.machine)
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else
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false
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@ -10,6 +10,7 @@ import prog8.ast.statements.*
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import prog8.ast.walk.AstWalker
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import prog8.ast.walk.IAstModification
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import prog8.compiler.IErrorReporter
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import prog8.compiler.astprocessing.isInRegularRAMof
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import prog8.compiler.target.ICompilationTarget
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@ -122,7 +123,7 @@ internal class UnusedCodeRemover(private val program: Program,
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val assign1 = stmtPairs[0] as? Assignment
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val assign2 = stmtPairs[1] as? Assignment
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if (assign1 != null && assign2 != null && !assign2.isAugmentable) {
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if (assign1.target.isSameAs(assign2.target, program) && compTarget.isInRegularRAM(assign1.target)) {
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if (assign1.target.isSameAs(assign2.target, program) && assign1.target.isInRegularRAMof(compTarget.machine)) {
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if(assign2.target.identifier==null || !assign2.value.referencesIdentifier(*(assign2.target.identifier!!.nameInSource.toTypedArray())))
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// only remove the second assignment if its value is a simple expression!
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when(assign2.value) {
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@ -12,6 +12,7 @@ import prog8.ast.expressions.IdentifierReference
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import prog8.ast.expressions.NumericLiteralValue
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import prog8.ast.expressions.PrefixExpression
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import prog8.ast.statements.*
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import prog8.compiler.astprocessing.isInRegularRAMof
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import prog8.compiler.target.C64Target
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import prog8.parser.SourceCode
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import prog8tests.helpers.DummyFunctions
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@ -28,23 +29,23 @@ class TestMemory {
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var memexpr = NumericLiteralValue.optimalInteger(0x0000, Position.DUMMY)
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var target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0x1000, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0x9fff, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0xc000, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0xcfff, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -52,19 +53,19 @@ class TestMemory {
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var memexpr = NumericLiteralValue.optimalInteger(0xa000, Position.DUMMY)
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var target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0xafff, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0xd000, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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memexpr = NumericLiteralValue.optimalInteger(0xffff, Position.DUMMY)
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target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -72,15 +73,15 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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var target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.VAR)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.VAR)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.CONST)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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target = createTestProgramForMemoryRefViaVar(program, 0xd020, VarDeclType.CONST)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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target = createTestProgramForMemoryRefViaVar(program, 0x1000, VarDeclType.MEMORY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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}
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private fun createTestProgramForMemoryRefViaVar(program: Program, address: Int, vartype: VarDeclType): AssignTarget {
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@ -98,7 +99,7 @@ class TestMemory {
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fun testInValidRamC64_memory_expression() {
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val memexpr = PrefixExpression("+", NumericLiteralValue.optimalInteger(0x1000, Position.DUMMY), Position.DUMMY)
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val target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -111,7 +112,7 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -125,7 +126,7 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -139,7 +140,7 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -153,7 +154,7 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -168,7 +169,7 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertTrue(C64Target.isInRegularRAM(target))
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assertTrue(target.isInRegularRAMof(C64Target.machine))
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}
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@Test
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@ -183,6 +184,6 @@ class TestMemory {
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val program = Program("test", DummyFunctions, DummyMemsizer)
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.addModule(module)
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module.linkIntoProgram(program)
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assertFalse(C64Target.isInRegularRAM(target))
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assertFalse(target.isInRegularRAMof(C64Target.machine))
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}
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}
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