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https://github.com/irmen/prog8.git
synced 2024-12-24 01:29:28 +00:00
fix some split array issues in 6502 codegen
This commit is contained in:
parent
d61283a8bc
commit
82898f7bba
@ -747,9 +747,6 @@ internal class ExpressionsAsmGen(private val program: PtProgram,
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val elementDt = arrayExpr.type
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val arrayVarName = asmgen.asmVariableName(arrayExpr.variable)
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if(arrayExpr.splitWords)
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TODO("split words ${arrayExpr.position}")
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if(arrayExpr.variable.type==DataType.UWORD) {
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// indexing a pointer var instead of a real array or string
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if(elementDt !in ByteDatatypes)
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@ -767,6 +764,9 @@ internal class ExpressionsAsmGen(private val program: PtProgram,
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return
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}
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if(arrayExpr.splitWords)
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TODO("split words expression ${arrayExpr.position}")
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val constIndexNum = arrayExpr.index.asConstInteger()
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if(constIndexNum!=null) {
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val indexValue = constIndexNum * program.memsizer.memorySize(elementDt)
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@ -543,6 +543,11 @@ internal class ProgramAndVarsGen(
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DataType.UWORD -> asmgen.out("${variable.name}\t.word ?")
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DataType.WORD -> asmgen.out("${variable.name}\t.sint ?")
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DataType.FLOAT -> asmgen.out("${variable.name}\t.fill ${compTarget.machine.FLOAT_MEM_SIZE}")
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in SplitWordArrayTypes -> {
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val numbytesPerHalf = compTarget.memorySize(variable.dt, variable.length!!) / 2
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asmgen.out("${variable.name}_lsb\t.fill $numbytesPerHalf")
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asmgen.out("${variable.name}_msb\t.fill $numbytesPerHalf")
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}
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in ArrayDatatypes -> {
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val numbytes = compTarget.memorySize(variable.dt, variable.length!!)
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asmgen.out("${variable.name}\t.fill $numbytes")
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@ -1896,6 +1896,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" inx | lda P8ESTACK_LO,x | sta ${target.asmVarname},y")
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}
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DataType.UWORD, DataType.WORD -> {
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y)
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asmgen.out("""
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inx
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@ -2064,16 +2066,13 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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lda $sourceName
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ldy $sourceName+1
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sta ${target.asmVarname}
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sty ${target.asmVarname}+1
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""")
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sty ${target.asmVarname}+1""")
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}
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TargetStorageKind.MEMORY -> {
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throw AssemblyError("assign word to memory ${target.memory} should have gotten a typecast")
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}
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TargetStorageKind.ARRAY -> {
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target.array!!
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if(target.array.splitWords)
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TODO("assign var into split words ${target.position}")
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if(target.constArrayIndexValue!=null) {
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val scaledIdx = target.constArrayIndexValue!! * program.memsizer.memorySize(target.datatype).toUInt()
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when(target.datatype) {
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@ -2081,12 +2080,18 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx")
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}
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in WordDatatypes -> {
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname}+$scaledIdx
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lda $sourceName+1
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sta ${target.asmVarname}+$scaledIdx+1
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""")
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if(target.array.splitWords)
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname}_lsb+${target.constArrayIndexValue}
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lda $sourceName+1
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sta ${target.asmVarname}_msb+${target.constArrayIndexValue}""")
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else
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname}+$scaledIdx
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lda $sourceName+1
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sta ${target.asmVarname}+$scaledIdx+1""")
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}
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DataType.FLOAT -> {
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asmgen.out("""
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@ -2096,8 +2101,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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sty P8ZP_SCRATCH_W1+1
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lda #<(${target.asmVarname}+$scaledIdx)
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ldy #>(${target.asmVarname}+$scaledIdx)
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jsr floats.copy_float
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""")
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jsr floats.copy_float""")
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}
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else -> throw AssemblyError("weird target variable type ${target.datatype}")
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}
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@ -2111,12 +2115,18 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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DataType.UWORD, DataType.WORD -> {
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asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y)
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname},y
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lda $sourceName+1
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sta ${target.asmVarname}+1,y
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""")
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if(target.array.splitWords)
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname}_lsb,y
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lda $sourceName+1
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sta ${target.asmVarname}_msb,y""")
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else
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asmgen.out("""
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lda $sourceName
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sta ${target.asmVarname},y
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lda $sourceName+1
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sta ${target.asmVarname}+1,y""")
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}
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DataType.FLOAT -> {
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asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.A)
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@ -2315,6 +2325,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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return
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}
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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if (target.constArrayIndexValue!=null) {
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val scaledIdx = target.constArrayIndexValue!! * program.memsizer.memorySize(target.datatype).toUInt()
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asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx")
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@ -2448,22 +2460,41 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+1")
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}
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TargetStorageKind.ARRAY -> {
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if (wordtarget.constArrayIndexValue!=null) {
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val scaledIdx = wordtarget.constArrayIndexValue!! * 2u
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asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname}+$scaledIdx")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz ${wordtarget.asmVarname}+$scaledIdx+1")
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else
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asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+$scaledIdx+1")
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}
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else {
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asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array!!, wordtarget.datatype, CpuRegister.Y)
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asmgen.out("""
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lda $sourceName
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sta ${wordtarget.asmVarname},y
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iny
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lda #0
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sta ${wordtarget.asmVarname},y""")
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if(wordtarget.array!!.splitWords) {
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if (wordtarget.constArrayIndexValue!=null) {
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val scaledIdx = wordtarget.constArrayIndexValue!!
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asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname}_lsb+$scaledIdx")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz ${wordtarget.asmVarname}_msb+$scaledIdx")
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else
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asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}_msb+$scaledIdx")
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}
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else {
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asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, wordtarget.datatype, CpuRegister.Y)
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asmgen.out("""
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lda $sourceName
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sta ${wordtarget.asmVarname}_lsb,y
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lda #0
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sta ${wordtarget.asmVarname}_msb,y""")
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}
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} else {
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if (wordtarget.constArrayIndexValue!=null) {
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val scaledIdx = wordtarget.constArrayIndexValue!! * 2u
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asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname}+$scaledIdx")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz ${wordtarget.asmVarname}+$scaledIdx+1")
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else
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asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+$scaledIdx+1")
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}
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else {
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asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, wordtarget.datatype, CpuRegister.Y)
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asmgen.out("""
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lda $sourceName
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sta ${wordtarget.asmVarname},y
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iny
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lda #0
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sta ${wordtarget.asmVarname},y""")
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}
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}
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}
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TargetStorageKind.REGISTER -> {
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@ -2720,49 +2751,93 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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}
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TargetStorageKind.ARRAY -> {
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if(target.array!!.splitWords)
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TODO("assign register pair into split words ${target.position}")
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if (target.constArrayIndexValue!=null) {
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val idx = target.constArrayIndexValue!! * 2u
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when (regs) {
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RegisterOrPair.AX -> asmgen.out(" sta ${target.asmVarname}+$idx | stx ${target.asmVarname}+$idx+1")
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RegisterOrPair.AY -> asmgen.out(" sta ${target.asmVarname}+$idx | sty ${target.asmVarname}+$idx+1")
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RegisterOrPair.XY -> asmgen.out(" stx ${target.asmVarname}+$idx | sty ${target.asmVarname}+$idx+1")
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in Cx16VirtualRegisters -> {
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if(target.array!!.splitWords) {
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// assign to split lsb/msb word array
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if (target.constArrayIndexValue!=null) {
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val idx = target.constArrayIndexValue!!
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when (regs) {
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RegisterOrPair.AX -> asmgen.out(" sta ${target.asmVarname}_lsb+$idx | stx ${target.asmVarname}_msb+$idx")
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RegisterOrPair.AY -> asmgen.out(" sta ${target.asmVarname}_lsb+$idx | sty ${target.asmVarname}_msb+$idx")
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RegisterOrPair.XY -> asmgen.out(" stx ${target.asmVarname}_lsb+$idx | sty ${target.asmVarname}_msb+$idx")
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in Cx16VirtualRegisters -> {
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val srcReg = asmgen.asmSymbolName(regs)
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asmgen.out("""
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lda $srcReg
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sta ${target.asmVarname}_lsb+$idx
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lda $srcReg+1
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sta ${target.asmVarname}_msb+$idx""")
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}
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else -> throw AssemblyError("expected reg pair or cx16 virtual 16-bit register")
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}
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}
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else {
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if (regs !in Cx16VirtualRegisters) {
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when (regs) {
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RegisterOrPair.AX -> asmgen.out(" pha | txa | pha")
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RegisterOrPair.AY -> asmgen.out(" pha | tya | pha")
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RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
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else -> throw AssemblyError("expected reg pair")
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}
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asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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pla
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sta ${target.asmVarname}_lsb,y
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pla
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sta ${target.asmVarname}_msb,y""")
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} else {
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val srcReg = asmgen.asmSymbolName(regs)
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asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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lda $srcReg
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sta ${target.asmVarname}+$idx
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sta ${target.asmVarname}_lsb,y
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lda $srcReg+1
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sta ${target.asmVarname}+$idx+1""")
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sta ${target.asmVarname}_msb,y""")
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}
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else -> throw AssemblyError("expected reg pair or cx16 virtual 16-bit register")
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}
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}
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else {
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if (regs !in Cx16VirtualRegisters) {
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} else {
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// assign to normal word array
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if (target.constArrayIndexValue!=null) {
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val idx = target.constArrayIndexValue!! * 2u
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when (regs) {
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RegisterOrPair.AX -> asmgen.out(" pha | txa | pha")
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RegisterOrPair.AY -> asmgen.out(" pha | tya | pha")
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RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
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else -> throw AssemblyError("expected reg pair")
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RegisterOrPair.AX -> asmgen.out(" sta ${target.asmVarname}+$idx | stx ${target.asmVarname}+$idx+1")
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RegisterOrPair.AY -> asmgen.out(" sta ${target.asmVarname}+$idx | sty ${target.asmVarname}+$idx+1")
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RegisterOrPair.XY -> asmgen.out(" stx ${target.asmVarname}+$idx | sty ${target.asmVarname}+$idx+1")
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in Cx16VirtualRegisters -> {
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val srcReg = asmgen.asmSymbolName(regs)
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asmgen.out("""
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lda $srcReg
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sta ${target.asmVarname}+$idx
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lda $srcReg+1
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sta ${target.asmVarname}+$idx+1""")
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}
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else -> throw AssemblyError("expected reg pair or cx16 virtual 16-bit register")
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}
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}
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else {
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if (regs !in Cx16VirtualRegisters) {
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when (regs) {
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RegisterOrPair.AX -> asmgen.out(" pha | txa | pha")
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RegisterOrPair.AY -> asmgen.out(" pha | tya | pha")
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RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
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else -> throw AssemblyError("expected reg pair")
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}
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asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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pla
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sta ${target.asmVarname},y
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dey
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pla
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sta ${target.asmVarname},y""")
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} else {
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val srcReg = asmgen.asmSymbolName(regs)
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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lda $srcReg+1
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sta ${target.asmVarname},y
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dey
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lda $srcReg
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sta ${target.asmVarname},y""")
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}
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asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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pla
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sta ${target.asmVarname},y
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dey
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pla
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sta ${target.asmVarname},y""")
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} else {
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val srcReg = asmgen.asmSymbolName(regs)
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y, true)
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asmgen.out("""
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lda $srcReg+1
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sta ${target.asmVarname},y
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dey
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lda $srcReg
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sta ${target.asmVarname},y""")
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}
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}
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}
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@ -2856,6 +2931,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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throw AssemblyError("memory is bytes not words")
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}
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TargetStorageKind.ARRAY -> {
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y)
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if(target.array.splitWords)
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asmgen.out("""
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@ -2913,6 +2990,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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throw AssemblyError("assign word to memory ${target.memory} should have gotten a typecast")
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}
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TargetStorageKind.ARRAY -> {
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y)
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if(target.array.splitWords)
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asmgen.out("""
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@ -2983,6 +3062,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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return
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}
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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if (target.constArrayIndexValue!=null) {
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val indexValue = target.constArrayIndexValue!!
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asmgen.out(" stz ${target.asmVarname}+$indexValue")
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@ -3039,6 +3120,8 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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return
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}
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if(target.array!!.splitWords)
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TODO("assign into split words ${target.position}")
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if (target.constArrayIndexValue!=null) {
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val indexValue = target.constArrayIndexValue!!
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asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname}+$indexValue")
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@ -771,9 +771,9 @@ _done
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; based loosely on code found here https://www.codeproject.com/Articles/6017/QuickFill-An-efficient-flood-fill-algorithm
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; with the fixes applied to the seedfill_4 routine as mentioned in the comments.
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const ubyte MAXDEPTH = 48
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word[MAXDEPTH] @shared stack_xl
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word[MAXDEPTH] @shared stack_xr
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word[MAXDEPTH] @shared stack_y
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word[MAXDEPTH] @split @shared stack_xl
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word[MAXDEPTH] @split @shared stack_xr
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word[MAXDEPTH] @split @shared stack_y
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byte[MAXDEPTH] @shared stack_dy
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cx16.r12L = 0 ; stack pointer
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word x1
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@ -791,21 +791,19 @@ _done
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;; stack_dy[cx16.r12L] = sdy
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;; cx16.r12L++
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%asm {{
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lda cx16.r12L
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asl a
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tay
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ldy cx16.r12L
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lda sxl
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sta stack_xl,y
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sta stack_xl_lsb,y
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lda sxl+1
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sta stack_xl+1,y
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sta stack_xl_msb,y
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lda sxr
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sta stack_xr,y
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sta stack_xr_lsb,y
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lda sxr+1
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sta stack_xr+1,y
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sta stack_xr_msb,y
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lda sy
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sta stack_y,y
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sta stack_y_lsb,y
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lda sy+1
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sta stack_y+1,y
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sta stack_y_msb,y
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ldy cx16.r12L
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lda sdy
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sta stack_dy,y
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@ -819,23 +817,20 @@ _done
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;; x2 = stack_xr[cx16.r12L]
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;; y = stack_y[cx16.r12L]
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;; dy = stack_dy[cx16.r12L]
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;; y += dy
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%asm {{
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dec cx16.r12L
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lda cx16.r12L
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asl a
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tay
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lda stack_xl,y
|
||||
ldy cx16.r12L
|
||||
lda stack_xl_lsb,y
|
||||
sta x1
|
||||
lda stack_xl+1,y
|
||||
lda stack_xl_msb,y
|
||||
sta x1+1
|
||||
lda stack_xr,y
|
||||
lda stack_xr_lsb,y
|
||||
sta x2
|
||||
lda stack_xr+1,y
|
||||
lda stack_xr_msb,y
|
||||
sta x2+1
|
||||
lda stack_y,y
|
||||
lda stack_y_lsb,y
|
||||
sta y
|
||||
lda stack_y+1,y
|
||||
lda stack_y_msb,y
|
||||
sta y+1
|
||||
ldy cx16.r12L
|
||||
lda stack_dy,y
|
||||
|
@ -20,7 +20,11 @@ For 9.0 major changes
|
||||
- [much work:] add special (u)word array type (or modifier such as @fast or @split? ) that puts the array into memory as 2 separate byte-arrays 1 for LSB 1 for MSB -> allows for word arrays of length 256 and faster indexing
|
||||
this is an enormous amout of work, if this type is to be treated equally as existing (u)word , because all expression / lookup / assignment routines need to know about the distinction....
|
||||
So maybe only allow the bare essentials? (store, get, ++/--/+/-, bitwise operations?)
|
||||
|
||||
- TODO: fix the remaining 'simple' split words TODO cases (expression assignments)
|
||||
- TODO: change more library and examples to use more @split arrays
|
||||
- TODO: splitarrays unit tests
|
||||
|
||||
- [much work:] more support for (64tass) SEGMENTS ?
|
||||
- (What, how, isn't current BSS support enough?)
|
||||
- Add a mechanism to allocate variables into golden ram (or segments really) (see GoldenRam class)
|
||||
|
@ -6,8 +6,8 @@
|
||||
main {
|
||||
const ubyte MAX_NUM_CIRCLES = 80
|
||||
const ubyte GROWTH_RATE = 2
|
||||
uword[MAX_NUM_CIRCLES] circle_x
|
||||
uword[MAX_NUM_CIRCLES] circle_y
|
||||
uword[MAX_NUM_CIRCLES] @split circle_x
|
||||
uword[MAX_NUM_CIRCLES] @split circle_y
|
||||
ubyte[MAX_NUM_CIRCLES] circle_radius
|
||||
ubyte num_circles = 0
|
||||
ubyte background_color
|
||||
|
@ -5,6 +5,17 @@
|
||||
main {
|
||||
|
||||
sub start() {
|
||||
uword[] @split split_uwords = [12345, 60000, 4096]
|
||||
ubyte xx=1
|
||||
txt.print_ub(lsb(split_uwords[xx]))
|
||||
txt.spc()
|
||||
txt.print_ub(msb(split_uwords[xx]))
|
||||
txt.spc()
|
||||
split_uwords[1] = mkword($11, xx) ; TODO fix this in codegen
|
||||
txt.print_uw(split_uwords[1])
|
||||
}
|
||||
|
||||
sub start22() {
|
||||
uword[] @split split_uwords = [12345, 60000, 4096]
|
||||
word[] @split split_words = [-12345, -2222, 22222]
|
||||
uword[256] @split @shared split2
|
||||
@ -78,11 +89,30 @@ main {
|
||||
|
||||
print_arrays()
|
||||
txt.nl()
|
||||
split_uwords[1] |= 4095
|
||||
split_words[1] |= 127
|
||||
; split_uwords[1] |= 4095 ; TODO fix this in 6502 codegen
|
||||
; split_words[1] |= 127 ; TODO fix this in 6502 codegen
|
||||
;
|
||||
; print_arrays()
|
||||
; txt.nl()
|
||||
; txt.nl()
|
||||
|
||||
print_arrays()
|
||||
cx16.r0 = split_uwords[1]
|
||||
cx16.r1s = split_words[1]
|
||||
ww = 6655
|
||||
split_uwords[1] = xx
|
||||
split_words[1] = xx as word
|
||||
txt.print_uw(split_uwords[1])
|
||||
txt.spc()
|
||||
txt.print_w(split_words[1])
|
||||
txt.nl()
|
||||
ww=7788
|
||||
split_uwords[xx] = ww
|
||||
split_words[xx] = ww as word
|
||||
txt.print_uw(split_uwords[1])
|
||||
txt.spc()
|
||||
txt.print_w(split_words[1])
|
||||
txt.nl()
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user