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loadScaledArrayIndexIntoRegister(): useless type arg removed

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This commit is contained in:
Irmen de Jong
2024-01-15 03:25:50 +01:00
parent 7de665d1e4
commit 828d83dbef
7 changed files with 50 additions and 48 deletions
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11
codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt
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@@ -522,19 +522,14 @@ class AsmGen6502Internal (
} }
} }
internal fun loadScaledArrayIndexIntoRegister( internal fun loadScaledArrayIndexIntoRegister(expr: PtArrayIndexer, register: CpuRegister) {
expr: PtArrayIndexer,
elementDt: DataType,
register: CpuRegister
) {
require(elementDt==expr.type) // TODO remove this if it is ok
val reg = register.toString().lowercase() val reg = register.toString().lowercase()
val indexnum = expr.index.asConstInteger() val indexnum = expr.index.asConstInteger()
if (indexnum != null) { if (indexnum != null) {
val indexValue = if(expr.splitWords) val indexValue = if(expr.splitWords)
indexnum indexnum
else else
indexnum * options.compTarget.memorySize(elementDt) indexnum * options.compTarget.memorySize(expr.type)
out(" ld$reg #$indexValue") out(" ld$reg #$indexValue")
return return
} }
@@ -544,7 +539,7 @@ class AsmGen6502Internal (
return return
} }
when (elementDt) { when (expr.type) {
in ByteDatatypes -> { in ByteDatatypes -> {
assignExpressionToRegister(expr.index, RegisterOrPair.fromCpuRegister(register), false) assignExpressionToRegister(expr.index, RegisterOrPair.fromCpuRegister(register), false)
} }

22
codeGenCpu6502/src/prog8/codegen/cpu6502/BuiltinFunctionsAsmGen.kt
View File

@@ -409,7 +409,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UBYTE -> { DataType.UBYTE -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
asmgen.out(" lda ${varname},x | lsr a | bcc + | ora #\$80 |+ | sta ${varname},x") asmgen.out(" lda ${varname},x | lsr a | bcc + | ora #\$80 |+ | sta ${varname},x")
} }
@@ -432,7 +432,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UWORD -> { DataType.UWORD -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
if(what.splitWords) if(what.splitWords)
asmgen.out(" lsr ${varname}_msb,x | ror ${varname}_lsb,x | bcc + | lda ${varname}_msb,x | ora #\$80 | sta ${varname}_msb,x |+ ") asmgen.out(" lsr ${varname}_msb,x | ror ${varname}_lsb,x | bcc + | lda ${varname}_msb,x | ora #\$80 | sta ${varname}_msb,x |+ ")
@@ -456,7 +456,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UBYTE -> { DataType.UBYTE -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
asmgen.out(" ror ${varname},x") asmgen.out(" ror ${varname},x")
} }
@@ -493,7 +493,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UWORD -> { DataType.UWORD -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
if(what.splitWords) if(what.splitWords)
asmgen.out(" ror ${varname}_msb,x | ror ${varname}_lsb,x") asmgen.out(" ror ${varname}_msb,x | ror ${varname}_lsb,x")
@@ -517,7 +517,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UBYTE -> { DataType.UBYTE -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
asmgen.out(" lda ${varname},x | cmp #\$80 | rol a | sta ${varname},x") asmgen.out(" lda ${varname},x | cmp #\$80 | rol a | sta ${varname},x")
} }
@@ -540,7 +540,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UWORD -> { DataType.UWORD -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
if(what.splitWords) if(what.splitWords)
asmgen.out(" asl ${varname}_lsb,x | rol ${varname}_msb,x | bcc + | inc ${varname}_lsb |+") asmgen.out(" asl ${varname}_lsb,x | rol ${varname}_msb,x | bcc + | inc ${varname}_lsb |+")
@@ -564,7 +564,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UBYTE -> { DataType.UBYTE -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
asmgen.out(" rol ${varname},x") asmgen.out(" rol ${varname},x")
} }
@@ -601,7 +601,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
DataType.UWORD -> { DataType.UWORD -> {
when (what) { when (what) {
is PtArrayIndexer -> { is PtArrayIndexer -> {
asmgen.loadScaledArrayIndexIntoRegister(what, what.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(what, CpuRegister.X)
val varname = asmgen.asmVariableName(what.variable) val varname = asmgen.asmVariableName(what.variable)
if(what.splitWords) if(what.splitWords)
asmgen.out(" rol ${varname}_lsb,x | rol ${varname}_msb,x") asmgen.out(" rol ${varname}_lsb,x | rol ${varname}_msb,x")
@@ -1172,15 +1172,15 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
val arrayVar = if(arg.splitWords) asmgen.asmVariableName(arg.variable)+"_lsb" else asmgen.asmVariableName(arg.variable) val arrayVar = if(arg.splitWords) asmgen.asmVariableName(arg.variable)+"_lsb" else asmgen.asmVariableName(arg.variable)
when(resultRegister) { when(resultRegister) {
null, RegisterOrPair.A -> { null, RegisterOrPair.A -> {
asmgen.loadScaledArrayIndexIntoRegister(arg, arg.type, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(arg, CpuRegister.Y)
asmgen.out(" lda $arrayVar,y") asmgen.out(" lda $arrayVar,y")
} }
RegisterOrPair.Y -> { RegisterOrPair.Y -> {
asmgen.loadScaledArrayIndexIntoRegister(arg, arg.type, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(arg, CpuRegister.X)
asmgen.out(" lda $arrayVar,x") asmgen.out(" lda $arrayVar,x")
} }
RegisterOrPair.X -> { RegisterOrPair.X -> {
asmgen.loadScaledArrayIndexIntoRegister(arg, arg.type, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(arg, CpuRegister.Y)
asmgen.out(" ldx $arrayVar,y") asmgen.out(" ldx $arrayVar,y")
} }
else -> throw AssemblyError("invalid reg") else -> throw AssemblyError("invalid reg")

4
codeGenCpu6502/src/prog8/codegen/cpu6502/PostIncrDecrAsmGen.kt
View File

@@ -75,7 +75,7 @@ internal class PostIncrDecrAsmGen(private val program: PtProgram, private val as
dec ${asmArrayvarname}_msb+$constIndex dec ${asmArrayvarname}_msb+$constIndex
+ dec ${asmArrayvarname}_lsb+$constIndex""") + dec ${asmArrayvarname}_lsb+$constIndex""")
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(targetArrayIdx, elementDt, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(targetArrayIdx, CpuRegister.X)
if(incr) if(incr)
asmgen.out(" inc ${asmArrayvarname}_lsb,x | bne + | inc ${asmArrayvarname}_msb,x |+") asmgen.out(" inc ${asmArrayvarname}_lsb,x | bne + | inc ${asmArrayvarname}_msb,x |+")
else else
@@ -127,7 +127,7 @@ internal class PostIncrDecrAsmGen(private val program: PtProgram, private val as
} }
else else
{ {
asmgen.loadScaledArrayIndexIntoRegister(targetArrayIdx, elementDt, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(targetArrayIdx, CpuRegister.X)
when(elementDt) { when(elementDt) {
in ByteDatatypes -> { in ByteDatatypes -> {
if(targetArrayIdx.usesPointerVariable) { if(targetArrayIdx.usesPointerVariable) {

42
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@@ -78,7 +78,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda (P8ZP_SCRATCH_W1)") asmgen.out(" lda (P8ZP_SCRATCH_W1)")
} }
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(value, CpuRegister.Y)
if (asmgen.isZpVar(value.variable)) { if (asmgen.isZpVar(value.variable)) {
asmgen.out(" lda ($arrayVarName),y") asmgen.out(" lda ($arrayVarName),y")
} else { } else {
@@ -98,7 +98,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda ${arrayVarName}_lsb+$constIndex | ldy ${arrayVarName}_msb+$constIndex") asmgen.out(" lda ${arrayVarName}_lsb+$constIndex | ldy ${arrayVarName}_msb+$constIndex")
assignRegisterpairWord(assign.target, RegisterOrPair.AY) assignRegisterpairWord(assign.target, RegisterOrPair.AY)
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(value, CpuRegister.Y)
asmgen.out(" lda ${arrayVarName}_lsb,y | ldx ${arrayVarName}_msb,y") asmgen.out(" lda ${arrayVarName}_lsb,y | ldx ${arrayVarName}_msb,y")
assignRegisterpairWord(assign.target, RegisterOrPair.AX) assignRegisterpairWord(assign.target, RegisterOrPair.AX)
} }
@@ -127,17 +127,17 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} else { } else {
when (elementDt) { when (elementDt) {
in ByteDatatypes -> { in ByteDatatypes -> {
asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(value, CpuRegister.Y)
asmgen.out(" lda $arrayVarName,y") asmgen.out(" lda $arrayVarName,y")
assignRegisterByte(assign.target, CpuRegister.A, elementDt in SignedDatatypes, true) assignRegisterByte(assign.target, CpuRegister.A, elementDt in SignedDatatypes, true)
} }
in WordDatatypes -> { in WordDatatypes -> {
asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(value, CpuRegister.Y)
asmgen.out(" lda $arrayVarName,y | ldx $arrayVarName+1,y") asmgen.out(" lda $arrayVarName,y | ldx $arrayVarName+1,y")
assignRegisterpairWord(assign.target, RegisterOrPair.AX) assignRegisterpairWord(assign.target, RegisterOrPair.AX)
} }
DataType.FLOAT -> { DataType.FLOAT -> {
asmgen.loadScaledArrayIndexIntoRegister(value, elementDt, CpuRegister.A) asmgen.loadScaledArrayIndexIntoRegister(value, CpuRegister.A)
asmgen.out(""" asmgen.out("""
ldy #>$arrayVarName ldy #>$arrayVarName
clc clc
@@ -2659,11 +2659,11 @@ internal class AssignmentAsmGen(private val program: PtProgram,
{ {
when(target.datatype) { when(target.datatype) {
DataType.UBYTE, DataType.BYTE -> { DataType.UBYTE, DataType.BYTE -> {
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(" lda $sourceName | sta ${target.asmVarname},y") asmgen.out(" lda $sourceName | sta ${target.asmVarname},y")
} }
DataType.UWORD, DataType.WORD -> { DataType.UWORD, DataType.WORD -> {
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
if(target.array.splitWords) if(target.array.splitWords)
asmgen.out(""" asmgen.out("""
lda $sourceName lda $sourceName
@@ -2841,7 +2841,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda $sourceName") asmgen.out(" lda $sourceName")
asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable) asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable)
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array!!, CpuRegister.Y)
if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) { if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
asmgen.out(" lda $sourceName | sta (${target.asmVarname}),y") asmgen.out(" lda $sourceName | sta (${target.asmVarname}),y")
} else { } else {
@@ -2858,7 +2858,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx") asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx")
} }
else { else {
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(" lda $sourceName | sta ${target.asmVarname},y") asmgen.out(" lda $sourceName | sta ${target.asmVarname},y")
} }
} }
@@ -2909,7 +2909,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" sta ${wordtarget.asmVarname}+$scaledIdx | sty ${wordtarget.asmVarname}+$scaledIdx+1") asmgen.out(" sta ${wordtarget.asmVarname}+$scaledIdx | sty ${wordtarget.asmVarname}+$scaledIdx+1")
} }
else { else {
asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, wordtarget.datatype, CpuRegister.X) asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, CpuRegister.X)
asmgen.out(" lda $sourceName") asmgen.out(" lda $sourceName")
asmgen.signExtendAYlsb(DataType.BYTE) asmgen.signExtendAYlsb(DataType.BYTE)
asmgen.out(" sta ${wordtarget.asmVarname},x | inx | tya | sta ${wordtarget.asmVarname},x") asmgen.out(" sta ${wordtarget.asmVarname},x | inx | tya | sta ${wordtarget.asmVarname},x")
@@ -2978,7 +2978,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}_msb+$scaledIdx") asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}_msb+$scaledIdx")
} }
else { else {
asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, wordtarget.datatype, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
lda $sourceName lda $sourceName
sta ${wordtarget.asmVarname}_lsb,y sta ${wordtarget.asmVarname}_lsb,y
@@ -2995,7 +2995,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+$scaledIdx+1") asmgen.out(" lda #0 | sta ${wordtarget.asmVarname}+$scaledIdx+1")
} }
else { else {
asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, wordtarget.datatype, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
lda $sourceName lda $sourceName
sta ${wordtarget.asmVarname},y sta ${wordtarget.asmVarname},y
@@ -3393,7 +3393,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha") RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
else -> throw AssemblyError("expected reg pair") else -> throw AssemblyError("expected reg pair")
} }
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
pla pla
sta ${target.asmVarname}_msb,y sta ${target.asmVarname}_msb,y
@@ -3401,7 +3401,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
sta ${target.asmVarname}_lsb,y""") sta ${target.asmVarname}_lsb,y""")
} else { } else {
val srcReg = asmgen.asmSymbolName(regs) val srcReg = asmgen.asmSymbolName(regs)
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
lda $srcReg lda $srcReg
sta ${target.asmVarname}_lsb,y sta ${target.asmVarname}_lsb,y
@@ -3436,7 +3436,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha") RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
else -> throw AssemblyError("expected reg pair") else -> throw AssemblyError("expected reg pair")
} }
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
iny iny
pla pla
@@ -3446,7 +3446,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
sta ${target.asmVarname},y""") sta ${target.asmVarname},y""")
} else { } else {
val srcReg = asmgen.asmSymbolName(regs) val srcReg = asmgen.asmSymbolName(regs)
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(""" asmgen.out("""
iny iny
lda $srcReg+1 lda $srcReg+1
@@ -3532,7 +3532,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
throw AssemblyError("memory is bytes not words") throw AssemblyError("memory is bytes not words")
} }
TargetStorageKind.ARRAY -> { TargetStorageKind.ARRAY -> {
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array!!, CpuRegister.Y)
if(target.array.splitWords) if(target.array.splitWords)
asmgen.out(""" asmgen.out("""
lda #0 lda #0
@@ -3586,7 +3586,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
throw AssemblyError("assign word to memory ${target.memory} should have gotten a typecast") throw AssemblyError("assign word to memory ${target.memory} should have gotten a typecast")
} }
TargetStorageKind.ARRAY -> { TargetStorageKind.ARRAY -> {
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array!!, CpuRegister.Y)
if(target.array.splitWords) if(target.array.splitWords)
asmgen.out(""" asmgen.out("""
lda #<${word.toHex()} lda #<${word.toHex()}
@@ -3637,7 +3637,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda #0") asmgen.out(" lda #0")
asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable) asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable)
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array!!, CpuRegister.Y)
if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) { if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
asmgen.out(" lda #0 | sta (${target.asmVarname}),y") asmgen.out(" lda #0 | sta (${target.asmVarname}),y")
} else { } else {
@@ -3691,7 +3691,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda #${byte.toHex()}") asmgen.out(" lda #${byte.toHex()}")
asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable) asmgen.storeAIntoPointerVar(target.origAstTarget!!.array!!.variable)
} else { } else {
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array!!, CpuRegister.Y)
if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) { if (asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
asmgen.out(" lda #${byte.toHex()} | sta (${target.asmVarname}),y") asmgen.out(" lda #${byte.toHex()} | sta (${target.asmVarname}),y")
} else { } else {
@@ -3708,7 +3708,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname}+$indexValue") asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname}+$indexValue")
} }
else { else {
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UBYTE, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname},y") asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname},y")
} }
} }

6
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt
View File

@@ -278,7 +278,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
&& value.expression is PtTypeCast && value.expression is PtTypeCast
&& tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) && tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator))
return return
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UBYTE, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.saveRegisterStack(CpuRegister.Y, false) asmgen.saveRegisterStack(CpuRegister.Y, false)
asmgen.out(" lda ${target.array.variable.name},y") asmgen.out(" lda ${target.array.variable.name},y")
when(value.kind) { when(value.kind) {
@@ -329,7 +329,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
&& value.expression is PtTypeCast && value.expression is PtTypeCast
&& tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) && tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator))
return return
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.Y)
asmgen.saveRegisterStack(CpuRegister.Y, false) asmgen.saveRegisterStack(CpuRegister.Y, false)
if(target.array.splitWords) { if(target.array.splitWords) {
asmgen.out(" lda ${target.array.variable.name}_lsb,y") asmgen.out(" lda ${target.array.variable.name}_lsb,y")
@@ -404,7 +404,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
DataType.FLOAT -> { DataType.FLOAT -> {
// copy array value into tempvar // copy array value into tempvar
val tempvar = asmgen.getTempVarName(DataType.FLOAT) val tempvar = asmgen.getTempVarName(DataType.FLOAT)
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.FLOAT, CpuRegister.A) asmgen.loadScaledArrayIndexIntoRegister(target.array, CpuRegister.A)
asmgen.out(""" asmgen.out("""
ldy #>${target.asmVarname} ldy #>${target.asmVarname}
clc clc

10
codeGenIntermediate/src/prog8/codegen/intermediate/BuiltinFuncGen.kt
View File

@@ -148,6 +148,11 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
private fun funcAny(call: PtBuiltinFunctionCall): ExpressionCodeResult { private fun funcAny(call: PtBuiltinFunctionCall): ExpressionCodeResult {
val arrayName = call.args[0] as PtIdentifier val arrayName = call.args[0] as PtIdentifier
val arrayLength = codeGen.symbolTable.getLength(arrayName.name) val arrayLength = codeGen.symbolTable.getLength(arrayName.name)
if(arrayName.type in SplitWordArrayTypes) {
TODO("any(split words) array=$arrayName length=$arrayLength")
}
val syscall = val syscall =
when (arrayName.type) { when (arrayName.type) {
DataType.ARRAY_UB, DataType.ARRAY_UB,
@@ -170,6 +175,11 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
private fun funcAll(call: PtBuiltinFunctionCall): ExpressionCodeResult { private fun funcAll(call: PtBuiltinFunctionCall): ExpressionCodeResult {
val arrayName = call.args[0] as PtIdentifier val arrayName = call.args[0] as PtIdentifier
val arrayLength = codeGen.symbolTable.getLength(arrayName.name) val arrayLength = codeGen.symbolTable.getLength(arrayName.name)
if(arrayName.type in SplitWordArrayTypes) {
TODO("all(split words) array=$arrayName length=$arrayLength")
}
val syscall = val syscall =
when(arrayName.type) { when(arrayName.type) {
DataType.ARRAY_UB, DataType.ARRAY_UB,

3
docs/source/todo.rst
View File

@@ -2,13 +2,10 @@ TODO
==== ====
funcRor()/funcRol(): save carry flag before calculating array index otherwise it gets clobbered funcRor()/funcRol(): save carry flag before calculating array index otherwise it gets clobbered
rol/ror a membyte through a uword ptr
split words sort and reverse split words sort and reverse
split words any and all split words any and all
loadScaledArrayIndexIntoRegister(): the type arg can be removed?
Mark had a compiler crash FatalAstException: invalid dt Mark had a compiler crash FatalAstException: invalid dt
... ...