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https://github.com/irmen/prog8.git
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consolidate @rombank and @rambank into just @bank
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@@ -645,10 +645,10 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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IRInstruction(Opcode.CALL, labelSymbol = fcall.name, fcallArgs = FunctionCallArgs(argRegisters, returnRegs))
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else {
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val address = callTarget.address!!
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if(address.rombank==null && address.rambank==null) {
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if(address.first==null) {
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IRInstruction(
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Opcode.CALL,
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address = address.address.toInt(),
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address = address.second.toInt(),
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fcallArgs = FunctionCallArgs(argRegisters, returnRegs))
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}
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else {
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@@ -767,10 +767,10 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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IRInstruction(Opcode.CALL, labelSymbol = fcall.name, fcallArgs = FunctionCallArgs(argRegisters, returnRegisters))
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else {
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val address = callTarget.address!!
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if(address.rombank==null && address.rambank==null) {
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if(address.first==null) {
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IRInstruction(
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Opcode.CALL,
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address = address.address.toInt(),
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address = address.second.toInt(),
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fcallArgs = FunctionCallArgs(argRegisters, returnRegisters)
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)
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}
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@@ -534,7 +534,7 @@ class TestVmCodeGen: FunSpec({
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val codegen = VmCodeGen()
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val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
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val block = PtBlock("main", false, SourceCode.Generated("test"), PtBlock.Options(), Position.DUMMY)
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val romsub = PtAsmSub("routine", PtAsmSub.Address(null, null, 0x5000u), setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
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val romsub = PtAsmSub("routine", null to 0x5000u, setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
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block.add(romsub)
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val sub = PtSub("start", emptyList(), null, Position.DUMMY)
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val call = PtFunctionCall("main.routine", true, DataType.UNDEFINED, Position.DUMMY)
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