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ir: improve register type detection
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@@ -55,11 +55,12 @@ Future Things and Ideas
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IR/VM
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-----
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- getting it in shape for code generation...: the IR file should be able to encode every detail about a prog8 program (the VM doesn't have to actually be able to run all of it though!)
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- addUsedRegistersCounts() doesn't always determine the datatype correctly. For instance with indirect instructions it thinks it still is a byte whereas it is a word (address)
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- addUsedRegistersCounts() doesn't always determine the datatype correctly. --> GET RID OF THE Sxxx OPCODES FOR NOW?
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- fix TODO("IR rol/ror on split words array")
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- fix "<< in array" / ">> in array"
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- implement missing operators in AssignmentGen (array shifts etc)
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- fix call() return value handling
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- try to get rid of LSIG opcode again (but this will introduce byte reads from word typed registers...)
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- proper code gen for the CALLI instruction and that it (optionally) returns a word value that needs to be assigned to a reg
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- idea: (but LLVM IR simply keeps the variables, so not a good idea then?...): replace all scalar variables by an allocated register. Keep a table of the variable to register mapping (including the datatype)
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global initialization values are simply a list of LOAD instructions.
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