mirror of
https://github.com/irmen/prog8.git
synced 2024-09-29 08:57:51 +00:00
fix some split array issues in 6502 codegen
This commit is contained in:
parent
ca60f8ecdd
commit
9896bc110e
@ -362,16 +362,15 @@ class AsmGen6502Internal (
|
|||||||
internal fun loadScaledArrayIndexIntoRegister(
|
internal fun loadScaledArrayIndexIntoRegister(
|
||||||
expr: PtArrayIndexer,
|
expr: PtArrayIndexer,
|
||||||
elementDt: DataType,
|
elementDt: DataType,
|
||||||
register: CpuRegister,
|
register: CpuRegister
|
||||||
addOneExtra: Boolean = false
|
|
||||||
) {
|
) {
|
||||||
val reg = register.toString().lowercase()
|
val reg = register.toString().lowercase()
|
||||||
val indexnum = expr.index.asConstInteger()
|
val indexnum = expr.index.asConstInteger()
|
||||||
if (indexnum != null) {
|
if (indexnum != null) {
|
||||||
val indexValue = if(expr.splitWords)
|
val indexValue = if(expr.splitWords)
|
||||||
indexnum + if (addOneExtra) 1 else 0
|
indexnum
|
||||||
else
|
else
|
||||||
indexnum * options.compTarget.memorySize(elementDt) + if (addOneExtra) 1 else 0
|
indexnum * options.compTarget.memorySize(elementDt)
|
||||||
out(" ld$reg #$indexValue")
|
out(" ld$reg #$indexValue")
|
||||||
return
|
return
|
||||||
}
|
}
|
||||||
@ -382,61 +381,14 @@ class AsmGen6502Internal (
|
|||||||
val indexName = asmVariableName(indexVar)
|
val indexName = asmVariableName(indexVar)
|
||||||
|
|
||||||
if(expr.splitWords) {
|
if(expr.splitWords) {
|
||||||
if(addOneExtra) {
|
|
||||||
out(" ldy $indexName | iny")
|
|
||||||
when (register) {
|
|
||||||
CpuRegister.A -> out(" tya")
|
|
||||||
CpuRegister.X -> out(" txy")
|
|
||||||
CpuRegister.Y -> {}
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
when (register) {
|
when (register) {
|
||||||
CpuRegister.A -> out(" lda $indexName")
|
CpuRegister.A -> out(" lda $indexName")
|
||||||
CpuRegister.X -> out(" ldx $indexName")
|
CpuRegister.X -> out(" ldx $indexName")
|
||||||
CpuRegister.Y -> out(" ldy $indexName")
|
CpuRegister.Y -> out(" ldy $indexName")
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return
|
return
|
||||||
}
|
}
|
||||||
|
|
||||||
if (addOneExtra) {
|
|
||||||
// add 1 to the result
|
|
||||||
when (elementDt) {
|
|
||||||
in ByteDatatypes -> {
|
|
||||||
out(" ldy $indexName | iny")
|
|
||||||
when (register) {
|
|
||||||
CpuRegister.A -> out(" tya")
|
|
||||||
CpuRegister.X -> out(" tyx")
|
|
||||||
CpuRegister.Y -> {}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
in WordDatatypes -> {
|
|
||||||
out(" lda $indexName | sec | rol a")
|
|
||||||
when (register) {
|
|
||||||
CpuRegister.A -> {}
|
|
||||||
CpuRegister.X -> out(" tax")
|
|
||||||
CpuRegister.Y -> out(" tay")
|
|
||||||
}
|
|
||||||
}
|
|
||||||
DataType.FLOAT -> {
|
|
||||||
require(options.compTarget.memorySize(DataType.FLOAT) == 5) {"invalid float size ${expr.position}"}
|
|
||||||
out(
|
|
||||||
"""
|
|
||||||
lda $indexName
|
|
||||||
asl a
|
|
||||||
asl a
|
|
||||||
sec
|
|
||||||
adc $indexName"""
|
|
||||||
)
|
|
||||||
when (register) {
|
|
||||||
CpuRegister.A -> {}
|
|
||||||
CpuRegister.X -> out(" tax")
|
|
||||||
CpuRegister.Y -> out(" tay")
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else -> throw AssemblyError("weird dt")
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
when (elementDt) {
|
when (elementDt) {
|
||||||
in ByteDatatypes -> out(" ld$reg $indexName")
|
in ByteDatatypes -> out(" ld$reg $indexName")
|
||||||
in WordDatatypes -> {
|
in WordDatatypes -> {
|
||||||
@ -449,8 +401,7 @@ class AsmGen6502Internal (
|
|||||||
}
|
}
|
||||||
DataType.FLOAT -> {
|
DataType.FLOAT -> {
|
||||||
require(options.compTarget.memorySize(DataType.FLOAT) == 5) {"invalid float size ${expr.position}"}
|
require(options.compTarget.memorySize(DataType.FLOAT) == 5) {"invalid float size ${expr.position}"}
|
||||||
out(
|
out("""
|
||||||
"""
|
|
||||||
lda $indexName
|
lda $indexName
|
||||||
asl a
|
asl a
|
||||||
asl a
|
asl a
|
||||||
@ -466,7 +417,6 @@ class AsmGen6502Internal (
|
|||||||
else -> throw AssemblyError("weird dt")
|
else -> throw AssemblyError("weird dt")
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
@Deprecated("avoid calling this as it generates slow evalstack based code")
|
@Deprecated("avoid calling this as it generates slow evalstack based code")
|
||||||
internal fun translateExpression(expression: PtExpression) =
|
internal fun translateExpression(expression: PtExpression) =
|
||||||
|
@ -1896,7 +1896,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
asmgen.out(" inx | lda P8ESTACK_LO,x | sta ${target.asmVarname},y")
|
asmgen.out(" inx | lda P8ESTACK_LO,x | sta ${target.asmVarname},y")
|
||||||
}
|
}
|
||||||
DataType.UWORD, DataType.WORD -> {
|
DataType.UWORD, DataType.WORD -> {
|
||||||
if(target.array!!.splitWords)
|
if(target.array.splitWords)
|
||||||
TODO("assign into split words ${target.position}")
|
TODO("assign into split words ${target.position}")
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
@ -2332,7 +2332,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx")
|
asmgen.out(" lda $sourceName | sta ${target.asmVarname}+$scaledIdx")
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, target.datatype, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, target.datatype, CpuRegister.Y)
|
||||||
asmgen.out(" lda $sourceName | sta ${target.asmVarname},y")
|
asmgen.out(" lda $sourceName | sta ${target.asmVarname},y")
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -2778,15 +2778,15 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
|
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
|
||||||
else -> throw AssemblyError("expected reg pair")
|
else -> throw AssemblyError("expected reg pair")
|
||||||
}
|
}
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
pla
|
pla
|
||||||
sta ${target.asmVarname}_lsb,y
|
sta ${target.asmVarname}_msb,y
|
||||||
pla
|
pla
|
||||||
sta ${target.asmVarname}_msb,y""")
|
sta ${target.asmVarname}_lsb,y""")
|
||||||
} else {
|
} else {
|
||||||
val srcReg = asmgen.asmSymbolName(regs)
|
val srcReg = asmgen.asmSymbolName(regs)
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
lda $srcReg
|
lda $srcReg
|
||||||
sta ${target.asmVarname}_lsb,y
|
sta ${target.asmVarname}_lsb,y
|
||||||
@ -2821,8 +2821,9 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
|
RegisterOrPair.XY -> asmgen.out(" txa | pha | tya | pha")
|
||||||
else -> throw AssemblyError("expected reg pair")
|
else -> throw AssemblyError("expected reg pair")
|
||||||
}
|
}
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y, true)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
|
iny
|
||||||
pla
|
pla
|
||||||
sta ${target.asmVarname},y
|
sta ${target.asmVarname},y
|
||||||
dey
|
dey
|
||||||
@ -2830,8 +2831,9 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
sta ${target.asmVarname},y""")
|
sta ${target.asmVarname},y""")
|
||||||
} else {
|
} else {
|
||||||
val srcReg = asmgen.asmSymbolName(regs)
|
val srcReg = asmgen.asmSymbolName(regs)
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y, true)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
|
iny
|
||||||
lda $srcReg+1
|
lda $srcReg+1
|
||||||
sta ${target.asmVarname},y
|
sta ${target.asmVarname},y
|
||||||
dey
|
dey
|
||||||
@ -2933,7 +2935,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
TargetStorageKind.ARRAY -> {
|
TargetStorageKind.ARRAY -> {
|
||||||
if(target.array!!.splitWords)
|
if(target.array!!.splitWords)
|
||||||
TODO("assign into split words ${target.position}")
|
TODO("assign into split words ${target.position}")
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
if(target.array.splitWords)
|
if(target.array.splitWords)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
lda #0
|
lda #0
|
||||||
@ -2992,7 +2994,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
TargetStorageKind.ARRAY -> {
|
TargetStorageKind.ARRAY -> {
|
||||||
if(target.array!!.splitWords)
|
if(target.array!!.splitWords)
|
||||||
TODO("assign into split words ${target.position}")
|
TODO("assign into split words ${target.position}")
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UWORD, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UWORD, CpuRegister.Y)
|
||||||
if(target.array.splitWords)
|
if(target.array.splitWords)
|
||||||
asmgen.out("""
|
asmgen.out("""
|
||||||
lda #<${word.toHex()}
|
lda #<${word.toHex()}
|
||||||
@ -3069,7 +3071,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
asmgen.out(" stz ${target.asmVarname}+$indexValue")
|
asmgen.out(" stz ${target.asmVarname}+$indexValue")
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UBYTE, CpuRegister.Y)
|
||||||
asmgen.out(" lda #0 | sta ${target.asmVarname},y")
|
asmgen.out(" lda #0 | sta ${target.asmVarname},y")
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -3127,7 +3129,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
|
|||||||
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname}+$indexValue")
|
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname}+$indexValue")
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y)
|
asmgen.loadScaledArrayIndexIntoRegister(target.array, DataType.UBYTE, CpuRegister.Y)
|
||||||
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname},y")
|
asmgen.out(" lda #${byte.toHex()} | sta ${target.asmVarname},y")
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -171,7 +171,7 @@ psg {
|
|||||||
}
|
}
|
||||||
|
|
||||||
ubyte[16] envelope_states
|
ubyte[16] envelope_states
|
||||||
uword[16] envelope_volumes ; scaled by 256
|
uword[16] @split envelope_volumes ; scaled by 256
|
||||||
ubyte[16] envelope_attacks
|
ubyte[16] envelope_attacks
|
||||||
ubyte[16] envelope_sustains
|
ubyte[16] envelope_sustains
|
||||||
ubyte[16] envelope_releases
|
ubyte[16] envelope_releases
|
||||||
|
Loading…
Reference in New Issue
Block a user