mirror of
https://github.com/irmen/prog8.git
synced 2024-09-07 19:54:26 +00:00
fix PeekW and PokeW optimizations
This commit is contained in:
parent
3613162d09
commit
9b971ad222
@ -661,48 +661,25 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
|
|||||||
return
|
return
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
is PtRpn -> {
|
is PtRpn, is PtBinaryExpression -> {
|
||||||
if(addrExpr.children.size==3) {
|
val result = asmgen.pointerViaIndexRegisterPossible(addrExpr)
|
||||||
// we want just one '+' operator
|
val pointer = result?.first as? PtIdentifier
|
||||||
val (left, oper, right) = addrExpr.finalOperation()
|
if(result!=null && pointer!=null && asmgen.isZpVar(pointer)) {
|
||||||
if(oper.operator=="+" && left is PtIdentifier && right is PtNumber) {
|
// can do ZP,Y indexing
|
||||||
val varname = asmgen.asmVariableName(left)
|
val varname = asmgen.asmVariableName(pointer)
|
||||||
if(asmgen.isZpVar(left)) {
|
val scope = fcall.definingISub()!!
|
||||||
// pointervar is already in the zero page, no need to copy
|
asmgen.saveRegisterLocal(CpuRegister.X, scope)
|
||||||
asmgen.saveRegisterLocal(CpuRegister.X, fcall.definingISub()!!)
|
asmgen.assignExpressionToRegister(result.second, RegisterOrPair.Y)
|
||||||
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.AX)
|
asmgen.saveRegisterLocal(CpuRegister.Y, scope)
|
||||||
val index = right.number.toHex()
|
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.AX)
|
||||||
asmgen.out("""
|
asmgen.restoreRegisterLocal(CpuRegister.Y)
|
||||||
ldy #$index
|
asmgen.out("""
|
||||||
sta ($varname),y
|
|
||||||
txa
|
|
||||||
iny
|
|
||||||
sta ($varname),y""")
|
|
||||||
asmgen.restoreRegisterLocal(CpuRegister.X)
|
|
||||||
return
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
println("TODO: RPN: too complicated PokeW") // TODO RPN: split expression?
|
|
||||||
}
|
|
||||||
}
|
|
||||||
is PtBinaryExpression -> {
|
|
||||||
if(addrExpr.operator=="+" && addrExpr.left is PtIdentifier && addrExpr.right is PtNumber) {
|
|
||||||
val varname = asmgen.asmVariableName(addrExpr.left as PtIdentifier)
|
|
||||||
if(asmgen.isZpVar(addrExpr.left as PtIdentifier)) {
|
|
||||||
// pointervar is already in the zero page, no need to copy
|
|
||||||
asmgen.saveRegisterLocal(CpuRegister.X, fcall.definingISub()!!)
|
|
||||||
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.AX)
|
|
||||||
val index = (addrExpr.right as PtNumber).number.toHex()
|
|
||||||
asmgen.out("""
|
|
||||||
ldy #$index
|
|
||||||
sta ($varname),y
|
sta ($varname),y
|
||||||
txa
|
txa
|
||||||
iny
|
iny
|
||||||
sta ($varname),y""")
|
sta ($varname),y""")
|
||||||
asmgen.restoreRegisterLocal(CpuRegister.X)
|
asmgen.restoreRegisterLocal(CpuRegister.X)
|
||||||
return
|
return
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else -> { /* fall through */ }
|
else -> { /* fall through */ }
|
||||||
@ -746,45 +723,20 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
|
|||||||
}
|
}
|
||||||
} else fallback()
|
} else fallback()
|
||||||
}
|
}
|
||||||
is PtRpn -> {
|
is PtRpn, is PtBinaryExpression -> {
|
||||||
if(addrExpr.children.size==3) {
|
val result = asmgen.pointerViaIndexRegisterPossible(addrExpr)
|
||||||
// must be 3 (one '+' operator), otherwise expression is too complex for this
|
val pointer = result?.first as? PtIdentifier
|
||||||
val (left, oper, right) = addrExpr.finalOperation()
|
if(result!=null && pointer!=null && asmgen.isZpVar(pointer)) {
|
||||||
if(oper.operator=="+" && left is PtIdentifier && right is PtNumber) {
|
// can do ZP,Y indexing
|
||||||
val varname = asmgen.asmVariableName(left)
|
val varname = asmgen.asmVariableName(pointer)
|
||||||
if(asmgen.isZpVar(left)) {
|
asmgen.assignExpressionToRegister(result.second, RegisterOrPair.Y)
|
||||||
// pointervar is already in the zero page, no need to copy
|
asmgen.out("""
|
||||||
val index = right.number.toHex()
|
lda ($varname),y
|
||||||
asmgen.out("""
|
pha
|
||||||
ldy #$index
|
iny
|
||||||
lda ($varname),y
|
lda ($varname),y
|
||||||
pha
|
tay
|
||||||
iny
|
pla""")
|
||||||
lda ($varname),y
|
|
||||||
tay
|
|
||||||
pla""")
|
|
||||||
} else fallback()
|
|
||||||
} else fallback()
|
|
||||||
} else {
|
|
||||||
println("TODO: RPN: too complicated PeekW") // TODO RPN: split expression?
|
|
||||||
fallback()
|
|
||||||
}
|
|
||||||
}
|
|
||||||
is PtBinaryExpression -> {
|
|
||||||
if(addrExpr.operator=="+" && addrExpr.left is PtIdentifier && addrExpr.right is PtNumber) {
|
|
||||||
val varname = asmgen.asmVariableName(addrExpr.left as PtIdentifier)
|
|
||||||
if(asmgen.isZpVar(addrExpr.left as PtIdentifier)) {
|
|
||||||
// pointervar is already in the zero page, no need to copy
|
|
||||||
val index = (addrExpr.right as PtNumber).number.toHex()
|
|
||||||
asmgen.out("""
|
|
||||||
ldy #$index
|
|
||||||
lda ($varname),y
|
|
||||||
pha
|
|
||||||
iny
|
|
||||||
lda ($varname),y
|
|
||||||
tay
|
|
||||||
pla""")
|
|
||||||
} else fallback()
|
|
||||||
} else fallback()
|
} else fallback()
|
||||||
}
|
}
|
||||||
else -> fallback()
|
else -> fallback()
|
||||||
|
@ -10,21 +10,14 @@ main {
|
|||||||
sub start() {
|
sub start() {
|
||||||
test_stack.test()
|
test_stack.test()
|
||||||
|
|
||||||
str name = "irmen"
|
|
||||||
name[3] = 0
|
|
||||||
if name==".asm" or name=="irm" or name==".src"
|
|
||||||
txt.print("ok\n")
|
|
||||||
else
|
|
||||||
txt.print("fail\n")
|
|
||||||
|
|
||||||
|
|
||||||
uword xx=4000
|
uword xx=4000
|
||||||
ubyte a
|
ubyte a
|
||||||
ubyte b
|
ubyte b
|
||||||
ubyte c
|
ubyte c
|
||||||
ubyte d
|
ubyte d
|
||||||
|
|
||||||
cx16.r0 = peekw(a+xx+b+c+d)
|
cx16.r0 = peekw(xx+42)
|
||||||
|
; TODO cx16.r0 = peekw(a+xx+b+c+d+)
|
||||||
; TODO @(a+xx+b+c+d) = cx16.r0L
|
; TODO @(a+xx+b+c+d) = cx16.r0L
|
||||||
|
|
||||||
; if cx16.r0L in "derp" {
|
; if cx16.r0L in "derp" {
|
||||||
|
Loading…
Reference in New Issue
Block a user