mirror of
https://github.com/irmen/prog8.git
synced 2024-06-12 18:58:42 +00:00
added %option verafxmuls
This commit is contained in:
Irmen de Jong
parent
e1835b5775
commit
a48ce35f0b
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@ -75,6 +75,7 @@ class PtBlock(name: String,
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val library: Boolean,
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val forceOutput: Boolean,
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val noSymbolPrefixing: Boolean,
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val veraFxMuls: Boolean,
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val alignment: BlockAlignment,
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val source: SourceCode, // taken from the module the block is defined in.
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position: Position
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@ -544,9 +544,28 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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return true
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}
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in WordDatatypes -> {
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
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asmgen.out(" jsr math.multiply_words")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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if(expr.definingBlock()!!.veraFxMuls) {
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// cx16 verafx hardware mul
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if(expr.right.isSimple()) {
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asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.R0, expr.left.type in SignedDatatypes)
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asmgen.assignExpressionToRegister(expr.right, RegisterOrPair.R1, expr.left.type in SignedDatatypes)
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} else {
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asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.left.type in SignedDatatypes)
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asmgen.saveRegisterStack(CpuRegister.A, false)
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asmgen.saveRegisterStack(CpuRegister.Y, false)
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asmgen.assignExpressionToRegister(expr.right, RegisterOrPair.R1, expr.left.type in SignedDatatypes)
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asmgen.restoreRegisterStack(CpuRegister.Y, false)
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asmgen.restoreRegisterStack(CpuRegister.A, false)
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asmgen.out(" sta cx16.r0 | sty cx16.r0+1")
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}
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asmgen.out(" jsr verafx.muls")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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return true
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} else {
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
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asmgen.out(" jsr math.multiply_words")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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}
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return true
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}
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else -> return false
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@ -568,8 +587,17 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" jsr math.mul_word_${value}")
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}
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else {
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
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asmgen.out(" jsr math.multiply_words")
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if(expr.definingBlock()!!.veraFxMuls){
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// cx16 verafx hardware mul
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "cx16.r1")
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asmgen.out("""
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sta cx16.r0
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sty cx16.r0+1
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jsr verafx.muls""")
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} else {
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asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier")
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asmgen.out(" jsr math.multiply_words")
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}
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}
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assignRegisterpairWord(target, RegisterOrPair.AY)
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return true
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@ -83,19 +83,20 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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}
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}
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in WordDatatypes -> {
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val block = target.origAstTarget?.definingBlock()
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when(value.kind) {
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SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(target.asmVarname, target.datatype, operator, value.number!!.number.toInt())
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SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, value.asmVarname, value.datatype)
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SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, regName(value), value.datatype)
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SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(target.asmVarname, target.datatype, operator, value.number!!.number.toInt(), block)
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SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, value.asmVarname, value.datatype, block)
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SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(target.asmVarname, target.datatype, operator, regName(value), value.datatype, block)
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SourceStorageKind.MEMORY -> inplacemodificationWordWithMemread(target.asmVarname, target.datatype, operator, value.memory!!)
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SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.array!!)
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SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.array!!, block)
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SourceStorageKind.EXPRESSION -> {
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if(value.expression is PtTypeCast) {
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if (tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) return
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inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression)
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inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression, block)
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}
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else {
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inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression!!)
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inplacemodificationWordWithValue(target.asmVarname, target.datatype, operator, value.expression!!, block)
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}
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}
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}
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@ -230,18 +231,19 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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}
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}
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in WordDatatypes -> {
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val block = target.origAstTarget?.definingBlock()
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when(value.kind) {
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SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(targetVarName, target.datatype, operator, value.number!!.number.toInt())
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SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, value.asmVarname, value.datatype)
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SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, regName(value), value.datatype)
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SourceStorageKind.LITERALNUMBER -> inplacemodificationWordWithLiteralval(targetVarName, target.datatype, operator, value.number!!.number.toInt(), block)
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SourceStorageKind.VARIABLE -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, value.asmVarname, value.datatype, block)
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SourceStorageKind.REGISTER -> inplacemodificationWordWithVariable(targetVarName, target.datatype, operator, regName(value), value.datatype, block)
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SourceStorageKind.MEMORY -> inplacemodificationWordWithMemread(targetVarName, target.datatype, operator, value.memory!!)
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SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.array!!)
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SourceStorageKind.ARRAY -> inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.array!!, block)
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SourceStorageKind.EXPRESSION -> {
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if(value.expression is PtTypeCast) {
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if (tryInplaceModifyWithRemovedRedundantCast(value.expression, target, operator)) return
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inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression)
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inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression, block)
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} else {
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inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression!!)
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inplacemodificationWordWithValue(targetVarName, target.datatype, operator, value.expression!!, block)
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}
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}
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}
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@ -327,12 +329,13 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" lda ${target.array.variable.name},y")
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asmgen.out(" ldx ${target.array.variable.name}+1,y")
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}
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val block = target.origAstTarget?.definingBlock()
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when(value.kind) {
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SourceStorageKind.LITERALNUMBER -> {
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val number = value.number!!.number.toInt()
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if(!inplacemodificationRegisterAXwithLiteralval(operator, number)) {
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asmgen.out(" sta P8ZP_SCRATCH_W1 | stx P8ZP_SCRATCH_W1+1")
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inplacemodificationWordWithLiteralval("P8ZP_SCRATCH_W1", target.datatype, operator, number)
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inplacemodificationWordWithLiteralval("P8ZP_SCRATCH_W1", target.datatype, operator, number, block)
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asmgen.out(" lda P8ZP_SCRATCH_W1 | ldx P8ZP_SCRATCH_W1+1")
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}
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}
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@ -343,7 +346,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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value.datatype
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)) {
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asmgen.out(" sta P8ZP_SCRATCH_W1 | stx P8ZP_SCRATCH_W1+1")
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inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, value.asmVarname, value.datatype)
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inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, value.asmVarname, value.datatype, block)
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asmgen.out(" lda P8ZP_SCRATCH_W1 | ldx P8ZP_SCRATCH_W1+1")
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}
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}
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@ -354,7 +357,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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value.datatype
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)) {
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asmgen.out(" sta P8ZP_SCRATCH_W1 | stx P8ZP_SCRATCH_W1+1")
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inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, regName(value), value.datatype)
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inplacemodificationWordWithVariable("P8ZP_SCRATCH_W1", target.datatype, operator, regName(value), value.datatype, block)
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asmgen.out(" lda P8ZP_SCRATCH_W1 | ldx P8ZP_SCRATCH_W1+1")
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}
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}
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@ -365,15 +368,15 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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}
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SourceStorageKind.ARRAY -> {
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asmgen.out(" sta P8ZP_SCRATCH_W1 | stx P8ZP_SCRATCH_W1+1")
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.array!!)
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.array!!, block)
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asmgen.out(" lda P8ZP_SCRATCH_W1 | ldx P8ZP_SCRATCH_W1+1")
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}
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SourceStorageKind.EXPRESSION -> {
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asmgen.out(" sta P8ZP_SCRATCH_W1 | stx P8ZP_SCRATCH_W1+1")
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if(value.expression is PtTypeCast)
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression)
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression, block)
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else
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression!!)
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inplacemodificationWordWithValue("P8ZP_SCRATCH_W1", target.datatype, operator, value.expression!!, block)
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asmgen.out(" lda P8ZP_SCRATCH_W1 | ldx P8ZP_SCRATCH_W1+1")
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}
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}
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@ -1277,12 +1280,12 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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asmgen.out(" eor $name | sta $name")
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}
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else -> {
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inplacemodificationWordWithValue(name, dt, operator, memread)
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inplacemodificationWordWithValue(name, dt, operator, memread, memread.definingBlock())
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}
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}
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}
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private fun inplacemodificationWordWithLiteralval(name: String, dt: DataType, operator: String, value: Int) {
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private fun inplacemodificationWordWithLiteralval(name: String, dt: DataType, operator: String, value: Int, block: PtBlock?) {
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// note: this contains special optimized cases because we know the exact value. Don't replace this with another routine.
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when (operator) {
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"+" -> {
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@ -1342,16 +1345,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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if(value in asmgen.optimizedWordMultiplications) {
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asmgen.out(" lda $name | ldy $name+1 | jsr math.mul_word_$value | sta $name | sty $name+1")
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} else {
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asmgen.out("""
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lda $name
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sta math.multiply_words.multiplier
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lda $name+1
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sta math.multiply_words.multiplier+1
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lda #<$value
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ldy #>$value
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jsr math.multiply_words
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sta $name
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sty $name+1""")
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if(block?.veraFxMuls==true)
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// cx16 verafx hardware mul
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asmgen.out("""
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lda $name
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ldy $name+1
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sta cx16.r0
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sty cx16.r0+1
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lda #<$value
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ldy #>$value
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sta cx16.r1
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sty cx16.r1+1
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jsr verafx.muls
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sta $name
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sty $name+1""")
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else
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asmgen.out("""
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lda $name
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sta math.multiply_words.multiplier
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lda $name+1
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sta math.multiply_words.multiplier+1
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lda #<$value
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ldy #>$value
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jsr math.multiply_words
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sta $name
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sty $name+1""")
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}
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}
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"/" -> {
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@ -1741,7 +1759,7 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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}
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}
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private fun inplacemodificationWordWithVariable(name: String, dt: DataType, operator: String, otherName: String, valueDt: DataType) {
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private fun inplacemodificationWordWithVariable(name: String, dt: DataType, operator: String, otherName: String, valueDt: DataType, block: PtBlock?) {
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when (valueDt) {
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in ByteDatatypes -> {
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// the other variable is a BYTE type so optimize for that
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@ -1794,23 +1812,46 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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sta $name+1""")
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}
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"*" -> {
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if(valueDt==DataType.UBYTE) {
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asmgen.out(" lda $otherName | sta math.multiply_words.multiplier")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz math.multiply_words.multiplier+1")
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else
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asmgen.out(" lda #0 | sta math.multiply_words.multiplier+1")
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} else {
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asmgen.out(" lda $otherName")
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asmgen.signExtendAYlsb(valueDt)
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asmgen.out(" sta math.multiply_words.multiplier | sty math.multiply_words.multiplier+1")
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}
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asmgen.out("""
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if(block?.veraFxMuls==true) {
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// cx16 verafx hardware muls
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if(valueDt==DataType.UBYTE) {
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asmgen.out(" lda $otherName | sta cx16.r1")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz cx16.r1+1")
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else
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asmgen.out(" lda #0 | sta cx16.r1+1")
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} else {
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asmgen.out(" lda $otherName")
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asmgen.signExtendAYlsb(valueDt)
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asmgen.out(" sta cx16.r1 | sty cx16.r1+1")
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}
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asmgen.out("""
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lda $name
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ldy $name+1
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jsr math.multiply_words
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sta cx16.r0
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sty cx16.r0+1
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jsr verafx.muls
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sta $name
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sty $name+1""")
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} else {
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if(valueDt==DataType.UBYTE) {
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asmgen.out(" lda $otherName | sta math.multiply_words.multiplier")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz math.multiply_words.multiplier+1")
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else
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asmgen.out(" lda #0 | sta math.multiply_words.multiplier+1")
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} else {
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asmgen.out(" lda $otherName")
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asmgen.signExtendAYlsb(valueDt)
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asmgen.out(" sta math.multiply_words.multiplier | sty math.multiply_words.multiplier+1")
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}
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asmgen.out("""
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lda $name
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ldy $name+1
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jsr math.multiply_words
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sta $name
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sty $name+1""")
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}
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}
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"/" -> {
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if(dt==DataType.UWORD) {
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@ -1939,16 +1980,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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"+" -> asmgen.out(" lda $name | clc | adc $otherName | sta $name | lda $name+1 | adc $otherName+1 | sta $name+1")
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"-" -> asmgen.out(" lda $name | sec | sbc $otherName | sta $name | lda $name+1 | sbc $otherName+1 | sta $name+1")
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"*" -> {
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asmgen.out("""
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lda $otherName
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ldy $otherName+1
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sta math.multiply_words.multiplier
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sty math.multiply_words.multiplier+1
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lda $name
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ldy $name+1
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jsr math.multiply_words
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sta $name
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sty $name+1""")
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if(block?.veraFxMuls==true)
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// cx16 verafx hardware muls
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asmgen.out("""
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lda $name
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ldy $name+1
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sta cx16.r0
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sty cx16.r0+1
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lda $otherName
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ldy $otherName+1
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sta cx16.r1
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sty cx16.r1+1
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jsr verafx.muls
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sta $name
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sty $name+1""")
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else
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asmgen.out("""
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lda $otherName
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ldy $otherName+1
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sta math.multiply_words.multiplier
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sty math.multiply_words.multiplier+1
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lda $name
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ldy $name+1
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jsr math.multiply_words
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sta $name
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sty $name+1""")
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}
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"/" -> {
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if(dt==DataType.WORD) {
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@ -2126,17 +2182,31 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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}
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}
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private fun inplacemodificationWordWithValue(name: String, dt: DataType, operator: String, value: PtExpression) {
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private fun inplacemodificationWordWithValue(name: String, dt: DataType, operator: String, value: PtExpression, block: PtBlock?) {
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fun multiplyVarByWordInAY() {
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asmgen.out("""
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sta math.multiply_words.multiplier
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sty math.multiply_words.multiplier+1
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lda $name
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ldy $name+1
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jsr math.multiply_words
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sta $name
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sty $name+1
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""")
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if(block?.veraFxMuls==true)
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// cx16 verafx hardware muls
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asmgen.out("""
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sta cx16.r1
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sty cx16.r1+1
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lda $name
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ldy $name+1
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sta cx16.r0
|
||||
sty cx16.r0+1
|
||||
jsr verafx.muls
|
||||
sta $name
|
||||
sty $name+1
|
||||
""")
|
||||
else
|
||||
asmgen.out("""
|
||||
sta math.multiply_words.multiplier
|
||||
sty math.multiply_words.multiplier+1
|
||||
lda $name
|
||||
ldy $name+1
|
||||
jsr math.multiply_words
|
||||
sta $name
|
||||
sty $name+1
|
||||
""")
|
||||
}
|
||||
|
||||
fun divideVarByWordInAY() {
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ class TestCodegen: FunSpec({
|
|||
//}
|
||||
val codegen = AsmGen6502(prefixSymbols = false)
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("pi", DataType.UBYTE, ZeropageWish.DONTCARE, PtNumber(DataType.UBYTE, 0.0, Position.DUMMY), null, Position.DUMMY))
|
||||
sub.add(PtVariable("particleX", DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, 3u, Position.DUMMY))
|
||||
|
|
@ -94,7 +94,7 @@ class TestCodegen: FunSpec({
|
|||
program.add(block)
|
||||
|
||||
// define the "cx16.r0" virtual register
|
||||
val cx16block = PtBlock("cx16", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val cx16block = PtBlock("cx16", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
cx16block.add(PtMemMapped("r0", DataType.UWORD, 100u, null, Position.DUMMY))
|
||||
program.add(cx16block)
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("pi", DataType.UBYTE, ZeropageWish.DONTCARE, PtNumber(DataType.UBYTE, 0.0, Position.DUMMY), null, Position.DUMMY))
|
||||
sub.add(PtVariable("particleX", DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, 3u, Position.DUMMY))
|
||||
|
|
@ -91,7 +91,7 @@ class TestVmCodeGen: FunSpec({
|
|||
program.add(block)
|
||||
|
||||
// define the "cx16.r0" virtual register
|
||||
val cx16block = PtBlock("cx16", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val cx16block = PtBlock("cx16", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
cx16block.add(PtMemMapped("r0", DataType.UWORD, 100u, null, Position.DUMMY))
|
||||
program.add(cx16block)
|
||||
|
||||
|
|
@ -120,7 +120,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -183,7 +183,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -242,7 +242,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("f1", DataType.FLOAT, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -289,7 +289,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("sb1", DataType.BYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -352,7 +352,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("sb1", DataType.BYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -411,7 +411,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
sub.add(PtVariable("ub1", DataType.UBYTE, ZeropageWish.DONTCARE, null, null, Position.DUMMY))
|
||||
val if1 = PtIfElse(Position.DUMMY)
|
||||
|
|
@ -451,7 +451,7 @@ class TestVmCodeGen: FunSpec({
|
|||
//}
|
||||
val codegen = VmCodeGen()
|
||||
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val block = PtBlock("main", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val block = PtBlock("main", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("test"), Position.DUMMY)
|
||||
val romsub = PtAsmSub("routine", 0x5000u, setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
|
||||
block.add(romsub)
|
||||
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
; https://docs.google.com/document/d/1q34uWOiM3Be2pnaHRVgSdHySI-qsiQWPTo_gfE54PTg/edit
|
||||
|
||||
verafx {
|
||||
%option no_symbol_prefixing
|
||||
|
||||
sub clear(ubyte vbank, uword vaddr, ubyte data, uword amountof32bits) {
|
||||
; use cached 4-byte write to quickly clear a portion of the video memory to a given byte value
|
||||
|
|
|
|||
|
|
@ -254,6 +254,10 @@ fun parseMainModule(filepath: Path,
|
|||
importer.importImplicitLibraryModule("math")
|
||||
}
|
||||
importer.importImplicitLibraryModule("prog8_lib")
|
||||
if(program.allBlocks.any { it.options().any { option->option=="verafxmuls" } }) {
|
||||
if(compTarget.name==Cx16Target.NAME)
|
||||
importer.importImplicitLibraryModule("verafx")
|
||||
}
|
||||
|
||||
if (compilerOptions.launcher == CbmPrgLauncherType.BASIC && compilerOptions.output != OutputType.PRG)
|
||||
errors.err("BASIC launcher requires output type PRG", program.toplevelModule.position)
|
||||
|
|
|
|||
|
|
@ -7,6 +7,8 @@ import prog8.ast.expressions.*
|
|||
import prog8.ast.statements.*
|
||||
import prog8.ast.walk.IAstVisitor
|
||||
import prog8.code.core.*
|
||||
import prog8.code.target.C64Target
|
||||
import prog8.code.target.Cx16Target
|
||||
import prog8.code.target.VMTarget
|
||||
import prog8.compiler.builtinFunctionReturnType
|
||||
import java.io.CharConversionException
|
||||
|
|
@ -822,10 +824,16 @@ internal class AstChecker(private val program: Program,
|
|||
err("this directive may only occur in a block or at module level")
|
||||
if(directive.args.isEmpty())
|
||||
err("missing option directive argument(s)")
|
||||
else if(directive.args.map{it.name in arrayOf("enable_floats", "force_output", "no_sysinit", "align_word", "align_page", "merge", "splitarrays", "no_symbol_prefixing")}.any { !it })
|
||||
else if(directive.args.map{it.name in arrayOf("enable_floats", "force_output", "no_sysinit", "align_word", "align_page", "merge", "splitarrays", "no_symbol_prefixing", "verafxmuls")}.any { !it })
|
||||
err("invalid option directive argument(s)")
|
||||
if(directive.args.any {it.name=="align_word"} && directive.args.any { it.name=="align_page"})
|
||||
err("conflicting alignment options")
|
||||
if(directive.parent is Block) {
|
||||
if(directive.args.any {it.name !in arrayOf("align_word", "align_page", "no_symbol_prefixing", "force_output", "merge", "splitarrays", "verafxmuls")})
|
||||
err("using an option that is not valid for blocks")
|
||||
}
|
||||
if(directive.args.any { it.name=="verafxmuls" } && compilerOptions.compTarget.name != Cx16Target.NAME)
|
||||
err("verafx option is only valid on cx16 target")
|
||||
}
|
||||
else -> throw SyntaxError("invalid directive ${directive.directive}", directive.position)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -161,6 +161,7 @@ class IntermediateAstMaker(private val program: Program, private val errors: IEr
|
|||
private fun transform(srcBlock: Block): PtBlock {
|
||||
var alignment = PtBlock.BlockAlignment.NONE
|
||||
var forceOutput = false
|
||||
var veraFxMuls = false
|
||||
var noSymbolPrefixing = false
|
||||
val directives = srcBlock.statements.filterIsInstance<Directive>()
|
||||
for (directive in directives.filter { it.directive == "%option" }) {
|
||||
|
|
@ -169,15 +170,16 @@ class IntermediateAstMaker(private val program: Program, private val errors: IEr
|
|||
"align_word" -> alignment = PtBlock.BlockAlignment.WORD
|
||||
"align_page" -> alignment = PtBlock.BlockAlignment.PAGE
|
||||
"no_symbol_prefixing" -> noSymbolPrefixing = true
|
||||
"force_output" -> forceOutput=true
|
||||
"force_output" -> forceOutput = true
|
||||
"merge", "splitarrays" -> { /* ignore this one */ }
|
||||
"verafxmuls" -> veraFxMuls = true
|
||||
else -> throw FatalAstException("weird directive option: ${arg.name}")
|
||||
}
|
||||
}
|
||||
}
|
||||
val (vardecls, statements) = srcBlock.statements.partition { it is VarDecl }
|
||||
val src = srcBlock.definingModule.source
|
||||
val block = PtBlock(srcBlock.name, srcBlock.address, srcBlock.isInLibrary, forceOutput, noSymbolPrefixing, alignment, src, srcBlock.position)
|
||||
val block = PtBlock(srcBlock.name, srcBlock.address, srcBlock.isInLibrary, forceOutput, noSymbolPrefixing, veraFxMuls, alignment, src, srcBlock.position)
|
||||
makeScopeVarsDecls(vardecls).forEach { block.add(it) }
|
||||
for (stmt in statements)
|
||||
block.add(transformStatement(stmt))
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ private fun makeSt(): SymbolTable {
|
|||
|
||||
// first build the AST
|
||||
val astProgram = PtProgram("test", DummyMemsizer, DummyStringEncoder)
|
||||
val astBlock1 = PtBlock("block1", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block1"), Position.DUMMY)
|
||||
val astBlock1 = PtBlock("block1", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block1"), Position.DUMMY)
|
||||
val astConstant1 = PtConstant("c1", DataType.UWORD, 12345.0, Position.DUMMY)
|
||||
val astConstant2 = PtConstant("blockc", DataType.UWORD, 999.0, Position.DUMMY)
|
||||
astBlock1.add(astConstant1)
|
||||
|
|
@ -134,7 +134,7 @@ private fun makeSt(): SymbolTable {
|
|||
astBlock1.add(astSub2)
|
||||
val astBfunc = PtIdentifier("msb", DataType.UBYTE, Position.DUMMY)
|
||||
astBlock1.add(astBfunc)
|
||||
val astBlock2 = PtBlock("block2", null, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block2"), Position.DUMMY)
|
||||
val astBlock2 = PtBlock("block2", null, false, false, false, false, PtBlock.BlockAlignment.NONE, SourceCode.Generated("block2"), Position.DUMMY)
|
||||
val astSub21 = PtSub("sub1", emptyList(), null, Position.DUMMY)
|
||||
val astSub22 = PtSub("sub2", emptyList(), null, Position.DUMMY)
|
||||
val astSub221 = PtSub("subsub", emptyList(), null, Position.DUMMY)
|
||||
|
|
|
|||
|
|
@ -525,6 +525,8 @@ the emulators already support it).
|
|||
For now, the hardware 16*16 multiplier is exposed via ``mult`` and ``muls`` routines (unsigned and signed respectively).
|
||||
They are about 4 to 5 times faster as the default 6502 cpu routine for word multiplication.
|
||||
But they depend on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
|
||||
Note: there is a block level %option "verafxmuls" that automatically replaces all word multiplications in that block
|
||||
by calls to verafx.muls/mult, but be careful with it because it may interfere with other Vera operations or IRQs.
|
||||
|
||||
``clear``
|
||||
There's also a ``clear`` routine here to very quickly clear a piece of vram to a given byte value (it writes 4 bytes at a time).
|
||||
|
|
|
|||
|
|
@ -141,7 +141,7 @@ Directives
|
|||
- ``splitarrays`` (block or module) makes all word-arrays in this scope lsb/msb split arrays (as if they all have the @split tag). See Arrays.
|
||||
- ``no_symbol_prefixing`` (block) makes the compiler *not* use symbol-prefixing when translating prog8 code into assembly.
|
||||
Only use this if you know what you're doing because it could result in invalid assembly code being generated.
|
||||
|
||||
- ``verafxmuls`` (block, cx16 target only) uses Vera FX hardware word multiplication on the CommanderX16 for all word multiplications in this block. Warning: this may interfere with IRQs and other Vera operations, so use this only when you know what you're doing. It's safer to explicitly use ``verafx.muls()``.
|
||||
|
||||
.. data:: %asmbinary "<filename>" [, <offset>[, <length>]]
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,6 @@
|
|||
TODO
|
||||
====
|
||||
|
||||
- add %option verafxmuls in block to enable transparent verafx muls use for that block only + add warning message to docs to not use it it in prg AND irq code
|
||||
|
||||
- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
|
||||
- [on branch: ir-less-branch-opcodes] IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
|
||||
- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? etc), but only after setting the status bits is verified!
|
||||
|
|
|
|||
139
examples/test.p8
139
examples/test.p8
|
|
@ -1,76 +1,83 @@
|
|||
%import monogfx
|
||||
%import diskio
|
||||
%import textio
|
||||
;%import math
|
||||
;%import verafx
|
||||
%zeropage basicsafe
|
||||
%option no_sysinit
|
||||
|
||||
main {
|
||||
%option verafxmuls
|
||||
|
||||
sub start() {
|
||||
monogfx.lores()
|
||||
draw()
|
||||
repeat {
|
||||
}
|
||||
}
|
||||
word w1 = -123
|
||||
word w2 = 222
|
||||
ubyte b2 = 222
|
||||
byte sb2 = 111
|
||||
txt.print_w(w1*w2)
|
||||
txt.nl()
|
||||
txt.print_w(w1*222)
|
||||
txt.nl()
|
||||
w1 = -123
|
||||
w1 *= 222
|
||||
txt.print_w(w1)
|
||||
txt.nl()
|
||||
w1 = -123
|
||||
w1 *= w2
|
||||
txt.print_w(w1)
|
||||
txt.nl()
|
||||
w1 = -123
|
||||
w1 *= (w2-1)
|
||||
txt.print_w(w1)
|
||||
txt.nl()
|
||||
w1 = -123
|
||||
w1 *= b2
|
||||
txt.print_w(w1)
|
||||
txt.nl()
|
||||
w1 = -123
|
||||
w1 *= sb2
|
||||
txt.print_w(w1)
|
||||
txt.nl()
|
||||
|
||||
sub draw() {
|
||||
uword xx
|
||||
monogfx.stipple(true)
|
||||
monogfx.fillrect(0,0,200,200,true)
|
||||
monogfx.stipple(false)
|
||||
for xx in 0 to 255 {
|
||||
monogfx.rect(xx, xx/2, 6, 16, 1)
|
||||
sys.waitvsync()
|
||||
monogfx.rect(xx, xx/2, 6, 16, 0)
|
||||
}
|
||||
; txt.print_uw(math.mul16_last_upper())
|
||||
; txt.nl()
|
||||
; uword value1=5678
|
||||
; uword value2=9999
|
||||
; uword result = value1*value2
|
||||
; uword upper16 = math.mul16_last_upper()
|
||||
; txt.print_uw(result)
|
||||
; txt.spc()
|
||||
; txt.print_uw(upper16)
|
||||
; txt.nl()
|
||||
|
||||
monogfx.rect(100, 100, 16, 16, 1)
|
||||
monogfx.rect(101, 101, 15, 15, 1)
|
||||
monogfx.rect(102, 102, 14, 14, 1)
|
||||
monogfx.rect(103, 103, 13, 13, 1)
|
||||
monogfx.rect(104, 104, 12, 12, 1)
|
||||
|
||||
; monogfx.rect(10,10, 1, 1, 1)
|
||||
; monogfx.rect(20,10, 2, 1, 1)
|
||||
; monogfx.rect(30,10, 3, 1, 1)
|
||||
; monogfx.rect(40,10, 1, 2, 1)
|
||||
; monogfx.rect(50,10, 1, 3, 1)
|
||||
; monogfx.rect(60,10, 2, 2, 1)
|
||||
; monogfx.rect(70,10, 3, 3, 1)
|
||||
; monogfx.rect(80,10, 4, 4, 1)
|
||||
; monogfx.rect(120,220, 5, 5, 1)
|
||||
; monogfx.rect(90,10, 5, 5, 1)
|
||||
; monogfx.rect(100,10, 8, 8, 1)
|
||||
; monogfx.rect(110,10, 20, 5, 1)
|
||||
; monogfx.fillrect(10,40, 1, 1, 1)
|
||||
; monogfx.fillrect(20,40, 2, 1, 1)
|
||||
; monogfx.fillrect(30,40, 3, 1, 1)
|
||||
; monogfx.fillrect(40,40, 1, 2, 1)
|
||||
; monogfx.fillrect(50,40, 1, 3, 1)
|
||||
; monogfx.fillrect(60,40, 2, 2, 1)
|
||||
; monogfx.fillrect(70,40, 3, 3, 1)
|
||||
; monogfx.fillrect(80,40, 4, 4, 1)
|
||||
; monogfx.fillrect(90,40, 5, 5, 1)
|
||||
; monogfx.fillrect(100,40, 8, 8, 1)
|
||||
; monogfx.fillrect(110,40, 20, 5, 1)
|
||||
; const word MULTIPLIER = 431
|
||||
;
|
||||
; ; verify results:
|
||||
; for value in -50 to 50 {
|
||||
; if value*MULTIPLIER != verafx.muls(value, MULTIPLIER) {
|
||||
; txt.print("verafx muls error\n")
|
||||
; sys.exit(1)
|
||||
; }
|
||||
; }
|
||||
;
|
||||
;
|
||||
; word value
|
||||
; txt.print("verafx muls...")
|
||||
; cbm.SETTIM(0,0,0)
|
||||
; for value in -50 to 50 {
|
||||
; repeat 250 void verafx.muls(value, MULTIPLIER)
|
||||
; }
|
||||
; txt.print_uw(cbm.RDTIM16())
|
||||
; txt.nl()
|
||||
;
|
||||
; txt.print("6502 muls...")
|
||||
; cbm.SETTIM(0,0,0)
|
||||
; for value in -50 to 50 {
|
||||
; repeat 250 cx16.r0s = value*MULTIPLIER
|
||||
; }
|
||||
; txt.print_uw(cbm.RDTIM16())
|
||||
; txt.nl()
|
||||
|
||||
; monogfx.rect(160, 10, 1, 1, 1)
|
||||
; monogfx.rect(160, 20, 2, 1, 1)
|
||||
; monogfx.rect(160, 30, 3, 1, 1)
|
||||
; monogfx.rect(160, 40, 1, 2, 1)
|
||||
; monogfx.rect(160, 50, 1, 3, 1)
|
||||
; monogfx.rect(160, 60, 2, 2, 1)
|
||||
; monogfx.rect(160, 70, 3, 3, 1)
|
||||
; monogfx.rect(160, 80, 4, 4, 1)
|
||||
; monogfx.rect(160, 90, 5, 5, 1)
|
||||
; monogfx.rect(160, 100, 8, 8, 1)
|
||||
; monogfx.rect(160, 110, 20, 5, 1)
|
||||
; monogfx.fillrect(160, 120, 1, 1, 1)
|
||||
; monogfx.fillrect(160, 130, 2, 1, 1)
|
||||
; monogfx.fillrect(160, 140, 3, 1, 1)
|
||||
; monogfx.fillrect(160, 150, 1, 2, 1)
|
||||
; monogfx.fillrect(160, 160, 1, 3, 1)
|
||||
; monogfx.fillrect(160, 170, 2, 2, 1)
|
||||
; monogfx.fillrect(160, 180, 3, 3, 1)
|
||||
; monogfx.fillrect(160, 190, 4, 4, 1)
|
||||
; monogfx.fillrect(160, 200, 5, 5, 1)
|
||||
; monogfx.fillrect(160, 210, 8, 8, 1)
|
||||
; monogfx.fillrect(160, 220, 20, 5, 1)
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user