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fixes

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This commit is contained in:
Irmen de Jong 2017-12-29 14:17:51 +01:00
parent 52d685b0fc
commit a5b4849058
2 changed files with 65 additions and 30 deletions
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77
il65/codegen.py
View File

@ -406,15 +406,18 @@ class CodeGenerator:
is_incr = isinstance(stmt, ParseResult.InplaceIncrStmt) is_incr = isinstance(stmt, ParseResult.InplaceIncrStmt)
if isinstance(stmt.what, ParseResult.RegisterValue): if isinstance(stmt.what, ParseResult.RegisterValue):
reg = stmt.what.register reg = stmt.what.register
# note: these operations below are all checked to be ok
if is_incr: if is_incr:
if reg == 'A': if reg == 'A':
# a += 1..255
self.p("\t\tclc") self.p("\t\tclc")
self.p("\t\tadc #{:d}".format(stmt.howmuch)) self.p("\t\tadc #{:d}".format(stmt.howmuch))
elif reg in REGISTER_BYTES: elif reg in REGISTER_BYTES:
# 8 bit incr
if stmt.howmuch == 1: if stmt.howmuch == 1:
# x/y += 1
self.p("\t\tin{:s}".format(reg.lower())) self.p("\t\tin{:s}".format(reg.lower()))
else: else:
# x/y += 2..255
self.p("\t\tpha") self.p("\t\tpha")
self.p("\t\tt{:s}a".format(reg.lower())) self.p("\t\tt{:s}a".format(reg.lower()))
self.p("\t\tclc") self.p("\t\tclc")
@ -422,33 +425,49 @@ class CodeGenerator:
self.p("\t\tta{:s}".format(reg.lower())) self.p("\t\tta{:s}".format(reg.lower()))
self.p("\t\tpla") self.p("\t\tpla")
elif reg == "AX": elif reg == "AX":
# AX += 1..255
self.p("\t\tclc") self.p("\t\tclc")
self.p("\t\tadc #1") self.p("\t\tadc #{:d}".format(stmt.howmuch))
self.p("\t\tbne +") self.p("\t\tbcc +")
self.p("\t\tinx") self.p("\t\tinx")
self.p("+") self.p("+")
elif reg == "AY": elif reg == "AY":
# AY += 1..255
self.p("\t\tclc") self.p("\t\tclc")
self.p("\t\tadc #1") self.p("\t\tadc #{:d}".format(stmt.howmuch))
self.p("\t\tbne +") self.p("\t\tbcc +")
self.p("\t\tiny") self.p("\t\tiny")
self.p("+") self.p("+")
elif reg == "XY": elif reg == "XY":
self.p("\t\tinx") if stmt.howmuch == 1:
self.p("\t\tbne +") # XY += 1
self.p("\t\tiny") self.p("\t\tinx")
self.p("+") self.p("\t\tbne +")
self.p("\t\tiny")
self.p("+")
else:
# XY += 2..255
self.p("\t\tpha")
self.p("\t\ttxa")
self.p("\t\tclc")
self.p("\t\tadc #{:d}".format(stmt.howmuch))
self.p("\t\ttax")
self.p("\t\tbcc +")
self.p("\t\tiny")
self.p("+\t\tpla")
else: else:
raise CodeError("invalid incr register: " + reg) raise CodeError("invalid incr register: " + reg)
else: else:
if reg == 'A': if reg == 'A':
# a -= 1..255
self.p("\t\tsec") self.p("\t\tsec")
self.p("\t\tsbc #{:d}".format(stmt.howmuch)) self.p("\t\tsbc #{:d}".format(stmt.howmuch))
elif reg in REGISTER_BYTES: elif reg in REGISTER_BYTES:
# 8 bit decr
if stmt.howmuch == 1: if stmt.howmuch == 1:
# x/y -= 1
self.p("\t\tde{:s}".format(reg.lower())) self.p("\t\tde{:s}".format(reg.lower()))
else: else:
# x/y -= 2..255
self.p("\t\tpha") self.p("\t\tpha")
self.p("\t\tt{:s}a".format(reg.lower())) self.p("\t\tt{:s}a".format(reg.lower()))
self.p("\t\tsec") self.p("\t\tsec")
@ -456,22 +475,36 @@ class CodeGenerator:
self.p("\t\tta{:s}".format(reg.lower())) self.p("\t\tta{:s}".format(reg.lower()))
self.p("\t\tpla") self.p("\t\tpla")
elif reg == "AX": elif reg == "AX":
self.p("\t\tcmp #0") # AX -= 1..255
self.p("\t\tbne +") self.p("\t\tsec")
self.p("\t\tsbc #{:d}".format(stmt.howmuch))
self.p("\t\tbcs +")
self.p("\t\tdex") self.p("\t\tdex")
self.p("+\t\tsec") self.p("+")
self.p("\t\tsbc #1")
elif reg == "AY": elif reg == "AY":
self.p("\t\tcmp #0") # AY -= 1..255
self.p("\t\tbne +") self.p("\t\tsec")
self.p("\t\tsbc #{:d}".format(stmt.howmuch))
self.p("\t\tbcs +")
self.p("\t\tdey") self.p("\t\tdey")
self.p("+\t\tsec") self.p("+")
self.p("\t\tsbc #1")
elif reg == "XY": elif reg == "XY":
self.p("\t\tcpx #0") if stmt.howmuch == 1:
self.p("\t\tbne +") # XY -= 1
self.p("\t\tdey") self.p("\t\tcpx #0")
self.p("+\t\tdex") self.p("\t\tbne +")
self.p("\t\tdey")
self.p("+\t\tdex")
else:
# XY -= 2..255
self.p("\t\tpha")
self.p("\t\ttxa")
self.p("\t\tsec")
self.p("\t\tsbc #{:d}".format(stmt.howmuch))
self.p("\t\ttax")
self.p("\t\tbcs +")
self.p("\t\tdey")
self.p("+\t\tpla")
else: else:
raise CodeError("invalid decr register: " + reg) raise CodeError("invalid decr register: " + reg)
elif isinstance(stmt.what, (ParseResult.MemMappedValue, ParseResult.IndirectValue)): elif isinstance(stmt.what, (ParseResult.MemMappedValue, ParseResult.IndirectValue)):

18
lib/c64lib.ill
View File

@ -540,15 +540,17 @@ sub print_byte_decimal (ubyte: A) -> (A?, X?, Y?) {
asm { asm {
jsr byte2decimal jsr byte2decimal
pha pha
tya cpy #'0'
cmp #'0' bne _print_hundreds
beq + cpx #'0'
bne _print_tens
pla
jmp c64.CHROUT
_print_hundreds tya
jsr c64.CHROUT jsr c64.CHROUT
+ txa _print_tens txa
cmp #'0'
beq +
jsr c64.CHROUT jsr c64.CHROUT
+ pla pla
jmp c64.CHROUT jmp c64.CHROUT
} }
} }
@ -561,7 +563,7 @@ sub print_byte_hex (prefix: SC, ubyte: A) -> (A?, X?, Y?) {
lda #'$' lda #'$'
jsr c64.CHROUT jsr c64.CHROUT
pla pla
+ jsr byte2hex + jsr byte2hex
txa txa
jsr c64.CHROUT jsr c64.CHROUT
tya tya