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https://github.com/irmen/prog8.git
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ir: fix memory mapped var as for loop counter
This commit is contained in:
Irmen de Jong
parent
67a36d8d31
commit
a5ef353484
@ -1,6 +1,7 @@
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package prog8.codegen.intermediate
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import prog8.code.StMemVar
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import prog8.code.StNode
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import prog8.code.StStaticVariable
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import prog8.code.SymbolTable
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import prog8.code.ast.*
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@ -411,7 +412,7 @@ class IRCodeGen(
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}
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private fun translate(forLoop: PtForLoop): IRCodeChunks {
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val loopvar = symbolTable.lookup(forLoop.variable.targetName) as StStaticVariable
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val loopvar = symbolTable.lookup(forLoop.variable.targetName)!!
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val iterable = forLoop.iterable
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val result = mutableListOf<IRCodeChunkBase>()
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when(iterable) {
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@ -480,7 +481,7 @@ class IRCodeGen(
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return result
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}
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private fun translateForInNonConstantRange(forLoop: PtForLoop, loopvar: StStaticVariable): IRCodeChunks {
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private fun translateForInNonConstantRange(forLoop: PtForLoop, loopvar: StNode): IRCodeChunks {
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val iterable = forLoop.iterable as PtRange
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val step = iterable.step.number.toInt()
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if (step==0)
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@ -488,26 +489,36 @@ class IRCodeGen(
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val indexReg = registers.nextFree()
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val endvalueReg = registers.nextFree()
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val loopvarSymbol = loopvar.scopedName.joinToString(".")
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val loopvarDt = irType(loopvar.dt)
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val loopvarDt = when(loopvar) {
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is StMemVar -> loopvar.dt
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is StStaticVariable -> loopvar.dt
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else -> throw AssemblyError("invalid loopvar node type")
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}
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val loopvarDtIr = irType(loopvarDt)
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val loopLabel = createLabelName()
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val result = mutableListOf<IRCodeChunkBase>()
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result += expressionEval.translateExpression(iterable.to, endvalueReg, -1)
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result += expressionEval.translateExpression(iterable.from, indexReg, -1)
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addInstr(result, IRInstruction(Opcode.STOREM, loopvarDt, reg1=indexReg, labelSymbol=loopvarSymbol), null, forLoop.position)
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addInstr(result, IRInstruction(Opcode.STOREM, loopvarDtIr, reg1=indexReg, labelSymbol=loopvarSymbol), null, forLoop.position)
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result += labelFirstChunk(translateNode(forLoop.statements), loopLabel)
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result += addConstMem(loopvarDt, null, loopvarSymbol, step, iterable.position)
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addInstr(result, IRInstruction(Opcode.LOADM, loopvarDt, reg1 = indexReg, labelSymbol = loopvarSymbol), null, forLoop.position)
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val branchOpcode = if(loopvar.dt in SignedDatatypes) Opcode.BLES else Opcode.BLE
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addInstr(result, IRInstruction(branchOpcode, loopvarDt, reg1=indexReg, reg2=endvalueReg, labelSymbol=loopLabel), null, forLoop.position)
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result += addConstMem(loopvarDtIr, null, loopvarSymbol, step, iterable.position)
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addInstr(result, IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = indexReg, labelSymbol = loopvarSymbol), null, forLoop.position)
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val branchOpcode = if(loopvarDt in SignedDatatypes) Opcode.BLES else Opcode.BLE
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addInstr(result, IRInstruction(branchOpcode, loopvarDtIr, reg1=indexReg, reg2=endvalueReg, labelSymbol=loopLabel), null, forLoop.position)
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return result
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}
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private fun translateForInConstantRange(forLoop: PtForLoop, loopvar: StStaticVariable): IRCodeChunks {
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private fun translateForInConstantRange(forLoop: PtForLoop, loopvar: StNode): IRCodeChunks {
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val loopLabel = createLabelName()
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val loopvarSymbol = loopvar.scopedName.joinToString(".")
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val indexReg = registers.nextFree()
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val loopvarDt = irType(loopvar.dt)
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val loopvarDt = when(loopvar) {
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is StMemVar -> loopvar.dt
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is StStaticVariable -> loopvar.dt
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else -> throw AssemblyError("invalid loopvar node type")
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}
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val loopvarDtIr = irType(loopvarDt)
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val iterable = forLoop.iterable as PtRange
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val step = iterable.step.number.toInt()
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val rangeStart = (iterable.from as PtNumber).number.toInt()
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@ -516,27 +527,27 @@ class IRCodeGen(
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throw AssemblyError("step 0")
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if(step>0 && rangeEndUntyped<rangeStart || step<0 && rangeEndUntyped>rangeStart)
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throw AssemblyError("empty range")
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val rangeEndWrapped = if(loopvarDt==IRDataType.BYTE) rangeEndUntyped and 255 else rangeEndUntyped and 65535
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val rangeEndWrapped = if(loopvarDtIr==IRDataType.BYTE) rangeEndUntyped and 255 else rangeEndUntyped and 65535
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val endvalueReg: Int
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val result = mutableListOf<IRCodeChunkBase>()
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val chunk = IRCodeChunk(null, forLoop.position, null)
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if(rangeEndWrapped!=0) {
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endvalueReg = registers.nextFree()
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chunk += IRInstruction(Opcode.LOAD, loopvarDt, reg1 = endvalueReg, value = rangeEndWrapped)
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chunk += IRInstruction(Opcode.LOAD, loopvarDtIr, reg1 = endvalueReg, value = rangeEndWrapped)
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} else {
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endvalueReg = -1 // not used
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}
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chunk += IRInstruction(Opcode.LOAD, loopvarDt, reg1=indexReg, value=rangeStart)
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chunk += IRInstruction(Opcode.STOREM, loopvarDt, reg1=indexReg, labelSymbol=loopvarSymbol)
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chunk += IRInstruction(Opcode.LOAD, loopvarDtIr, reg1=indexReg, value=rangeStart)
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chunk += IRInstruction(Opcode.STOREM, loopvarDtIr, reg1=indexReg, labelSymbol=loopvarSymbol)
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result += chunk
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result += labelFirstChunk(translateNode(forLoop.statements), loopLabel)
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result += addConstMem(loopvarDt, null, loopvarSymbol, step, iterable.position)
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result += addConstMem(loopvarDtIr, null, loopvarSymbol, step, iterable.position)
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val chunk2 = IRCodeChunk(null, forLoop.position, null)
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chunk2 += IRInstruction(Opcode.LOADM, loopvarDt, reg1 = indexReg, labelSymbol = loopvarSymbol)
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chunk2 += IRInstruction(Opcode.LOADM, loopvarDtIr, reg1 = indexReg, labelSymbol = loopvarSymbol)
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chunk2 += if(rangeEndWrapped==0) {
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IRInstruction(Opcode.BNZ, loopvarDt, reg1 = indexReg, labelSymbol = loopLabel)
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IRInstruction(Opcode.BNZ, loopvarDtIr, reg1 = indexReg, labelSymbol = loopLabel)
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} else {
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IRInstruction(Opcode.BNE, loopvarDt, reg1 = indexReg, reg2 = endvalueReg, labelSymbol = loopLabel)
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IRInstruction(Opcode.BNE, loopvarDtIr, reg1 = indexReg, reg2 = endvalueReg, labelSymbol = loopLabel)
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}
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result += chunk2
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return result
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@ -186,7 +186,7 @@ main {
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val result = compileText(target, false, src, writeAssembly = true)!!
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val virtfile = result.compilationOptions.outputDir.resolve(result.program.name + ".p8ir")
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VmRunner().runAndTestProgram(virtfile.readText()) { vm ->
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vm.stepCount shouldBe 9999 // TODO FIX
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vm.stepCount shouldBe 49
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}
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}
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})
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@ -393,6 +393,61 @@ val OpcodesForCpuRegisters = setOf(
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Opcode.STOREZCPU
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)
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val OpcodesWithMemoryAddressAsValue = setOf(
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Opcode.LOADM,
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Opcode.LOADX,
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Opcode.LOADIX,
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Opcode.STOREM,
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Opcode.STOREX,
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Opcode.STOREIX,
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Opcode.STOREZM,
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Opcode.STOREZX,
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Opcode.JUMP,
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Opcode.JUMPA,
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Opcode.CALL,
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Opcode.BSTCC,
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Opcode.BSTCS,
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Opcode.BSTEQ,
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Opcode.BSTNE,
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Opcode.BSTNEG,
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Opcode.BSTPOS,
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Opcode.BSTVC,
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Opcode.BSTVS,
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Opcode.BZ,
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Opcode.BNZ,
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Opcode.BEQ,
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Opcode.BNE,
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Opcode.BLT,
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Opcode.BLTS,
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Opcode.BGT,
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Opcode.BGTS,
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Opcode.BLE,
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Opcode.BLES,
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Opcode.BGE,
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Opcode.BGES,
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Opcode.INCM,
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Opcode.DECM,
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Opcode.NEGM,
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Opcode.ADDM,
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Opcode.SUBM,
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Opcode.MULM,
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Opcode.DIVM,
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Opcode.DIVSM,
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Opcode.INVM,
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Opcode.ORM,
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Opcode.XORM,
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Opcode.ANDM,
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Opcode.ASRM,
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Opcode.LSRM,
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Opcode.LSLM,
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Opcode.LSLNM,
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Opcode.LSRNM,
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Opcode.ASRNM,
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Opcode.ROLM,
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Opcode.RORM,
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Opcode.ROXLM,
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Opcode.ROXRM
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)
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enum class IRDataType {
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BYTE,
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@ -635,7 +690,7 @@ data class IRInstruction(
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require(reg2==null || reg2 in 0..65536) {"reg2 out of bounds"}
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require(fpReg1==null || fpReg1 in 0..65536) {"fpReg1 out of bounds"}
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require(fpReg2==null || fpReg2 in 0..65536) {"fpReg2 out of bounds"}
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if(value!=null && labelSymbol==null) {
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if(value!=null && opcode !in OpcodesWithMemoryAddressAsValue) {
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when (type) {
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IRDataType.BYTE -> require(value in -128..255) {"value out of range for byte: $value"}
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IRDataType.WORD -> require(value in -32768..65535) {"value out of range for word: $value"}
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@ -206,7 +206,7 @@ fun parseIRCodeLine(line: String, location: Pair<IRCodeChunk, Int>?, placeholder
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throw IRParseException("invalid reg1 for $line")
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if(format.reg2==OperandDirection.UNUSED && reg2!=null)
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throw IRParseException("invalid reg2 for $line")
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if(value!=null) {
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if(value!=null && opcode !in OpcodesWithMemoryAddressAsValue) {
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when (type) {
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IRDataType.BYTE -> {
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if (value < -128 || value > 255)
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