mirror of
https://github.com/irmen/prog8.git
synced 2025-02-13 18:31:04 +00:00
IR: implemented << and >> for split word arrays
This commit is contained in:
Irmen de Jong
parent
5d33c93af9
commit
b7f47d354f
@ -513,10 +513,10 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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val valueRegLsb = codeGen.registers.next(IRDataType.BYTE)
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val valueRegMsb = codeGen.registers.next(IRDataType.BYTE)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ANDM, vmDt, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ANDM, vmDt, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ANDM, IRDataType.BYTE, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ANDM, IRDataType.BYTE, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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} else {
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val valueReg = codeGen.registers.next(vmDt)
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@ -527,7 +527,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace word array &")
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return null // TODO("optimized inplace word array &")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place &")
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@ -550,15 +550,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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val eltSize = codeGen.program.memsizer.memorySize(array.type, null)
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if(constIndex!=null && constValue!=null) {
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if(array.splitWords) {
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val valueRegLsb = codeGen.registers.next(IRDataType.BYTE)
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val valueRegMsb = codeGen.registers.next(IRDataType.BYTE)
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require(vmDt==IRDataType.BYTE) { "ehh do we need a word or a byte type here?"}
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ANDM, vmDt, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ANDM, vmDt, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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throw AssemblyError("logical and on (split) word array should not happen")
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} else {
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val valueReg = codeGen.registers.next(vmDt)
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result += IRCodeChunk(null, null).also {
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@ -568,7 +560,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace word array and")
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return null // TODO("optimized inplace word array and")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place and")
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@ -613,12 +605,11 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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if(array.splitWords) {
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val valueRegLsb = codeGen.registers.next(IRDataType.BYTE)
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val valueRegMsb = codeGen.registers.next(IRDataType.BYTE)
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require(vmDt==IRDataType.BYTE) { "ehh do we need a word or a byte type here?"}
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ORM, vmDt, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ORM, vmDt, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ORM, IRDataType.BYTE, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ORM, IRDataType.BYTE, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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} else {
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val valueReg = codeGen.registers.next(vmDt)
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@ -629,7 +620,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace word array |")
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return null // TODO("optimized inplace word array |")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place |")
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@ -652,15 +643,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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val eltSize = codeGen.program.memsizer.memorySize(array.type, null)
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if(constIndex!=null && constValue!=null) {
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if(array.splitWords) {
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val valueRegLsb = codeGen.registers.next(IRDataType.BYTE)
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val valueRegMsb = codeGen.registers.next(IRDataType.BYTE)
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require(vmDt==IRDataType.BYTE) { "ehh do we need a word or a byte type here?"}
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.ORM, vmDt, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ORM, vmDt, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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throw AssemblyError("logical or on (split) word array should not happen")
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} else {
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val valueReg = codeGen.registers.next(vmDt)
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result += IRCodeChunk(null, null).also {
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@ -670,7 +653,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace word array or")
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return null // TODO("optimized inplace word array or")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place or"")
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@ -779,7 +762,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace array * non-const")
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return null // TODO("optimized inplace array * non-const")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place *"")
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@ -837,7 +820,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace array -")
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return null // TODO("optimized inplace array -")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place -"")
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@ -930,7 +913,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace array +")
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return null // TODO("optimized inplace array +")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place +"")
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@ -997,11 +980,35 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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private fun operatorShiftRightInplace(symbol: String?, array: PtArrayIndexer?, constAddress: Int?, memory: PtMemoryByte?, vmDt: IRDataType, operand: PtExpression, signed: Boolean): IRCodeChunks? {
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if(array!=null) {
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if(array.splitWords)
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return null // TODO("optimized >> in split word array")
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else {
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return null // TODO("optimized >> in array")
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val result = mutableListOf<IRCodeChunkBase>()
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val constIndex = array.index.asConstInteger()
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val constValue = operand.asConstInteger()
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if(constIndex!=null && constValue!=null) {
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if(array.splitWords) {
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repeat(constValue) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LSRM, IRDataType.BYTE, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ROXRM, IRDataType.BYTE, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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}
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}
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} else {
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val eltSize = codeGen.program.memsizer.memorySize(array.type, null)
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if(constValue==1) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LSRM, vmDt, labelSymbol = array.variable.name, symbolOffset = constIndex*eltSize)
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}
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} else {
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val valueReg = codeGen.registers.next(IRDataType.BYTE)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueReg, immediate=constValue and 255)
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it += IRInstruction(Opcode.LSRNM, vmDt, reg1=valueReg, labelSymbol = array.variable.name, symbolOffset = constIndex*eltSize)
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}
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}
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}
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return result
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}
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return null // TODO("optimized >> in array")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place >>"")
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@ -1029,11 +1036,35 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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private fun operatorShiftLeftInplace(symbol: String?, array: PtArrayIndexer?, constAddress: Int?, memory: PtMemoryByte?, vmDt: IRDataType, operand: PtExpression): IRCodeChunks? {
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if(array!=null) {
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if(array.splitWords)
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return null // TODO("optimized << in split word array")
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else {
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return null // TODO("optimized << in array")
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val result = mutableListOf<IRCodeChunkBase>()
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val constIndex = array.index.asConstInteger()
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val constValue = operand.asConstInteger()
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if(constIndex!=null && constValue!=null) {
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if(array.splitWords) {
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repeat(constValue) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LSLM, IRDataType.BYTE, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.ROXLM, IRDataType.BYTE, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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}
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} else {
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val eltSize = codeGen.program.memsizer.memorySize(array.type, null)
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if(constValue==1) {
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LSLM, vmDt, labelSymbol = array.variable.name, symbolOffset = constIndex*eltSize)
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}
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} else {
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val valueReg = codeGen.registers.next(IRDataType.BYTE)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueReg, immediate=constValue and 255)
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it += IRInstruction(Opcode.LSLNM, vmDt, reg1=valueReg, labelSymbol = array.variable.name, symbolOffset = constIndex*eltSize)
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}
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}
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}
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return result
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}
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return null // TODO("optimized << in array")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place <<"")
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@ -1067,12 +1098,11 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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if(array.splitWords) {
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val valueRegLsb = codeGen.registers.next(IRDataType.BYTE)
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val valueRegMsb = codeGen.registers.next(IRDataType.BYTE)
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require(vmDt==IRDataType.BYTE) { "ehh do we need a word or a byte type here?"}
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, vmDt, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.XORM, vmDt, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.XORM, vmDt, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegLsb, immediate=constValue and 255)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=valueRegMsb, immediate=constValue shr 8)
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it += IRInstruction(Opcode.XORM, IRDataType.BYTE, reg1=valueRegLsb, labelSymbol = array.variable.name+"_lsb", symbolOffset = constIndex)
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it += IRInstruction(Opcode.XORM, IRDataType.BYTE, reg1=valueRegMsb, labelSymbol = array.variable.name+"_msb", symbolOffset = constIndex)
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}
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} else {
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val valueReg = codeGen.registers.next(vmDt)
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@ -1083,7 +1113,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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}
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return result
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}
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return null // TODO("inplace word array xor")
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return null // TODO("optimized inplace word array xor")
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}
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if(constAddress==null && memory!=null)
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return null // TODO("optimized memory in-place xor"")
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@ -1,9 +1,6 @@
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TODO
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====
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- IR: implement "optimized << in array" / "optimized >> in array"
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- IR: implement "optimized << in split word array" / "optimized >> in split word array"
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- add paypal donation button as well?
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- announce prog8 on the 6502.org site?
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@ -51,6 +48,7 @@ IR/VM
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- getting it in shape for code generation...: the IR file should be able to encode every detail about a prog8 program (the VM doesn't have to actually be able to run all of it though!)
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- add BZ and BNZ instructions? To replace CMPI #0 + Branch?
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- implement fast code paths for TODO("inplace split....
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- implement more TODOs in AssignmentGen
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- sometimes source lines end up missing in the output p8ir, for example the first assignment is gone in:
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sub start() {
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cx16.r0L = cx16.r1 as ubyte
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138
examples/test.p8
138
examples/test.p8
@ -4,72 +4,102 @@
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main {
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sub start() {
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uword wv = %01000010_01000010
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; expected: $8484 $4242
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sys.set_carry()
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rol(wv)
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txt.print_uwhex(wv, true)
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sys.set_carry()
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ror(wv)
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txt.print_uwhex(wv, true)
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txt.nl()
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wv = %01000010_01000010
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sys.set_carry()
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rol2(wv)
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txt.print_uwhex(wv, true)
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sys.set_carry()
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ror2(wv)
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txt.print_uwhex(wv, true)
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txt.nl()
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uword[] @nosplit arr = [ %01000010_01000010 , %01000010_01000010, %01000010_01000010 ]
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uword[] @split arrsplit = [ %01000010_01000010 , %01000010_01000010, %01000010_01000010 ]
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sys.set_carry()
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rol(arr[2])
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txt.print_uwhex(arr[2], true)
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sys.set_carry()
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ror(arr[2])
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txt.print_uwhex(arr[2], true)
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txt.nl()
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sys.set_carry()
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rol2(arr[1])
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txt.print_uwhex(arr[1], true)
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sys.set_carry()
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ror2(arr[1])
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txt.print_uwhex(arr[1], true)
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ubyte[] arrb = [ %01000010 , %01000010, %01000010 ]
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; expected $09
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arrb[2] = $12
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arrb[2] >>= 1
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txt.print_ubhex(arrb[2], true)
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txt.nl()
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sys.set_carry()
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rol(arrsplit[2])
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txt.print_uwhex(arrsplit[2], true)
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sys.set_carry()
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ror(arrsplit[2])
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txt.print_uwhex(arrsplit[2], true)
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txt.nl()
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sys.set_carry()
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rol2(arrsplit[1])
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txt.print_uwhex(arrsplit[1], true)
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sys.set_carry()
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ror2(arrsplit[1])
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txt.print_uwhex(arrsplit[1], true)
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txt.nl()
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; expected $2468 $1234
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; expected $091a
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arr[2] = $1234
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arr[2] <<= 1
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txt.print_uwhex(arr[2], true)
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arr[2] >>= 1
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txt.print_uwhex(arr[2], true)
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txt.nl()
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; expected $02
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arrb[2] = $12
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arrb[2] >>= 3
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txt.print_ubhex(arrb[2], true)
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txt.nl()
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; expected $0246
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arr[2] = $1234
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arr[2] >>= 3
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txt.print_uwhex(arr[2], true)
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txt.nl()
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; arr[2] >>= 1
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; txt.print_uwhex(arr[2], true)
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; txt.nl()
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; expected $091a
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arrsplit[2] = $1234
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arrsplit[2] <<= 1
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txt.print_uwhex(arrsplit[2], true)
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arrsplit[2] >>= 1
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txt.print_uwhex(arrsplit[2], true)
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txt.nl()
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; expected $0246
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arrsplit[2] = $1234
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arrsplit[2] >>= 3
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txt.print_uwhex(arrsplit[2], true)
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txt.nl()
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; arrsplit[2] >>= 1
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; txt.print_uwhex(arrsplit[2], true)
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; txt.nl()
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; uword wv = %01000010_01000010
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;
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; ; expected: $8484 $4242
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; sys.set_carry()
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; rol(wv)
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; txt.print_uwhex(wv, true)
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; sys.set_carry()
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; ror(wv)
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; txt.print_uwhex(wv, true)
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; txt.nl()
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;
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; wv = %01000010_01000010
|
||||
; sys.set_carry()
|
||||
; rol2(wv)
|
||||
; txt.print_uwhex(wv, true)
|
||||
; sys.set_carry()
|
||||
; ror2(wv)
|
||||
; txt.print_uwhex(wv, true)
|
||||
; txt.nl()
|
||||
;
|
||||
; sys.set_carry()
|
||||
; rol(arr[2])
|
||||
; txt.print_uwhex(arr[2], true)
|
||||
; sys.set_carry()
|
||||
; ror(arr[2])
|
||||
; txt.print_uwhex(arr[2], true)
|
||||
; txt.nl()
|
||||
; sys.set_carry()
|
||||
; rol2(arr[1])
|
||||
; txt.print_uwhex(arr[1], true)
|
||||
; sys.set_carry()
|
||||
; ror2(arr[1])
|
||||
; txt.print_uwhex(arr[1], true)
|
||||
; txt.nl()
|
||||
;
|
||||
; sys.set_carry()
|
||||
; rol(arrsplit[2])
|
||||
; txt.print_uwhex(arrsplit[2], true)
|
||||
; sys.set_carry()
|
||||
; ror(arrsplit[2])
|
||||
; txt.print_uwhex(arrsplit[2], true)
|
||||
; txt.nl()
|
||||
; sys.set_carry()
|
||||
; rol2(arrsplit[1])
|
||||
; txt.print_uwhex(arrsplit[1], true)
|
||||
; sys.set_carry()
|
||||
; ror2(arrsplit[1])
|
||||
; txt.print_uwhex(arrsplit[1], true)
|
||||
; txt.nl()
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user