mirror of
https://github.com/irmen/prog8.git
synced 2024-09-07 03:54:27 +00:00
fixed missing shifts codegen
This commit is contained in:
parent
7d8496c874
commit
c07907e7bd
@ -732,7 +732,7 @@ internal class AstChecker(private val program: Program,
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}
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}
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"**" -> {
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"**" -> {
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if(leftDt in IntegerDatatypes)
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if(leftDt in IntegerDatatypes)
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errors.err("power operator requires floating point", expr.position)
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errors.err("power operator requires floating point operands", expr.position)
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}
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}
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"and", "or", "xor" -> {
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"and", "or", "xor" -> {
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// only integer numeric operands accepted, and if literal constants, only boolean values accepted (0 or 1)
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// only integer numeric operands accepted, and if literal constants, only boolean values accepted (0 or 1)
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@ -91,7 +91,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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else -> throw AssemblyError("assignment to array: invalid array dt $arrayDt")
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else -> throw AssemblyError("assignment to array: invalid array dt $arrayDt")
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}
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}
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} else {
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} else {
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TODO()
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TODO("aug assignment to element in array/string")
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}
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}
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return true
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return true
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}
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}
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@ -155,16 +155,16 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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sta $targetName+1,y
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sta $targetName+1,y
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""")
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""")
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}
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}
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DataType.ARRAY_F -> return false // TODO optimize?
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DataType.ARRAY_F -> return false // TODO optimize instead of fallback?
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else -> throw AssemblyError("assignment to array: invalid array dt $arrayDt")
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else -> throw AssemblyError("assignment to array: invalid array dt $arrayDt")
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}
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}
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return true
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return true
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}
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}
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is AddressOf -> {
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is AddressOf -> {
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TODO("$assign")
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TODO("assign address into array $assign")
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}
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}
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is DirectMemoryRead -> {
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is DirectMemoryRead -> {
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TODO("$assign")
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TODO("assign memory read into array $assign")
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}
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}
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is ArrayIndexedExpression -> {
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is ArrayIndexedExpression -> {
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if(assign.aug_op != "setvalue")
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if(assign.aug_op != "setvalue")
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@ -294,13 +294,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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"setvalue" -> asmgen.out(" lda #$hexValue | sta $hexAddr")
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"setvalue" -> asmgen.out(" lda #$hexValue | sta $hexAddr")
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"+=" -> asmgen.out(" lda $hexAddr | clc | adc #$hexValue | sta $hexAddr")
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"+=" -> asmgen.out(" lda $hexAddr | clc | adc #$hexValue | sta $hexAddr")
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"-=" -> asmgen.out(" lda $hexAddr | sec | sbc #$hexValue | sta $hexAddr")
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"-=" -> asmgen.out(" lda $hexAddr | sec | sbc #$hexValue | sta $hexAddr")
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"/=" -> TODO("/=")
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"/=" -> TODO("membyte /= const $hexValue")
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"*=" -> TODO("*=")
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"*=" -> TODO("membyte *= const $hexValue")
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"**=" -> TODO("**=")
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"&=" -> asmgen.out(" lda $hexAddr | and #$hexValue | sta $hexAddr")
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"&=" -> asmgen.out(" lda $hexAddr | and #$hexValue | sta $hexAddr")
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"|=" -> asmgen.out(" lda $hexAddr | ora #$hexValue | sta $hexAddr")
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"|=" -> asmgen.out(" lda $hexAddr | ora #$hexValue | sta $hexAddr")
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"^=" -> asmgen.out(" lda $hexAddr | eor #$hexValue | sta $hexAddr")
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"^=" -> asmgen.out(" lda $hexAddr | eor #$hexValue | sta $hexAddr")
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"%=" -> TODO("%=")
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"%=" -> TODO("membyte %= const $hexValue")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -333,9 +332,8 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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Register.Y -> asmgen.out(" sty ${C64Zeropage.SCRATCH_B1} | lda $hexAddr | sec | sbc ${C64Zeropage.SCRATCH_B1} | sta $hexAddr")
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Register.Y -> asmgen.out(" sty ${C64Zeropage.SCRATCH_B1} | lda $hexAddr | sec | sbc ${C64Zeropage.SCRATCH_B1} | sta $hexAddr")
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}
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}
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}
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}
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"/=" -> TODO("/=")
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"/=" -> TODO("membyte /= register")
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"*=" -> TODO("*=")
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"*=" -> TODO("membyte *= register")
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"**=" -> TODO("**=")
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"&=" -> {
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"&=" -> {
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when ((assign.value as RegisterExpr).register) {
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when ((assign.value as RegisterExpr).register) {
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Register.A -> asmgen.out(" and $hexAddr | sta $hexAddr")
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Register.A -> asmgen.out(" and $hexAddr | sta $hexAddr")
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@ -357,7 +355,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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Register.Y -> asmgen.out(" tya | eor $hexAddr | sta $hexAddr")
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Register.Y -> asmgen.out(" tya | eor $hexAddr | sta $hexAddr")
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}
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}
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}
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}
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"%=" -> TODO("%=")
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"%=" -> TODO("membyte %= register")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -366,7 +364,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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}
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}
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is IdentifierReference -> {
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is IdentifierReference -> {
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val sourceName = asmgen.asmIdentifierName(assign.value as IdentifierReference)
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val sourceName = asmgen.asmIdentifierName(assign.value as IdentifierReference)
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TODO("$assign")
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TODO("membyte = variable $assign")
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}
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}
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is DirectMemoryRead -> {
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is DirectMemoryRead -> {
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val memory = (assign.value as DirectMemoryRead).addressExpression.constValue(program)!!.number.toHex()
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val memory = (assign.value as DirectMemoryRead).addressExpression.constValue(program)!!.number.toHex()
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@ -374,7 +372,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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return true
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return true
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}
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}
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is ArrayIndexedExpression -> {
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is ArrayIndexedExpression -> {
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TODO("$assign")
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TODO("membyte = array value $assign")
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}
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}
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is AddressOf -> throw AssemblyError("can't assign address to byte")
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is AddressOf -> throw AssemblyError("can't assign address to byte")
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else -> {
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else -> {
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@ -387,7 +385,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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}
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}
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private fun inplaceAssignToNonConstMemoryByte(assign: Assignment): Boolean {
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private fun inplaceAssignToNonConstMemoryByte(assign: Assignment): Boolean {
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// target address is not constant, so evaluate it on the stack
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// target address is not constant, so evaluate it from the stack
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asmgen.translateExpression(assign.target.memoryAddress!!.addressExpression)
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asmgen.translateExpression(assign.target.memoryAddress!!.addressExpression)
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asmgen.out("""
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asmgen.out("""
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inx
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inx
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@ -405,13 +403,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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"setvalue" -> asmgen.out(" lda #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"setvalue" -> asmgen.out(" lda #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"+=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | clc | adc #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"+=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | clc | adc #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"-=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | sec | sbc #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"-=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | sec | sbc #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"/=" -> TODO("/=")
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"/=" -> TODO("membyte /= const $hexValue")
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"*=" -> TODO("*=")
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"*=" -> TODO("membyte *= const $hexValue")
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"**=" -> TODO("**=")
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"&=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | and #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"&=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | and #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"|=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | ora #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"|=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | ora #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"^=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | eor #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"^=" -> asmgen.out(" lda (${C64Zeropage.SCRATCH_W1}),y | eor #$hexValue | sta (${C64Zeropage.SCRATCH_W1}),y")
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"%=" -> TODO("%=")
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"%=" -> TODO("membyte %= const $hexValue")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -445,9 +442,8 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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Register.Y -> asmgen.out(" tya | ldy #0 | sta ${C64Zeropage.SCRATCH_B1} | lda (${C64Zeropage.SCRATCH_W1}),y | sec | sbc ${C64Zeropage.SCRATCH_B1} | sta (${C64Zeropage.SCRATCH_W1}),y")
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Register.Y -> asmgen.out(" tya | ldy #0 | sta ${C64Zeropage.SCRATCH_B1} | lda (${C64Zeropage.SCRATCH_W1}),y | sec | sbc ${C64Zeropage.SCRATCH_B1} | sta (${C64Zeropage.SCRATCH_W1}),y")
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}
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}
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}
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}
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"/=" -> TODO("/=")
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"/=" -> TODO("membyte /= register")
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"*=" -> TODO("*=")
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"*=" -> TODO("membyte *= register")
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"**=" -> TODO("**=")
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"&=" -> {
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"&=" -> {
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when ((assign.value as RegisterExpr).register) {
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when ((assign.value as RegisterExpr).register) {
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Register.A -> asmgen.out(" ldy #0 | and (${C64Zeropage.SCRATCH_W1}),y| sta (${C64Zeropage.SCRATCH_W1}),y")
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Register.A -> asmgen.out(" ldy #0 | and (${C64Zeropage.SCRATCH_W1}),y| sta (${C64Zeropage.SCRATCH_W1}),y")
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@ -469,7 +465,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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Register.Y -> asmgen.out(" tya | ldy #0 | eor (${C64Zeropage.SCRATCH_W1}),y | sta (${C64Zeropage.SCRATCH_W1}),y")
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Register.Y -> asmgen.out(" tya | ldy #0 | eor (${C64Zeropage.SCRATCH_W1}),y | sta (${C64Zeropage.SCRATCH_W1}),y")
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}
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}
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}
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}
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"%=" -> TODO("%=")
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"%=" -> TODO("membyte %= register")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -478,13 +474,10 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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}
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}
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is IdentifierReference -> {
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is IdentifierReference -> {
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val sourceName = asmgen.asmIdentifierName(assign.value as IdentifierReference)
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val sourceName = asmgen.asmIdentifierName(assign.value as IdentifierReference)
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TODO("$assign")
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TODO("membyte = variable $assign")
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}
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is AddressOf -> {
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TODO("$assign")
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}
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}
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is DirectMemoryRead -> {
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is DirectMemoryRead -> {
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TODO("$assign")
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TODO("membyte = memread $assign")
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}
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}
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is ArrayIndexedExpression -> {
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is ArrayIndexedExpression -> {
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if (assign.aug_op == "setvalue") {
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if (assign.aug_op == "setvalue") {
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@ -511,6 +504,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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}
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}
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return true
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return true
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}
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}
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is AddressOf -> throw AssemblyError("can't assign memory address to memory byte")
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else -> {
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else -> {
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fallbackAssignment(assign)
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fallbackAssignment(assign)
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return true
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return true
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@ -534,13 +528,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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"setvalue" -> asmgen.out(" lda #$hexValue | sta $targetName")
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"setvalue" -> asmgen.out(" lda #$hexValue | sta $targetName")
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"+=" -> asmgen.out(" lda $targetName | clc | adc #$hexValue | sta $targetName")
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"+=" -> asmgen.out(" lda $targetName | clc | adc #$hexValue | sta $targetName")
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"-=" -> asmgen.out(" lda $targetName | sec | sbc #$hexValue | sta $targetName")
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"-=" -> asmgen.out(" lda $targetName | sec | sbc #$hexValue | sta $targetName")
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"/=" -> TODO("/=")
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"/=" -> TODO("variable /= const $hexValue")
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"*=" -> TODO("*=")
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"*=" -> TODO("variable *= const $hexValue")
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"**=" -> TODO("**=")
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"&=" -> asmgen.out(" lda $targetName | and #$hexValue | sta $targetName")
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"&=" -> asmgen.out(" lda $targetName | and #$hexValue | sta $targetName")
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"|=" -> asmgen.out(" lda $targetName | ora #$hexValue | sta $targetName")
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"|=" -> asmgen.out(" lda $targetName | ora #$hexValue | sta $targetName")
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"^=" -> asmgen.out(" lda $targetName | eor #$hexValue | sta $targetName")
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"^=" -> asmgen.out(" lda $targetName | eor #$hexValue | sta $targetName")
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"%=" -> TODO("%=")
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"%=" -> TODO("variable %= const $hexValue")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -560,7 +553,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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Register.Y -> asmgen.out(" sty $targetName")
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Register.Y -> asmgen.out(" sty $targetName")
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}
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}
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}
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}
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else -> TODO("$assign")
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else -> TODO("aug.assign variable = register $assign")
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}
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}
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return true
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return true
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}
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}
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@ -570,13 +563,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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"setvalue" -> asmgen.out(" lda $sourceName | sta $targetName")
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"setvalue" -> asmgen.out(" lda $sourceName | sta $targetName")
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"+=" -> asmgen.out(" lda $targetName | clc | adc $sourceName | sta $targetName")
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"+=" -> asmgen.out(" lda $targetName | clc | adc $sourceName | sta $targetName")
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"-=" -> asmgen.out(" lda $targetName | sec | sbc $sourceName | sta $targetName")
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"-=" -> asmgen.out(" lda $targetName | sec | sbc $sourceName | sta $targetName")
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"/=" -> TODO("/=")
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"/=" -> TODO("variable /= variable")
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"*=" -> TODO("*=")
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"*=" -> TODO("variable *= variable")
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"**=" -> TODO("**=")
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"&=" -> asmgen.out(" lda $targetName | and $sourceName | sta $targetName")
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"&=" -> asmgen.out(" lda $targetName | and $sourceName | sta $targetName")
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"|=" -> asmgen.out(" lda $targetName | ora $sourceName | sta $targetName")
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"|=" -> asmgen.out(" lda $targetName | ora $sourceName | sta $targetName")
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"^=" -> asmgen.out(" lda $targetName | eor $sourceName | sta $targetName")
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"^=" -> asmgen.out(" lda $targetName | eor $sourceName | sta $targetName")
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"%=" -> TODO("%=")
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"%=" -> TODO("variable %= variable")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
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@ -584,7 +576,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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return true
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return true
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}
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}
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is DirectMemoryRead -> {
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is DirectMemoryRead -> {
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TODO("$assign")
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TODO("variable = memory read $assign")
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}
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}
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is ArrayIndexedExpression -> {
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is ArrayIndexedExpression -> {
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if (assign.aug_op == "setvalue") {
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if (assign.aug_op == "setvalue") {
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@ -647,7 +639,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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sta $targetName+1
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sta $targetName+1
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""")
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""")
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}
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}
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else -> TODO("$assign")
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else -> TODO("variable aug.assign ${assign.aug_op} const $hexNumber")
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}
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}
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return true
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return true
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}
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}
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@ -692,7 +684,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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return true
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return true
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}
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}
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else -> {
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else -> {
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TODO("$assign")
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TODO("variable aug.assign variable")
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}
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}
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}
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}
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return true
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return true
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@ -789,7 +781,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
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""")
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""")
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return true
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return true
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||||||
}
|
}
|
||||||
else -> TODO("$assign")
|
else -> TODO("float const value aug.assign $assign")
|
||||||
}
|
}
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
@ -802,7 +794,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> assignFromFloatVariable(assign.target, assign.value as IdentifierReference)
|
"setvalue" -> assignFromFloatVariable(assign.target, assign.value as IdentifierReference)
|
||||||
"+=" -> return false // TODO optimized float += variable
|
"+=" -> return false // TODO optimized float += variable
|
||||||
"-=" -> return false // TODO optimized float -= variable
|
"-=" -> return false // TODO optimized float -= variable
|
||||||
else -> TODO("$assign")
|
else -> TODO("float non-const value aug.assign $assign")
|
||||||
}
|
}
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
@ -838,7 +830,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
sta $targetName+4
|
sta $targetName+4
|
||||||
""")
|
""")
|
||||||
}
|
}
|
||||||
else -> TODO("$assign")
|
else -> TODO("float $assign")
|
||||||
}
|
}
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
@ -878,13 +870,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" lda #$hexValue")
|
"setvalue" -> asmgen.out(" lda #$hexValue")
|
||||||
"+=" -> asmgen.out(" clc | adc #$hexValue")
|
"+=" -> asmgen.out(" clc | adc #$hexValue")
|
||||||
"-=" -> asmgen.out(" sec | sbc #$hexValue")
|
"-=" -> asmgen.out(" sec | sbc #$hexValue")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("A /= const $hexValue")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("A *= const $hexValue")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" and #$hexValue")
|
"&=" -> asmgen.out(" and #$hexValue")
|
||||||
"|=" -> asmgen.out(" ora #$hexValue")
|
"|=" -> asmgen.out(" ora #$hexValue")
|
||||||
"^=" -> asmgen.out(" eor #$hexValue")
|
"^=" -> asmgen.out(" eor #$hexValue")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("A %= const $hexValue")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -895,13 +886,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldx #$hexValue")
|
"setvalue" -> asmgen.out(" ldx #$hexValue")
|
||||||
"+=" -> asmgen.out(" txa | clc | adc #$hexValue | tax")
|
"+=" -> asmgen.out(" txa | clc | adc #$hexValue | tax")
|
||||||
"-=" -> asmgen.out(" txa | sec | sbc #$hexValue | tax")
|
"-=" -> asmgen.out(" txa | sec | sbc #$hexValue | tax")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("X /= const $hexValue")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("X *= const $hexValue")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" txa | and #$hexValue | tax")
|
"&=" -> asmgen.out(" txa | and #$hexValue | tax")
|
||||||
"|=" -> asmgen.out(" txa | ora #$hexValue | tax")
|
"|=" -> asmgen.out(" txa | ora #$hexValue | tax")
|
||||||
"^=" -> asmgen.out(" txa | eor #$hexValue | tax")
|
"^=" -> asmgen.out(" txa | eor #$hexValue | tax")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("X %= const $hexValue")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -912,13 +902,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldy #$hexValue")
|
"setvalue" -> asmgen.out(" ldy #$hexValue")
|
||||||
"+=" -> asmgen.out(" tya | clc | adc #$hexValue | tay")
|
"+=" -> asmgen.out(" tya | clc | adc #$hexValue | tay")
|
||||||
"-=" -> asmgen.out(" tya | sec | sbc #$hexValue | tay")
|
"-=" -> asmgen.out(" tya | sec | sbc #$hexValue | tay")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("Y /= const $hexValue")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("Y *= const $hexValue")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" tya | and #$hexValue | tay")
|
"&=" -> asmgen.out(" tya | and #$hexValue | tay")
|
||||||
"|=" -> asmgen.out(" tya | ora #$hexValue | tay")
|
"|=" -> asmgen.out(" tya | ora #$hexValue | tay")
|
||||||
"^=" -> asmgen.out(" tya | eor #$hexValue | tay")
|
"^=" -> asmgen.out(" tya | eor #$hexValue | tay")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("Y %= const $hexValue")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -938,13 +927,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" lda $sourceName")
|
"setvalue" -> asmgen.out(" lda $sourceName")
|
||||||
"+=" -> asmgen.out(" clc | adc $sourceName")
|
"+=" -> asmgen.out(" clc | adc $sourceName")
|
||||||
"-=" -> asmgen.out(" sec | sbc $sourceName")
|
"-=" -> asmgen.out(" sec | sbc $sourceName")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("A /= variable")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("A *= variable")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" and $sourceName")
|
"&=" -> asmgen.out(" and $sourceName")
|
||||||
"|=" -> asmgen.out(" ora $sourceName")
|
"|=" -> asmgen.out(" ora $sourceName")
|
||||||
"^=" -> asmgen.out(" eor $sourceName")
|
"^=" -> asmgen.out(" eor $sourceName")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("A %= variable")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -955,13 +943,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldx $sourceName")
|
"setvalue" -> asmgen.out(" ldx $sourceName")
|
||||||
"+=" -> asmgen.out(" txa | clc | adc $sourceName | tax")
|
"+=" -> asmgen.out(" txa | clc | adc $sourceName | tax")
|
||||||
"-=" -> asmgen.out(" txa | sec | sbc $sourceName | tax")
|
"-=" -> asmgen.out(" txa | sec | sbc $sourceName | tax")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("X /= variable")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("X *= variable")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" txa | and $sourceName | tax")
|
"&=" -> asmgen.out(" txa | and $sourceName | tax")
|
||||||
"|=" -> asmgen.out(" txa | ora $sourceName | tax")
|
"|=" -> asmgen.out(" txa | ora $sourceName | tax")
|
||||||
"^=" -> asmgen.out(" txa | eor $sourceName | tax")
|
"^=" -> asmgen.out(" txa | eor $sourceName | tax")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("X %= variable")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -972,13 +959,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldy $sourceName")
|
"setvalue" -> asmgen.out(" ldy $sourceName")
|
||||||
"+=" -> asmgen.out(" tya | clc | adc $sourceName | tay")
|
"+=" -> asmgen.out(" tya | clc | adc $sourceName | tay")
|
||||||
"-=" -> asmgen.out(" tya | sec | sbc $sourceName | tay")
|
"-=" -> asmgen.out(" tya | sec | sbc $sourceName | tay")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("Y /= variable")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("Y *= variable")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" tya | and $sourceName | tay")
|
"&=" -> asmgen.out(" tya | and $sourceName | tay")
|
||||||
"|=" -> asmgen.out(" tya | ora $sourceName | tay")
|
"|=" -> asmgen.out(" tya | ora $sourceName | tay")
|
||||||
"^=" -> asmgen.out(" tya | eor $sourceName | tay")
|
"^=" -> asmgen.out(" tya | eor $sourceName | tay")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("Y %= variable")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -993,8 +979,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
when ((assign.value as RegisterExpr).register) {
|
when ((assign.value as RegisterExpr).register) {
|
||||||
Register.A -> {
|
Register.A -> {
|
||||||
when (assign.target.register!!) {
|
when (assign.target.register!!) {
|
||||||
Register.A -> {
|
Register.A -> {}
|
||||||
}
|
|
||||||
Register.X -> asmgen.out(" tax")
|
Register.X -> asmgen.out(" tax")
|
||||||
Register.Y -> asmgen.out(" tay")
|
Register.Y -> asmgen.out(" tay")
|
||||||
}
|
}
|
||||||
@ -1002,8 +987,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
Register.X -> {
|
Register.X -> {
|
||||||
when (assign.target.register!!) {
|
when (assign.target.register!!) {
|
||||||
Register.A -> asmgen.out(" txa")
|
Register.A -> asmgen.out(" txa")
|
||||||
Register.X -> {
|
Register.X -> {}
|
||||||
}
|
|
||||||
Register.Y -> asmgen.out(" txa | tay")
|
Register.Y -> asmgen.out(" txa | tay")
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1011,8 +995,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
when (assign.target.register!!) {
|
when (assign.target.register!!) {
|
||||||
Register.A -> asmgen.out(" tya")
|
Register.A -> asmgen.out(" tya")
|
||||||
Register.X -> asmgen.out(" tya | tax")
|
Register.X -> asmgen.out(" tya | tax")
|
||||||
Register.Y -> {
|
Register.Y -> {}
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1067,9 +1050,8 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("register /= register")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("register *= register")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> {
|
"&=" -> {
|
||||||
when ((assign.value as RegisterExpr).register) {
|
when ((assign.value as RegisterExpr).register) {
|
||||||
Register.A -> {
|
Register.A -> {
|
||||||
@ -1095,9 +1077,9 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
"|=" -> TODO()
|
"|=" -> TODO("register |= register")
|
||||||
"^=" -> TODO()
|
"^=" -> TODO("register ^= register")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("register %= register")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -1114,13 +1096,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" lda $hexAddr")
|
"setvalue" -> asmgen.out(" lda $hexAddr")
|
||||||
"+=" -> asmgen.out(" clc | adc $hexAddr")
|
"+=" -> asmgen.out(" clc | adc $hexAddr")
|
||||||
"-=" -> asmgen.out(" sec | sbc $hexAddr")
|
"-=" -> asmgen.out(" sec | sbc $hexAddr")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("A /= memory $hexAddr")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("A *= memory $hexAddr")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" and $hexAddr")
|
"&=" -> asmgen.out(" and $hexAddr")
|
||||||
"|=" -> asmgen.out(" ora $hexAddr")
|
"|=" -> asmgen.out(" ora $hexAddr")
|
||||||
"^=" -> asmgen.out(" eor $hexAddr")
|
"^=" -> asmgen.out(" eor $hexAddr")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("A %= memory $hexAddr")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -1131,13 +1112,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldx $hexAddr")
|
"setvalue" -> asmgen.out(" ldx $hexAddr")
|
||||||
"+=" -> asmgen.out(" txa | clc | adc $hexAddr | tax")
|
"+=" -> asmgen.out(" txa | clc | adc $hexAddr | tax")
|
||||||
"-=" -> asmgen.out(" txa | sec | sbc $hexAddr | tax")
|
"-=" -> asmgen.out(" txa | sec | sbc $hexAddr | tax")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("X /= memory $hexAddr")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("X *= memory $hexAddr")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" txa | and $hexAddr | tax")
|
"&=" -> asmgen.out(" txa | and $hexAddr | tax")
|
||||||
"|=" -> asmgen.out(" txa | ora $hexAddr | tax")
|
"|=" -> asmgen.out(" txa | ora $hexAddr | tax")
|
||||||
"^=" -> asmgen.out(" txa | eor $hexAddr | tax")
|
"^=" -> asmgen.out(" txa | eor $hexAddr | tax")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("X %= memory $hexAddr")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -1148,13 +1128,12 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
"setvalue" -> asmgen.out(" ldy $hexAddr")
|
"setvalue" -> asmgen.out(" ldy $hexAddr")
|
||||||
"+=" -> asmgen.out(" tya | clc | adc $hexAddr | tay")
|
"+=" -> asmgen.out(" tya | clc | adc $hexAddr | tay")
|
||||||
"-=" -> asmgen.out(" tya | sec | sbc $hexAddr | tay")
|
"-=" -> asmgen.out(" tya | sec | sbc $hexAddr | tay")
|
||||||
"/=" -> TODO("/=")
|
"/=" -> TODO("Y /= memory $hexAddr")
|
||||||
"*=" -> TODO("*=")
|
"*=" -> TODO("Y *= memory $hexAddr")
|
||||||
"**=" -> TODO("**=")
|
|
||||||
"&=" -> asmgen.out(" tya | and $hexAddr | tay")
|
"&=" -> asmgen.out(" tya | and $hexAddr | tay")
|
||||||
"|=" -> asmgen.out(" tya | ora $hexAddr | tay")
|
"|=" -> asmgen.out(" tya | ora $hexAddr | tay")
|
||||||
"^=" -> asmgen.out(" tya | eor $hexAddr | tay")
|
"^=" -> asmgen.out(" tya | eor $hexAddr | tay")
|
||||||
"%=" -> TODO("%=")
|
"%=" -> TODO("Y %= memory $hexAddr")
|
||||||
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
"<<=" -> throw AssemblyError("<<= should have been replaced by lsl()")
|
||||||
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
">>=" -> throw AssemblyError("<<= should have been replaced by lsr()")
|
||||||
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
else -> throw AssemblyError("invalid aug_op ${assign.aug_op}")
|
||||||
@ -1164,9 +1143,6 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
is AddressOf -> {
|
|
||||||
TODO("$assign")
|
|
||||||
}
|
|
||||||
is ArrayIndexedExpression -> {
|
is ArrayIndexedExpression -> {
|
||||||
if (assign.aug_op == "setvalue") {
|
if (assign.aug_op == "setvalue") {
|
||||||
val arrayExpr = assign.value as ArrayIndexedExpression
|
val arrayExpr = assign.value as ArrayIndexedExpression
|
||||||
@ -1192,6 +1168,7 @@ internal class AssignmentAsmGen(private val program: Program, private val errors
|
|||||||
}
|
}
|
||||||
return true
|
return true
|
||||||
}
|
}
|
||||||
|
is AddressOf -> throw AssemblyError("can't load a memory address into a register")
|
||||||
else -> {
|
else -> {
|
||||||
fallbackAssignment(assign)
|
fallbackAssignment(assign)
|
||||||
return true
|
return true
|
||||||
|
@ -240,28 +240,26 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
DataType.UWORD -> {
|
DataType.UWORD -> {
|
||||||
if (amount<=2) repeat(amount) { asmgen.out(" lsr $ESTACK_HI_PLUS1_HEX,x | ror $ESTACK_LO_PLUS1_HEX,x") }
|
var left = amount
|
||||||
else {
|
while(left>=7) {
|
||||||
var left = amount
|
asmgen.out(" jsr math.shift_right_uw_7")
|
||||||
while(left>=7) {
|
left -= 7
|
||||||
asmgen.out(" jsr math.shift_right_uw_7")
|
|
||||||
left -= 7
|
|
||||||
}
|
|
||||||
if(left>0)
|
|
||||||
asmgen.out(" jsr math.shift_right_uw_$left")
|
|
||||||
}
|
}
|
||||||
|
if (left in 0..2)
|
||||||
|
repeat(left) { asmgen.out(" lsr $ESTACK_HI_PLUS1_HEX,x | ror $ESTACK_LO_PLUS1_HEX,x") }
|
||||||
|
else
|
||||||
|
asmgen.out(" jsr math.shift_right_uw_$left")
|
||||||
}
|
}
|
||||||
DataType.WORD -> {
|
DataType.WORD -> {
|
||||||
if (amount<=2) repeat(amount) { asmgen.out(" lda $ESTACK_HI_PLUS1_HEX,x | asl a | ror $ESTACK_HI_PLUS1_HEX,x | ror $ESTACK_LO_PLUS1_HEX,x") }
|
var left = amount
|
||||||
else {
|
while(left>=7) {
|
||||||
var left=amount
|
asmgen.out(" jsr math.shift_right_w_7")
|
||||||
while(left>=7) {
|
left -= 7
|
||||||
asmgen.out(" jsr math.shift_right_w_7")
|
|
||||||
left -= 7
|
|
||||||
}
|
|
||||||
if(left>0)
|
|
||||||
asmgen.out(" jsr math.shift_right_w_$left")
|
|
||||||
}
|
}
|
||||||
|
if (left in 0..2)
|
||||||
|
repeat(left) { asmgen.out(" lda $ESTACK_HI_PLUS1_HEX,x | asl a | ror $ESTACK_HI_PLUS1_HEX,x | ror $ESTACK_LO_PLUS1_HEX,x") }
|
||||||
|
else
|
||||||
|
asmgen.out(" jsr math.shift_right_w_$left")
|
||||||
}
|
}
|
||||||
else -> throw AssemblyError("weird type")
|
else -> throw AssemblyError("weird type")
|
||||||
}
|
}
|
||||||
@ -281,16 +279,15 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
if (amount<=2) repeat(amount) { asmgen.out(" asl $ESTACK_LO_PLUS1_HEX,x | rol $ESTACK_HI_PLUS1_HEX,x") }
|
var left=amount
|
||||||
else {
|
while(left>=7) {
|
||||||
var left=amount
|
asmgen.out(" jsr math.shift_left_w_7")
|
||||||
while(left>=7) {
|
left -= 7
|
||||||
asmgen.out(" jsr math.shift_left_w_7")
|
|
||||||
left -= 7
|
|
||||||
}
|
|
||||||
if(left > 0)
|
|
||||||
asmgen.out(" jsr math.shift_left_w_$left")
|
|
||||||
}
|
}
|
||||||
|
if (left in 0..2)
|
||||||
|
repeat(left) { asmgen.out(" asl $ESTACK_LO_PLUS1_HEX,x | rol $ESTACK_HI_PLUS1_HEX,x") }
|
||||||
|
else
|
||||||
|
asmgen.out(" jsr math.shift_left_w_$left")
|
||||||
}
|
}
|
||||||
return
|
return
|
||||||
}
|
}
|
||||||
|
@ -1,10 +1,6 @@
|
|||||||
%import c64utils
|
%import c64utils
|
||||||
;%import c64flt
|
|
||||||
;%option enable_floats
|
|
||||||
%zeropage dontuse
|
%zeropage dontuse
|
||||||
|
|
||||||
; TODO fix compiler errors when compiling without optimizations
|
|
||||||
|
|
||||||
|
|
||||||
main {
|
main {
|
||||||
|
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
%import c64utils
|
%import c64utils
|
||||||
%zeropage basicsafe
|
%zeropage basicsafe
|
||||||
|
|
||||||
; TODO fix compiler errors when compiling without optimizations
|
; TODO fix compiler errors when compiling ( /= )
|
||||||
|
|
||||||
|
|
||||||
main {
|
main {
|
||||||
@ -20,7 +20,7 @@ main {
|
|||||||
|
|
||||||
other = purple
|
other = purple
|
||||||
|
|
||||||
other.red /= 2
|
other.red /= 3
|
||||||
other.green = 10 + other.green / 2
|
other.green = 10 + other.green / 2
|
||||||
other.blue = 99
|
other.blue = 99
|
||||||
|
|
||||||
|
@ -9,8 +9,8 @@
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
; TODO fix crash when piece reaches bottom.
|
; TODO fix crash when piece reaches bottom. (codegen issue).
|
||||||
; TODO fix wrong behavior when compiled without optimizations.
|
; TODO fix wrong behavior when compiled without optimizations (codegen issue).
|
||||||
|
|
||||||
|
|
||||||
main {
|
main {
|
||||||
|
@ -2,34 +2,31 @@
|
|||||||
%import c64utils
|
%import c64utils
|
||||||
%import c64flt
|
%import c64flt
|
||||||
%zeropage basicsafe
|
%zeropage basicsafe
|
||||||
|
%option enable_floats
|
||||||
|
|
||||||
|
|
||||||
main {
|
main {
|
||||||
|
|
||||||
sub ss(ubyte qq) {
|
|
||||||
Y=qq
|
|
||||||
}
|
|
||||||
|
|
||||||
sub tiny() {
|
|
||||||
Y++
|
|
||||||
}
|
|
||||||
|
|
||||||
sub tiny2() {
|
|
||||||
for A in 10 to 20 {
|
|
||||||
ubyte xx = A
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
sub start() {
|
sub start() {
|
||||||
uword zomg=2
|
ubyte xx = 10
|
||||||
A=lsb(zomg)
|
float ff = 4
|
||||||
ss(100)
|
float ff2 = 4
|
||||||
ss(101)
|
|
||||||
tiny()
|
; xx /= 2
|
||||||
tiny()
|
;
|
||||||
tiny2()
|
; xx /= 3
|
||||||
tiny2()
|
;
|
||||||
|
; xx *= 2
|
||||||
|
; xx *= 3
|
||||||
|
|
||||||
|
;ff **= 2.0
|
||||||
|
;ff **= 3.0
|
||||||
|
|
||||||
|
ff = ff2 ** 2.0
|
||||||
|
ff = ff2 ** 3.0
|
||||||
|
|
||||||
|
; xx = xx % 5
|
||||||
|
; xx %= 5
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user