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added verafx.clear()

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Irmen de Jong
2023-10-02 01:34:56 +02:00
parent 70ee2026ff
commit c3f1f09ad1
4 changed files with 66 additions and 13 deletions
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11
docs/source/libraries.rst
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@@ -493,9 +493,14 @@ Available for the Cx16 target.
Experimental routines that use the new Vera FX logic (hopefully coming in the Vera in new X16 boards,
the emulators already support it).
For now, the hardware 16*16 multiplier is exposed via ``mult`` and ``muls`` routines.
They are about 4 to 5 times faster as the default 6502 cpu routine for word multiplication.
But they depend on
``mult`` , ``muls``
For now, the hardware 16*16 multiplier is exposed via ``mult`` and ``muls`` routines (unsigned and signed respectively).
They are about 4 to 5 times faster as the default 6502 cpu routine for word multiplication.
But they depend on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
``clear``
There's also a ``clear`` routine here to very quickly clear a piece of vram to a given byte value (it writes 4 bytes at a time).
The routine is around 3 times faster as a regular unrolled loop to clear vram.
Read the `source code <https://github.com/irmen/prog8/tree/master/compiler/res/prog8lib/cx16/verafx.p8>`_
to see what's in there.

2
docs/source/todo.rst
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@@ -1,6 +1,8 @@
TODO
====
- '>>=' can be used as an operator in an expression?? should only be augmented assignment!
- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
- [on branch: ir-less-branch-opcodes] IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? etc), but only after setting the status bits is verified!