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fix compiler crash due to missing 6502 codegen
(assigning a direct memory read byte to a cx16 virtual register)
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@ -3397,6 +3397,13 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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RegisterOrPair.AX -> asmgen.out(" ldx #0 | lda ${address.toHex()}")
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RegisterOrPair.AY -> asmgen.out(" ldy #0 | lda ${address.toHex()}")
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RegisterOrPair.XY -> asmgen.out(" ldy #0 | ldy ${address.toHex()}")
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in Cx16VirtualRegisters -> {
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asmgen.out(" lda ${address.toHex()} | sta cx16.${wordtarget.register.toString().lowercase()}")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz cx16.${wordtarget.register.toString().lowercase()}+1")
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else
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asmgen.out(" lda #0 | sta cx16.${wordtarget.register.toString().lowercase()}+1")
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}
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else -> throw AssemblyError("word regs can only be pair")
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}
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TargetStorageKind.STACK -> {
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@ -3429,6 +3436,13 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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RegisterOrPair.AX -> asmgen.out(" ldx #0")
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RegisterOrPair.AY -> asmgen.out(" ldy #0")
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RegisterOrPair.XY -> asmgen.out(" tax | ldy #0")
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in Cx16VirtualRegisters -> {
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asmgen.out(" sta cx16.${wordtarget.register.toString().lowercase()}")
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if(asmgen.isTargetCpu(CpuType.CPU65c02))
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asmgen.out(" stz cx16.${wordtarget.register.toString().lowercase()}+1")
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else
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asmgen.out(" lda #0 | sta cx16.${wordtarget.register.toString().lowercase()}+1")
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}
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else -> throw AssemblyError("word regs can only be pair")
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}
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}
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