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added verafx.mult16()
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@ -111,7 +111,7 @@ verafx {
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; unsigned multiplication just passes the values as signed to muls
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; if you do this yourself in your call to muls, it will save a few instructions.
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; TODO fix this: verafx.muls doesn't support unsigned values like this
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; TODO fix this: verafx.muls doesn't support unsigned values like this for full 32 bit result
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; inline asmsub mult(uword value1 @R0, uword value2 @R1) clobbers(X) -> uword @AY, uword @R0 {
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; ; Returns the 32 bits unsigned result in AY and R0 (lower word, upper word).
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; %asm {{
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@ -119,6 +119,23 @@ verafx {
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; }}
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; }
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asmsub mult16(uword value1 @R0, uword value2 @R1) clobbers(X) -> uword @AY {
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; Returns the 16 bits unsigned result of R0*R1 in AY.
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; Note: only the lower 16 bits! (the upper 16 bits are not valid for unsigned word multiplications, only for signed)
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%asm {{
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lda cx16.r0
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sta P8ZP_SCRATCH_W1
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lda cx16.r0+1
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sta P8ZP_SCRATCH_W1+1
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jsr verafx.muls
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ldx P8ZP_SCRATCH_W1
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stx cx16.r0
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ldx P8ZP_SCRATCH_W1+1
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stx cx16.r0+1
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rts
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}}
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}
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asmsub muls(word value1 @R0, word value2 @R1) clobbers(X) -> word @AY, word @R0 {
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; Returns the 32 bits signed result in AY and R0 (lower word, upper word).
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; Vera Fx multiplication support only works on signed values!
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@ -982,15 +982,22 @@ the emulators already support it).
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``available``
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Returns true if Vera FX is available, false if not (that would be an older Vera chip)
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``mult`` , ``muls``
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The hardware 16*16 multiplier is exposed via ``mult`` and ``muls`` routines (unsigned and signed respectively).
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They are about 4 to 5 times faster as the default 6502 cpu routine for word multiplication.
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But they depend on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
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``muls``
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The VeraFX signed word 16*16 to 32 multiplier is accessible via the ``muls`` routine.
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It is about 4 to 5 times faster than the default 6502 cpu routine for word multiplication.
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But it depends on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
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Note: there is a block level %option "verafxmuls" that automatically replaces all word multiplications in that block
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by calls to verafx.muls/mult, but be careful with it because it may interfere with other Vera operations or IRQs.
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by calls to verafx, but be careful with it because it may interfere with other Vera operations or IRQs.
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The full 32 bits result value is returned in two result values: lower word, upper word.
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Note: the lower 16 bits of the 32 bits result is returned as the normal subroutine's returnvalue,
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but the upper 16 bits is returned in cx16.r0 so you can still access those separately.
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``mult16``
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VeraFX hardware multiplication of two unsigned words.
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NOTE: it only returns the lower 16 bits of the full 32 bits result, because the upper 16 bits are not valid for unsigned word multiplications here
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(the signed word multiplier ``muls`` does return the full 32 bits result).
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It is about 4 to 5 times faster than the default 6502 cpu routine for word multiplication.
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But it depends on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
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Note: there is a block level %option "verafxmuls" that automatically replaces all word multiplications in that block
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by calls to verafx, but be careful with it because it may interfere with other Vera operations or IRQs.
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``clear``
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Very quickly clear a piece of vram to a given byte value (it writes 4 bytes at a time).
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@ -1,16 +1,20 @@
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%import textio
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%zeropage dontuse
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%output raw
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%launcher none
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%address $2000
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%import verafx
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%zeropage basicsafe
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%option no_sysinit
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main {
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uword @shared variable
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word @shared w1 = -30
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word @shared w2 = -40
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uword @shared uw1 = 9999
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uword @shared uw2 = 4
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sub start() {
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txt.print("hello!\n")
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txt.print_uw(variable)
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cx16.r0 = 12345
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txt.print_uw(verafx.mult16(uw1, uw2))
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txt.spc()
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txt.print_uw(uw1 * uw2)
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txt.nl()
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sys.exit3(1,2,3,false)
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}
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}
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