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fix signed long shift right
This commit is contained in:
@@ -605,7 +605,9 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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">>" -> {
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">>" -> {
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asmgen.out("""
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asmgen.out("""
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ldy $sourceVar
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ldy $sourceVar
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- lsr $targetVar+3
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- lda $targetVar+3
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asl a ; save sign bit
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ror $targetVar+3
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ror $targetVar+2
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ror $targetVar+2
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ror $targetVar+1
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ror $targetVar+1
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ror $targetVar
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ror $targetVar
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@@ -780,100 +782,27 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
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value in 0..2 -> {
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value in 0..2 -> {
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repeat(value) {
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repeat(value) {
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asmgen.out("""
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asmgen.out("""
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lsr $variable+3
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lda $variable+3
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asl a ; save sign bit
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ror $variable+3
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ror $variable+2
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ror $variable+2
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ror $variable+1
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ror $variable+1
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ror $variable""")
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ror $variable""")
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}
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}
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}
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}
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value in 3..7 -> {
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// TODO optimize for more cases 8, 16, 24 etc but don't forget to take the sign bit into account!
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value <= 31 -> {
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asmgen.out("""
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asmgen.out("""
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ldy #$value
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ldy #$value
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- lsr $variable+3
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- lda $variable+3
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asl a ; save sign bit
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ror $variable+3
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ror $variable+2
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ror $variable+2
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ror $variable+1
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ror $variable+1
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ror $variable
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ror $variable
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dey
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dey
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bne -""")
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bne -""")
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}
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}
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value == 8 -> {
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asmgen.out("""
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lda $variable+1
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sta $variable
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lda $variable+2
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sta $variable+1
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lda $variable+3
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sta $variable+2
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lda #0
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sta $variable+3""")
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}
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value in 9..15 -> {
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val shift = value - 8
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asmgen.out("""
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lda $variable+1
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sta $variable
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lda $variable+2
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sta $variable+1
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lda $variable+3
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sta $variable+2
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lda #0
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sta $variable+3
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ldy #$shift
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- lsr $variable+2
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ror $variable+1
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ror $variable
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dey
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bne -""")
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}
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value == 16 -> {
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asmgen.out("""
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lda $variable+3
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sta $variable+1
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lda $variable+2
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sta $variable
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lda #0
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sta $variable+2
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sta $variable+3""")
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}
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value in 17..23 -> {
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val shift = value-16
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asmgen.out("""
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lda $variable+3
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sta $variable+1
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lda $variable+2
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sta $variable
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lda #0
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sta $variable+2
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sta $variable+3
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ldy #$shift
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- lsr $variable+1
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ror $variable
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dey
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bne -""")
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}
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value == 24 -> {
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asmgen.out("""
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lda $variable+3
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sta $variable
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lda #0
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sta $variable+1
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sta $variable+2
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sta $variable+3""")
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}
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value <= 31 -> {
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val shift = value-24
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asmgen.out("""
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lda $variable+3
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ldy #$shift
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- lsr a
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dey
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bne -
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sta $variable
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lda #0
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sta $variable+1
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sta $variable+2
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sta $variable+3""")
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}
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else -> {
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else -> {
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asmgen.out("""
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asmgen.out("""
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lda #0
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lda #0
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@@ -1,7 +1,6 @@
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TODO
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TODO
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====
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====
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CHECK THAT >> and << work correctly for negative longs
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implement the bitwise & | ^ operations as expressions on longs (all types args)
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implement the bitwise & | ^ operations as expressions on longs (all types args)
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@@ -177,6 +176,8 @@ Optimizations
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- more optimized operator handling of different types, for example uword a ^ byte b now does a type cast of b to word first
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- more optimized operator handling of different types, for example uword a ^ byte b now does a type cast of b to word first
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- optimize longEqualsValue() for const and variable operands to not assign needlessly to R0-R3.
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- optimize longEqualsValue() for const and variable operands to not assign needlessly to R0-R3.
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- optimize inplacemodificationLongWithLiteralval() for more shift values such as 8, 16, 24 etc but take sign bit into account!
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- optimize inplacemodificationLongWithLiteralval() for more shift values such as 8, 16, 24 etc but take sign bit into account!
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- Port benchmarks from https://thred.github.io/c-bench-64/ to prog8 and see how it stacks up.
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- Port benchmarks from https://thred.github.io/c-bench-64/ to prog8 and see how it stacks up.
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- Since fixing the missing zp-var initialization, programs grew in size again because STZ's reappeared. Can we add more intelligent (and correct!) optimizations to remove those STZs that might be redundant again?
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- Since fixing the missing zp-var initialization, programs grew in size again because STZ's reappeared. Can we add more intelligent (and correct!) optimizations to remove those STZs that might be redundant again?
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- in Identifier: use typedarray of strings instead of listOf? Other places?
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- in Identifier: use typedarray of strings instead of listOf? Other places?
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