From d494f9d66b1e36fb6833a67793e435ead5bc02a7 Mon Sep 17 00:00:00 2001
From: Irmen de Jong <irmen@razorvine.net>
Date: Sat, 29 Apr 2023 18:04:08 +0200
Subject: [PATCH] fix

---
 .../src/prog8/codegen/intermediate/IRCodeGen.kt               | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
index 8847df6f1..56420c81c 100644
--- a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
+++ b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
@@ -1020,7 +1020,7 @@ class IRCodeGen(
             val number = (condition.right as? PtNumber)?.number?.toInt()
             if(number!=null) {
                 val firstReg = leftTr.resultReg
-                val opcode = when (condition.operator) {
+                opcode = when (condition.operator) {
                     "==" -> Opcode.BEQ
                     "!=" -> Opcode.BNE
                     "<" -> if(signed) Opcode.BLTS else Opcode.BLT
@@ -1231,7 +1231,7 @@ class IRCodeGen(
                 addToResult(result, leftTr, leftTr.resultReg, -1)
                 val number = (condition.right as? PtNumber)?.number?.toInt()
                 if (number!=null) {
-                    val elseBranchOpcode = when (condition.operator) {
+                    elseBranchOpcode = when (condition.operator) {
                         "==" -> Opcode.BNE
                         "!=" -> Opcode.BEQ
                         "<" -> if(signed) Opcode.BGES else Opcode.BGE