fixed optimized code for > and <

This commit is contained in:
Irmen de Jong 2023-08-12 01:07:46 +02:00
parent 584be44743
commit dc870cd5ea
3 changed files with 177 additions and 80 deletions

View File

@ -1085,6 +1085,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
}
// checked OK:
private fun byteLess(expr: PtBinaryExpression, signed: Boolean) {
// note: this is the inverse of byteGreaterEqual
when(expr.right) {
@ -1145,8 +1146,12 @@ internal class AssignmentAsmGen(private val program: PtProgram,
else
asmgen.out("""
cmp P8ZP_SCRATCH_B1
rol a
and #1""")
bcc +
beq +
lda #1
bne ++
+ lda #0
+""")
}
}
}
@ -1155,6 +1160,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
// note: this is the inverse of byteGreater
when(expr.right) {
is PtNumber -> {
// TODO verify if this is correct code on all corner cases
val number = (expr.right as PtNumber).number.toInt()
asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.A, signed)
if(signed)
@ -1176,6 +1182,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
eor #1""")
}
is PtIdentifier -> {
// TODO verify if this is correct code on all corner cases
val varname = (expr.right as PtIdentifier).name
asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.A, signed)
if(signed)
@ -1197,6 +1204,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
eor #1""")
}
else -> {
// TODO verify if this is correct code on all corner cases
// note: left and right operands get reversed here to reduce code size
asmgen.assignByteOperandsToAAndVar(expr.right, expr.left, "P8ZP_SCRATCH_B1")
if(signed)
@ -1219,6 +1227,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
}
// checked OK:
private fun byteGreater(expr: PtBinaryExpression, signed: Boolean) {
// note: this is the inverse of byteLessEqual
when(expr.right) {
@ -1229,6 +1238,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out("""
sec
sbc #$number
beq +++
bvc +
eor #$80
+ bmi +
@ -1239,8 +1249,12 @@ internal class AssignmentAsmGen(private val program: PtProgram,
else
asmgen.out("""
cmp #$number
lda #0
rol a""")
bcc +
beq +
lda #1
bne ++
+ lda #0
+""")
}
is PtIdentifier -> {
val varname = (expr.right as PtIdentifier).name
@ -1249,6 +1263,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
asmgen.out("""
sec
sbc $varname
beq +++
bvc +
eor #$80
+ bmi +
@ -1259,8 +1274,12 @@ internal class AssignmentAsmGen(private val program: PtProgram,
else
asmgen.out("""
cmp $varname
lda #0
rol a""")
bcc +
beq +
lda #1
bne ++
+ lda #0
+""")
}
else -> {
// note: left and right operands get reversed here to reduce code size
@ -1290,6 +1309,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
// note: this is the inverse of byteLess
when(expr.right) {
is PtNumber -> {
// TODO verify if this is correct code on all corner cases
val number = (expr.right as PtNumber).number.toInt()
asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.A, signed)
if(signed) {
@ -1309,6 +1329,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
and #1""")
}
is PtIdentifier -> {
// TODO verify if this is correct code on all corner cases
val varname = (expr.right as PtIdentifier).name
asmgen.assignExpressionToRegister(expr.left, RegisterOrPair.A, signed)
if(signed) {
@ -1328,6 +1349,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
and #1""")
}
else -> {
// TODO verify if this is correct code on all corner cases
// note: left and right operands get reversed here to reduce code size
asmgen.assignByteOperandsToAAndVar(expr.right, expr.left, "P8ZP_SCRATCH_B1")
if(signed)

View File

@ -1,8 +1,7 @@
TODO
====
- fix bug introduced by 017ef8a837077c339993004da9b4ccf5c8ca7b13 (> and/or <= change in AssignmentAsmGen byteLessEquals/byteGreater
Bug manifests in prog8 where 2nd row of aliens jerks too far to the right after a short while.
- verify all comparison cornercases in the TODOS in AssignmentAsmGen
- [on branch:] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
- IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction

View File

@ -3,76 +3,152 @@
main {
sub start() {
ubyte[4] @shared array = 10 to 20 step 3
ubyte[4] @shared array2 = 20 downto 10 step -3
byte[7] @shared array3 = 10 downto -10 step -3
greater()
greater_signed()
less()
less_signed()
}
sub value(ubyte arg) -> ubyte {
cx16.r0++
return arg
}
sub svalue(byte arg) -> byte {
cx16.r0++
return arg
}
sub greater () {
ubyte b1 = 10
ubyte b2 = 20
ubyte b3 = 10
txt.print("101010: ")
ubyte xx
byte bb
cx16.r1=0
for cx16.r0 in 0 to 10 {
cx16.r1++
}
txt.print_uw(cx16.r1)
txt.nl()
txt.nl()
for xx in array {
xx = b2>10
txt.print_ub(xx)
txt.spc()
}
txt.nl()
for xx in array2 {
xx = b2>20
txt.print_ub(xx)
txt.spc()
}
txt.nl()
for bb in array3 {
txt.print_b(bb)
txt.spc()
}
txt.nl()
txt.nl()
for xx in 10 to 20 step 3 { ; TODO fix IR/VM code that wraps around instead of stopping at 19
xx = b2>b1
txt.print_ub(xx)
txt.spc()
}
txt.nl()
for xx in 20 downto 10 step -3 { ; TODO fix IR/VM code that wraps around instead of stopping at 11
xx = b3>b1
txt.print_ub(xx)
txt.spc()
}
txt.nl()
for bb in 10 downto -10 step -3 { ; TODO fix IR/VM code that wraps around instead of stopping at -8
txt.print_b(bb)
txt.spc()
}
txt.nl()
txt.nl()
ubyte ending = 20
for xx in 10 to ending step 3 {
xx = b2>value(10)
txt.print_ub(xx)
txt.spc()
}
txt.nl()
ending =10
for xx in 20 downto ending step -3 {
xx = b3>value(20)
txt.print_ub(xx)
txt.spc()
}
txt.nl()
byte endingb = -10
for bb in 10 downto endingb step -3 {
txt.print_b(bb)
txt.nl()
}
sub greater_signed () {
byte b1 = -20
byte b2 = -10
byte b3 = -20
txt.print("101010: ")
ubyte xx
xx = b2 > -20
txt.print_ub(xx)
txt.spc()
xx = b2 > -10
txt.print_ub(xx)
txt.spc()
xx = b2>b1
txt.print_ub(xx)
txt.spc()
xx = b3>b1
txt.print_ub(xx)
txt.spc()
xx = b2>svalue(-20)
txt.print_ub(xx)
txt.spc()
xx = b3>svalue(-10)
txt.print_ub(xx)
txt.spc()
txt.nl()
}
sub less () {
ubyte b1 = 20
ubyte b2 = 10
ubyte b3 = 20
txt.print("101010: ")
ubyte xx
xx = b2<20
txt.print_ub(xx)
txt.spc()
xx = b2<10
txt.print_ub(xx)
txt.spc()
xx = b2<b1
txt.print_ub(xx)
txt.spc()
xx = b3<b1
txt.print_ub(xx)
txt.spc()
xx = b2<value(20)
txt.print_ub(xx)
txt.spc()
xx = b2<value(10)
txt.print_ub(xx)
txt.spc()
txt.nl()
}
sub less_signed () {
byte b1 = -10
byte b2 = -20
byte b3 = -10
txt.print("101010: ")
ubyte xx
xx = b2 < -10
txt.print_ub(xx)
txt.spc()
xx = b2 < -20
txt.print_ub(xx)
txt.spc()
xx = b2<b1
txt.print_ub(xx)
txt.spc()
xx = b3<b1
txt.print_ub(xx)
txt.spc()
xx = b2<svalue(-10)
txt.print_ub(xx)
txt.spc()
xx = b3<svalue(-20)
txt.print_ub(xx)
txt.spc()
txt.nl()
}
}