This commit is contained in:
Irmen de Jong 2020-09-13 21:04:51 +02:00
parent 82d7179c92
commit e39a38b0d9
2 changed files with 0 additions and 4 deletions

View File

@ -558,7 +558,6 @@ internal class AsmGen(private val program: Program,
when(register) { when(register) {
CpuRegister.A -> out(" pha") CpuRegister.A -> out(" pha")
CpuRegister.X -> { CpuRegister.X -> {
// TODO get rid of REG_X altogether!
if (CompilationTarget.instance.machine.cpu == CpuType.CPU65c02) out(" phx") if (CompilationTarget.instance.machine.cpu == CpuType.CPU65c02) out(" phx")
else { else {
val save = makeLabel("saveX") val save = makeLabel("saveX")

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@ -3,9 +3,6 @@
%import cx16flt %import cx16flt
%zeropage basicsafe %zeropage basicsafe
; TODO fix this, only black squares output...
main { main {
const uword width = 60 const uword width = 60
const uword height = 50 const uword height = 50