branching instructions

This commit is contained in:
Irmen de Jong 2018-09-02 18:32:48 +02:00
parent 492c64f348
commit e39ae3c346
10 changed files with 1150 additions and 707 deletions

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@ -178,8 +178,6 @@ Variables that represent CPU hardware registers
The following variables are reserved The following variables are reserved
and map directly (read/write) to a CPU hardware register: ``A``, ``X``, ``Y``, ``AX``, ``AY``, ``XY`` (the 2-letter ones and map directly (read/write) to a CPU hardware register: ``A``, ``X``, ``Y``, ``AX``, ``AY``, ``XY`` (the 2-letter ones
are a pseudo 16-bit 'register' by pairing two 8-bit registers). are a pseudo 16-bit 'register' by pairing two 8-bit registers).
The following variables are reserved and can be used to *read* a CPU status register bit (can be used in conditional
expressions): ``Pc``, ``Pz``, ``Pn``, ``Pv``.
Special types: const and memory-mapped Special types: const and memory-mapped
@ -279,12 +277,6 @@ You can also create loops by using the ``goto`` statement, but this should usual
Conditional Execution Conditional Execution
--------------------- ---------------------
.. todo::
not sure how to handle direct translation into
[cc, cs, vc, vs, eq, ne, true, not, zero, pos, neg, lt, gt, le, ge]
It defaults to 'true' (=='ne', not-zero) if omitted. ('pos' will translate into 'pl', 'neg' into 'mi')
@todo signed: lts==neg?, gts==eq+pos?, les==neg+eq?, ges==pos?
.. todo:: .. todo::
eventually allow local variable definitions inside the sub blocks but for now, eventually allow local variable definitions inside the sub blocks but for now,
they have to use the same variables as the block the ``if`` statement itself is in. they have to use the same variables as the block the ``if`` statement itself is in.
@ -293,28 +285,30 @@ Conditional Execution
Conditional execution means that the flow of execution changes based on certiain conditions, Conditional execution means that the flow of execution changes based on certiain conditions,
rather than having fixed gotos or subroutine calls:: rather than having fixed gotos or subroutine calls::
if A > 4 goto overflow if (A > 4) goto overflow
if X == 3 then Y = 4 if (X == 3) Y = 4
if X == 3 then Y = 4 else A = 2 if (X == 3) Y = 4 else A = 2
if X == 5 { if (X == 5) {
Y = 99 Y = 99
} else { } else {
A = 3 A = 3
} }
condition = arithmetic expression or logical expression or comparison expression or status_register_flags ( ``SR.cs`` , ``SR.cc``, ``SR.pl`` etc... @todo )
Conditional jumps (``if (condition) goto label``) are compiled using 6502's branching instructions (such as ``bne`` and ``bcc``) so
Conditional jumps are compiled into 6502's branching instructions (such as ``bne`` and ``bcc``) so
the rather strict limit on how *far* it can jump applies. The compiler itself can't figure this the rather strict limit on how *far* it can jump applies. The compiler itself can't figure this
out unfortunately, so it is entirely possible to create code that cannot be assembled successfully. out unfortunately, so it is entirely possible to create code that cannot be assembled successfully.
You'll have to restructure your gotos in the code (place target labels closer to the branch) You'll have to restructure your gotos in the code (place target labels closer to the branch)
if you run into this type of assembler error. if you run into this type of assembler error.
There is a special form of the if-statement that immediately translates into one of the 6502's branching instructions.
This allows you to write a conditional jump or block execution directly acting on the current values of the CPU's status register bits.
The eight branching instructions of the CPU each have an if-equivalent:
``if_cs``, ``if_cc``, ``if_eq``, ``if_ne``, ``if_pl``, ``if_mi``, ``if_vs`` and ``if_vc``.
So ``if_cc goto target`` will directly translate into the single CPU instruction ``BCC target``.
Assignments Assignments
----------- -----------

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@ -290,7 +290,6 @@ The following names are reserved, they have a special meaning::
A X Y ; 6502 hardware registers A X Y ; 6502 hardware registers
AX AY XY ; 16-bit pseudo register pairs AX AY XY ; 16-bit pseudo register pairs
Pc Pz Pn Pv ; bits of the 6502 hardware status register
Operators Operators
@ -490,10 +489,30 @@ With the 'if' / 'else' statement you can execute code depending on the value of
if ( <expression> ) <statements> [else <statements> ] if ( <expression> ) <statements> [else <statements> ]
where <statements> can be just a single statement, or a block, such as this:: where <statements> can be just a single statement for instance just a ``goto``, or it can be a block such as this::
if ( <expression> ) { if ( <expression> ) {
<statements> <statements>
} else { } else {
<alternative statements> <alternative statements>
} }
**Special status register branch form:**
There is a special form of the if-statement that immediately translates into one of the 6502's branching instructions.
It is almost the same as the regular if-statement but it lacks a contional expression part, because the if-statement
itself defines on what status register bit it should branch on::
if_XX <statements> [else <statements> ]
where <statements> can be just a single statement for instance just a ``goto``, or it can be a block such as this::
if_XX {
<statements>
} else {
<alternative statements>
}
The XX corresponds to one of the eigth branching instructions so the possibilities are:
``if_cs``, ``if_cc``, ``if_eq``, ``if_ne``, ``if_pl``, ``if_mi``, ``if_vs`` and ``if_vc``.

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@ -127,17 +127,13 @@ The following 6502 CPU hardware registers are directly usable in program code (a
- ``A``, ``X``, ``Y`` the three main cpu registers (8 bits) - ``A``, ``X``, ``Y`` the three main cpu registers (8 bits)
- ``AX``, ``AY``, ``XY`` surrogate 16-bit registers: LSB-order (lo/hi) combined register pairs - ``AX``, ``AY``, ``XY`` surrogate 16-bit registers: LSB-order (lo/hi) combined register pairs
- ``Pc`` status register (P) Carry flag (read-only, use ``_P_carry`` pseudo-function to write it) - the status register (P) carry flag and interrupt disable flag can be written via the ``_P_carry`` and ``_P_irqd`` builtin functions.
- ``Pz`` status register (P) Zero flag (read-only)
- ``Pn`` status register (P) Negative flag (read-only)
- ``Pv`` status register (P) Overflow flag (read-only)
- the status register (P) Interrupt flag is not accessible, but can be set with the ``_P_irqd`` pseudo-function.
Subroutine Calling Conventions Subroutine Calling Conventions
------------------------------ ------------------------------
Subroutine arguments and results are passed via registers. Subroutine arguments and results are passed via registers.
Sometimes the status register's Carry flag (``Pc``) is used as well (as a boolean flag). Sometimes the status register's Carry flag is used as well (as a boolean flag).
Additional arguments can be passed via memory locations as well ofcourse. Additional arguments can be passed via memory locations as well ofcourse.
But you'll have to be careful when dealing with chained or even recursive calls then, But you'll have to be careful when dealing with chained or even recursive calls then,
because there's a big risk of overwriting those memory locations. because there's a big risk of overwriting those memory locations.

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@ -60,6 +60,7 @@ statement :
| postincrdecr | postincrdecr
| functioncall_stmt | functioncall_stmt
| if_stmt | if_stmt
| branch_stmt
| subroutine | subroutine
| inlineasm | inlineasm
| labeldef | labeldef
@ -150,7 +151,9 @@ identifier : NAME ;
scoped_identifier : NAME ('.' NAME)+ ; scoped_identifier : NAME ('.' NAME)+ ;
register : 'A' | 'X' | 'Y' | 'AX' | 'AY' | 'XY' | 'Pc' | 'Pz' | 'Pn' | 'Pv' ; register : 'A' | 'X' | 'Y' | 'AX' | 'AY' | 'XY' ;
statusflag : 'Pc' | 'Pz' | 'Pn' | 'Pv' ;
integerliteral : DEC_INTEGER | HEX_INTEGER | BIN_INTEGER ; integerliteral : DEC_INTEGER | HEX_INTEGER | BIN_INTEGER ;
@ -187,13 +190,18 @@ sub_address : '=' integerliteral ;
sub_params : sub_param (',' sub_param)* ; sub_params : sub_param (',' sub_param)* ;
sub_param: identifier ':' register; sub_param: identifier ':' (register | statusflag);
sub_returns : '?' | ( sub_return (',' sub_return)* ) ; sub_returns : '?' | ( sub_return (',' sub_return)* ) ;
sub_return: register '?'? ; sub_return: (register | statusflag) '?'? ;
if_stmt : 'if' '(' expression ')' EOL? (statement | statement_block) EOL? else_part? EOL ; // statement is constrained later if_stmt : 'if' '(' expression ')' EOL? (statement | statement_block) EOL? else_part? EOL ; // statement is constrained later
else_part : 'else' EOL? (statement | statement_block) ; // statement is constrained later else_part : 'else' EOL? (statement | statement_block) ; // statement is constrained later
branch_stmt : branchcondition EOL? (statement | statement_block) EOL? else_part? EOL ;
branchcondition: 'if_cs' | 'if_cc' | 'if_eq' | 'if_ne' | 'if_pl' | 'if_mi' | 'if_vs' | 'if_vc' ;

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@ -1,6 +1,8 @@
%output prg %output prg
%launcher basic %launcher basic
%import c64lib
~ main $c003 { ~ main $c003 {
@ -31,6 +33,14 @@
const byte equal = 4==4 const byte equal = 4==4
const byte equal2 = (4+hopla)>0 const byte equal2 = (4+hopla)>0
if_eq goto mega
if_eq {
A=99
} else {
A=100
}
%breakpoint %breakpoint
byte equalQQ = 4==4 byte equalQQ = 4==4

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@ -33,6 +33,24 @@ enum class Register {
PV PV
} }
enum class Statusflag {
Pc,
Pz,
Pv,
Pn
}
enum class BranchCondition {
CS,
CC,
EQ,
NE,
VS,
VC,
MI,
PL
}
class FatalAstException (override var message: String) : Exception(message) class FatalAstException (override var message: String) : Exception(message)
@ -128,6 +146,12 @@ interface IAstProcessor {
return ifStatement return ifStatement
} }
fun process(branchStatement: BranchStatement): IStatement {
branchStatement.statements = branchStatement.statements.map { it.process(this) }
branchStatement.elsepart = branchStatement.elsepart.map { it.process(this) }
return branchStatement
}
fun process(range: RangeExpr): IExpression { fun process(range: RangeExpr): IExpression {
range.from = range.from.process(this) range.from = range.from.process(this)
range.to = range.to.process(this) range.to = range.to.process(this)
@ -759,7 +783,7 @@ data class Subroutine(override val name: String,
} }
data class SubroutineParameter(val name: String, val register: Register) : Node { data class SubroutineParameter(val name: String, val register: Register?, val statusflag: Statusflag?) : Node {
override var position: Position? = null override var position: Position? = null
override lateinit var parent: Node override lateinit var parent: Node
@ -769,7 +793,7 @@ data class SubroutineParameter(val name: String, val register: Register) : Node
} }
data class SubroutineReturnvalue(val register: Register, val clobbered: Boolean) : Node { data class SubroutineReturnvalue(val register: Register?, val statusflag: Statusflag?, val clobbered: Boolean) : Node {
override var position: Position? = null override var position: Position? = null
override lateinit var parent: Node override lateinit var parent: Node
@ -796,6 +820,22 @@ data class IfStatement(var condition: IExpression,
} }
data class BranchStatement(var condition: BranchCondition,
var statements: List<IStatement>, var
elsepart: List<IStatement>) : IStatement {
override var position: Position? = null
override lateinit var parent: Node
override fun linkParents(parent: Node) {
this.parent = parent
statements.forEach { it.linkParents(this) }
elsepart.forEach { it.linkParents(this) }
}
override fun process(processor: IAstProcessor): IStatement = processor.process(this)
}
/***************** Antlr Extension methods to create AST ****************/ /***************** Antlr Extension methods to create AST ****************/
fun il65Parser.ModuleContext.toAst(name: String, withPosition: Boolean) : Module { fun il65Parser.ModuleContext.toAst(name: String, withPosition: Boolean) : Module {
@ -929,7 +969,10 @@ private fun il65Parser.StatementContext.toAst(withPosition: Boolean) : IStatemen
val asm = inlineasm()?.toAst(withPosition) val asm = inlineasm()?.toAst(withPosition)
if(asm!=null) return asm if(asm!=null) return asm
throw FatalAstException(text) val branchstmt = branch_stmt()?.toAst(withPosition)
if(branchstmt!=null) return branchstmt
throw FatalAstException("unprocessed source text: $text")
} }
private fun il65Parser.Functioncall_stmtContext.toAst(withPosition: Boolean): IStatement { private fun il65Parser.Functioncall_stmtContext.toAst(withPosition: Boolean): IStatement {
@ -1002,13 +1045,15 @@ private fun il65Parser.SubroutineContext.toAst(withPosition: Boolean) : Subrouti
private fun il65Parser.Sub_paramsContext.toAst(): List<SubroutineParameter> = private fun il65Parser.Sub_paramsContext.toAst(): List<SubroutineParameter> =
sub_param().map { SubroutineParameter(it.identifier().text, it.register().toAst()) } sub_param().map {
SubroutineParameter(it.identifier().text, it.register()?.toAst(), it.statusflag()?.toAst())
}
private fun il65Parser.Sub_returnsContext.toAst(): List<SubroutineReturnvalue> = private fun il65Parser.Sub_returnsContext.toAst(): List<SubroutineReturnvalue> =
sub_return().map { sub_return().map {
val isClobber = it.childCount==2 && it.children[1].text == "?" val isClobber = it.childCount==2 && it.children[1].text == "?"
SubroutineReturnvalue(it.register().toAst(), isClobber) SubroutineReturnvalue(it.register()?.toAst(), it.statusflag()?.toAst(), isClobber)
} }
@ -1026,6 +1071,7 @@ private fun il65Parser.Assign_targetContext.toAst(withPosition: Boolean) : Assig
private fun il65Parser.RegisterContext.toAst() = Register.valueOf(text.toUpperCase()) private fun il65Parser.RegisterContext.toAst() = Register.valueOf(text.toUpperCase())
private fun il65Parser.StatusflagContext.toAst() = Statusflag.valueOf(text)
private fun il65Parser.DatatypeContext.toAst() = DataType.valueOf(text.toUpperCase()) private fun il65Parser.DatatypeContext.toAst() = DataType.valueOf(text.toUpperCase())
@ -1169,3 +1215,15 @@ private fun il65Parser.If_stmtContext.toAst(withPosition: Boolean): IfStatement
private fun il65Parser.Else_partContext.toAst(withPosition: Boolean): List<IStatement> { private fun il65Parser.Else_partContext.toAst(withPosition: Boolean): List<IStatement> {
return statement_block()?.toAst(withPosition) ?: listOf(statement().toAst(withPosition)) return statement_block()?.toAst(withPosition) ?: listOf(statement().toAst(withPosition))
} }
private fun il65Parser.Branch_stmtContext.toAst(withPosition: Boolean): IStatement {
val branchcondition = branchcondition().toAst(withPosition)
val statements = statement_block()?.toAst(withPosition) ?: listOf(statement().toAst(withPosition))
val elsepart = else_part()?.toAst(withPosition) ?: emptyList()
val result = BranchStatement(branchcondition, statements, elsepart)
result.position = toPosition(withPosition)
return result
}
private fun il65Parser.BranchconditionContext.toAst(withPosition: Boolean) = BranchCondition.valueOf(text.substringAfter('_').toUpperCase())

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@ -76,17 +76,25 @@ T__74=75
T__75=76 T__75=76
T__76=77 T__76=77
T__77=78 T__77=78
LINECOMMENT=79 T__78=79
COMMENT=80 T__79=80
WS=81 T__80=81
EOL=82 T__81=82
NAME=83 T__82=83
DEC_INTEGER=84 T__83=84
HEX_INTEGER=85 T__84=85
BIN_INTEGER=86 T__85=86
FLOAT_NUMBER=87 LINECOMMENT=87
STRING=88 COMMENT=88
INLINEASMBLOCK=89 WS=89
EOL=90
NAME=91
DEC_INTEGER=92
HEX_INTEGER=93
BIN_INTEGER=94
FLOAT_NUMBER=95
STRING=96
INLINEASMBLOCK=97
'~'=1 '~'=1
':'=2 ':'=2
'goto'=3 'goto'=3
@ -165,3 +173,11 @@ INLINEASMBLOCK=89
'?'=76 '?'=76
'if'=77 'if'=77
'else'=78 'else'=78
'if_cs'=79
'if_cc'=80
'if_eq'=81
'if_ne'=82
'if_pl'=83
'if_mi'=84
'if_vs'=85
'if_vc'=86

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@ -27,9 +27,10 @@ public class il65Lexer extends Lexer {
T__52=53, T__53=54, T__54=55, T__55=56, T__56=57, T__57=58, T__58=59, T__52=53, T__53=54, T__54=55, T__55=56, T__56=57, T__57=58, T__58=59,
T__59=60, T__60=61, T__61=62, T__62=63, T__63=64, T__64=65, T__65=66, T__59=60, T__60=61, T__61=62, T__62=63, T__63=64, T__64=65, T__65=66,
T__66=67, T__67=68, T__68=69, T__69=70, T__70=71, T__71=72, T__72=73, T__66=67, T__67=68, T__68=69, T__69=70, T__70=71, T__71=72, T__72=73,
T__73=74, T__74=75, T__75=76, T__76=77, T__77=78, LINECOMMENT=79, COMMENT=80, T__73=74, T__74=75, T__75=76, T__76=77, T__77=78, T__78=79, T__79=80,
WS=81, EOL=82, NAME=83, DEC_INTEGER=84, HEX_INTEGER=85, BIN_INTEGER=86, T__80=81, T__81=82, T__82=83, T__83=84, T__84=85, T__85=86, LINECOMMENT=87,
FLOAT_NUMBER=87, STRING=88, INLINEASMBLOCK=89; COMMENT=88, WS=89, EOL=90, NAME=91, DEC_INTEGER=92, HEX_INTEGER=93, BIN_INTEGER=94,
FLOAT_NUMBER=95, STRING=96, INLINEASMBLOCK=97;
public static String[] channelNames = { public static String[] channelNames = {
"DEFAULT_TOKEN_CHANNEL", "HIDDEN" "DEFAULT_TOKEN_CHANNEL", "HIDDEN"
}; };
@ -48,7 +49,8 @@ public class il65Lexer extends Lexer {
"T__49", "T__50", "T__51", "T__52", "T__53", "T__54", "T__55", "T__56", "T__49", "T__50", "T__51", "T__52", "T__53", "T__54", "T__55", "T__56",
"T__57", "T__58", "T__59", "T__60", "T__61", "T__62", "T__63", "T__64", "T__57", "T__58", "T__59", "T__60", "T__61", "T__62", "T__63", "T__64",
"T__65", "T__66", "T__67", "T__68", "T__69", "T__70", "T__71", "T__72", "T__65", "T__66", "T__67", "T__68", "T__69", "T__70", "T__71", "T__72",
"T__73", "T__74", "T__75", "T__76", "T__77", "LINECOMMENT", "COMMENT", "T__73", "T__74", "T__75", "T__76", "T__77", "T__78", "T__79", "T__80",
"T__81", "T__82", "T__83", "T__84", "T__85", "LINECOMMENT", "COMMENT",
"WS", "EOL", "NAME", "DEC_INTEGER", "HEX_INTEGER", "BIN_INTEGER", "FLOAT_NUMBER", "WS", "EOL", "NAME", "DEC_INTEGER", "HEX_INTEGER", "BIN_INTEGER", "FLOAT_NUMBER",
"FNUMBER", "STRING_ESCAPE_SEQ", "STRING", "INLINEASMBLOCK" "FNUMBER", "STRING_ESCAPE_SEQ", "STRING", "INLINEASMBLOCK"
}; };
@ -63,7 +65,8 @@ public class il65Lexer extends Lexer {
"'>='", "'=='", "'!='", "'&'", "'^'", "'|'", "'to'", "'and'", "'or'", "'>='", "'=='", "'!='", "'&'", "'^'", "'|'", "'to'", "'and'", "'or'",
"'xor'", "'not'", "'return'", "'.'", "'A'", "'X'", "'Y'", "'AX'", "'AY'", "'xor'", "'not'", "'return'", "'.'", "'A'", "'X'", "'Y'", "'AX'", "'AY'",
"'XY'", "'Pc'", "'Pz'", "'Pn'", "'Pv'", "'true'", "'false'", "'%asm'", "'XY'", "'Pc'", "'Pz'", "'Pn'", "'Pv'", "'true'", "'false'", "'%asm'",
"'sub'", "'->'", "'{'", "'}'", "'?'", "'if'", "'else'" "'sub'", "'->'", "'{'", "'}'", "'?'", "'if'", "'else'", "'if_cs'", "'if_cc'",
"'if_eq'", "'if_ne'", "'if_pl'", "'if_mi'", "'if_vs'", "'if_vc'"
}; };
private static final String[] _SYMBOLIC_NAMES = { private static final String[] _SYMBOLIC_NAMES = {
null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null,
@ -72,9 +75,9 @@ public class il65Lexer extends Lexer {
null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null,
null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null,
null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null, null,
null, null, null, null, null, null, null, "LINECOMMENT", "COMMENT", "WS", null, null, null, null, null, null, null, null, null, null, null, null,
"EOL", "NAME", "DEC_INTEGER", "HEX_INTEGER", "BIN_INTEGER", "FLOAT_NUMBER", null, null, null, "LINECOMMENT", "COMMENT", "WS", "EOL", "NAME", "DEC_INTEGER",
"STRING", "INLINEASMBLOCK" "HEX_INTEGER", "BIN_INTEGER", "FLOAT_NUMBER", "STRING", "INLINEASMBLOCK"
}; };
public static final Vocabulary VOCABULARY = new VocabularyImpl(_LITERAL_NAMES, _SYMBOLIC_NAMES); public static final Vocabulary VOCABULARY = new VocabularyImpl(_LITERAL_NAMES, _SYMBOLIC_NAMES);
@ -136,10 +139,10 @@ public class il65Lexer extends Lexer {
@Override @Override
public void action(RuleContext _localctx, int ruleIndex, int actionIndex) { public void action(RuleContext _localctx, int ruleIndex, int actionIndex) {
switch (ruleIndex) { switch (ruleIndex) {
case 89: case 97:
STRING_action((RuleContext)_localctx, actionIndex); STRING_action((RuleContext)_localctx, actionIndex);
break; break;
case 90: case 98:
INLINEASMBLOCK_action((RuleContext)_localctx, actionIndex); INLINEASMBLOCK_action((RuleContext)_localctx, actionIndex);
break; break;
} }
@ -168,7 +171,7 @@ public class il65Lexer extends Lexer {
} }
public static final String _serializedATN = public static final String _serializedATN =
"\3\u608b\ua72a\u8133\ub9ed\u417c\u3be7\u7786\u5964\2[\u0261\b\1\4\2\t"+ "\3\u608b\ua72a\u8133\ub9ed\u417c\u3be7\u7786\u5964\2c\u02a1\b\1\4\2\t"+
"\2\4\3\t\3\4\4\t\4\4\5\t\5\4\6\t\6\4\7\t\7\4\b\t\b\4\t\t\t\4\n\t\n\4\13"+ "\2\4\3\t\3\4\4\t\4\4\5\t\5\4\6\t\6\4\7\t\7\4\b\t\b\4\t\t\t\4\n\t\n\4\13"+
"\t\13\4\f\t\f\4\r\t\r\4\16\t\16\4\17\t\17\4\20\t\20\4\21\t\21\4\22\t\22"+ "\t\13\4\f\t\f\4\r\t\r\4\16\t\16\4\17\t\17\4\20\t\20\4\21\t\21\4\22\t\22"+
"\4\23\t\23\4\24\t\24\4\25\t\25\4\26\t\26\4\27\t\27\4\30\t\30\4\31\t\31"+ "\4\23\t\23\4\24\t\24\4\25\t\25\4\26\t\26\4\27\t\27\4\30\t\30\4\31\t\31"+
@ -178,198 +181,219 @@ public class il65Lexer extends Lexer {
"\64\4\65\t\65\4\66\t\66\4\67\t\67\48\t8\49\t9\4:\t:\4;\t;\4<\t<\4=\t="+ "\64\4\65\t\65\4\66\t\66\4\67\t\67\48\t8\49\t9\4:\t:\4;\t;\4<\t<\4=\t="+
"\4>\t>\4?\t?\4@\t@\4A\tA\4B\tB\4C\tC\4D\tD\4E\tE\4F\tF\4G\tG\4H\tH\4I"+ "\4>\t>\4?\t?\4@\t@\4A\tA\4B\tB\4C\tC\4D\tD\4E\tE\4F\tF\4G\tG\4H\tH\4I"+
"\tI\4J\tJ\4K\tK\4L\tL\4M\tM\4N\tN\4O\tO\4P\tP\4Q\tQ\4R\tR\4S\tS\4T\tT"+ "\tI\4J\tJ\4K\tK\4L\tL\4M\tM\4N\tN\4O\tO\4P\tP\4Q\tQ\4R\tR\4S\tS\4T\tT"+
"\4U\tU\4V\tV\4W\tW\4X\tX\4Y\tY\4Z\tZ\4[\t[\4\\\t\\\3\2\3\2\3\3\3\3\3\4"+ "\4U\tU\4V\tV\4W\tW\4X\tX\4Y\tY\4Z\tZ\4[\t[\4\\\t\\\4]\t]\4^\t^\4_\t_\4"+
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"\62;\2\u027d\u027c\3\2\2\2\u027e\u027f\3\2\2\2\u027f\u027d\3\2\2\2\u027f"+
"\u0280\3\2\2\2\u0280\u0282\3\2\2\2\u0281\u027b\3\2\2\2\u0281\u0282\3\2"+
"\2\2\u0282\u00c2\3\2\2\2\u0283\u0284\7^\2\2\u0284\u0288\13\2\2\2\u0285"+
"\u0286\7^\2\2\u0286\u0288\5\u00b5[\2\u0287\u0283\3\2\2\2\u0287\u0285\3"+
"\2\2\2\u0288\u00c4\3\2\2\2\u0289\u028e\7$\2\2\u028a\u028d\5\u00c3b\2\u028b"+
"\u028d\n\t\2\2\u028c\u028a\3\2\2\2\u028c\u028b\3\2\2\2\u028d\u0290\3\2"+
"\2\2\u028e\u028c\3\2\2\2\u028e\u028f\3\2\2\2\u028f\u0291\3\2\2\2\u0290"+
"\u028e\3\2\2\2\u0291\u0292\7$\2\2\u0292\u0293\bc\4\2\u0293\u00c6\3\2\2"+
"\2\u0294\u0295\7}\2\2\u0295\u0296\7}\2\2\u0296\u0298\3\2\2\2\u0297\u0299"+
"\13\2\2\2\u0298\u0297\3\2\2\2\u0299\u029a\3\2\2\2\u029a\u029b\3\2\2\2"+
"\u029a\u0298\3\2\2\2\u029b\u029c\3\2\2\2\u029c\u029d\7\177\2\2\u029d\u029e"+
"\7\177\2\2\u029e\u029f\3\2\2\2\u029f\u02a0\bd\5\2\u02a0\u00c8\3\2\2\2"+
"\25\2\u0239\u0244\u0250\u0256\u025e\u0260\u0264\u0266\u026c\u0271\u0274"+
"\u0279\u027f\u0281\u0287\u028c\u028e\u029a\6\2\3\2\b\2\2\3c\2\3d\3";
public static final ATN _ATN = public static final ATN _ATN =
new ATNDeserializer().deserialize(_serializedATN.toCharArray()); new ATNDeserializer().deserialize(_serializedATN.toCharArray());
static { static {

View File

@ -76,17 +76,25 @@ T__74=75
T__75=76 T__75=76
T__76=77 T__76=77
T__77=78 T__77=78
LINECOMMENT=79 T__78=79
COMMENT=80 T__79=80
WS=81 T__80=81
EOL=82 T__81=82
NAME=83 T__82=83
DEC_INTEGER=84 T__83=84
HEX_INTEGER=85 T__84=85
BIN_INTEGER=86 T__85=86
FLOAT_NUMBER=87 LINECOMMENT=87
STRING=88 COMMENT=88
INLINEASMBLOCK=89 WS=89
EOL=90
NAME=91
DEC_INTEGER=92
HEX_INTEGER=93
BIN_INTEGER=94
FLOAT_NUMBER=95
STRING=96
INLINEASMBLOCK=97
'~'=1 '~'=1
':'=2 ':'=2
'goto'=3 'goto'=3
@ -165,3 +173,11 @@ INLINEASMBLOCK=89
'?'=76 '?'=76
'if'=77 'if'=77
'else'=78 'else'=78
'if_cs'=79
'if_cc'=80
'if_eq'=81
'if_ne'=82
'if_pl'=83
'if_mi'=84
'if_vs'=85
'if_vc'=86

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