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https://github.com/irmen/prog8.git
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vm: split off assignment codegen to its own file
This commit is contained in:
Irmen de Jong
parent
dc6475c91b
commit
e52d9e3210
@ -11,6 +11,25 @@ sealed class PtExpression(val type: DataType, position: Position) : PtNode(posit
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override fun printProperties() {
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print(type)
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}
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infix fun isSameTargetAs(other: PtExpression): Boolean = when(this) {
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is PtArrayIndexer -> {
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if(other is PtArrayIndexer && other.type==type) {
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if(other.variable isSameTargetAs variable) {
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other.index isSameTargetAs index
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}
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}
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false
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}
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is PtIdentifier -> other is PtIdentifier && other.type==type && other.targetName==targetName
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is PtMachineRegister -> other is PtMachineRegister && other.register==register
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is PtMemoryByte -> other is PtMemoryByte && address isSameTargetAs other.address
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is PtNumber -> other is PtNumber && other.type == type && other.number==number
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is PtAddressOf -> other is PtAddressOf && other.identifier isSameTargetAs identifier
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is PtPrefix -> other is PtPrefix && other.operator==operator && other.value isSameTargetAs value
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is PtTypeCast -> other is PtTypeCast && other.type==type && other.value isSameTargetAs value
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else -> false
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}
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}
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@ -45,6 +45,14 @@ class PtAssignment(position: Position) : PtNode(position) {
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get() = children[1] as PtExpression
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override fun printProperties() { }
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val isInplaceAssign: Boolean by lazy {
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val target = target.children.single() as PtExpression
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if(value is PtBinaryExpression) {
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target isSameTargetAs (value as PtBinaryExpression).left
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} else
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target isSameTargetAs value
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}
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}
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136
codeGenVirtual/src/prog8/codegen/virtual/AssignmentGen.kt
Normal file
136
codeGenVirtual/src/prog8/codegen/virtual/AssignmentGen.kt
Normal file
@ -0,0 +1,136 @@
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package prog8.codegen.virtual
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import prog8.code.ast.*
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import prog8.code.core.AssemblyError
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import prog8.code.core.DataType
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import prog8.vm.Opcode
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import prog8.vm.VmDataType
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internal class AssignmentGen(private val codeGen: CodeGen, private val expressionEval: ExpressionGen) {
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internal fun translate(assignment: PtAssignment): VmCodeChunk {
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return if (assignment.isInplaceAssign)
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translateInplaceAssign(assignment)
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else
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translateRegularAssign(assignment)
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}
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private fun translateInplaceAssign(assignment: PtAssignment): VmCodeChunk {
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// TODO can in-place assignments be optimized more? use special memory versions of instructions instead of register ones?
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return translateRegularAssign(assignment)
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}
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private fun translateRegularAssign(assignment: PtAssignment): VmCodeChunk {
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// note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
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if(assignment.target.children.single() is PtMachineRegister)
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throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
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val ident = assignment.target.identifier
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val memory = assignment.target.memory
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val array = assignment.target.array
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val vmDt = codeGen.vmType(assignment.value.type)
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val code = VmCodeChunk()
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var resultRegister = -1
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var resultFpRegister = -1
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val zero = codeGen.isZero(assignment.value)
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if(!zero) {
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// calculate the assignment value
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if (vmDt == VmDataType.FLOAT) {
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resultFpRegister = codeGen.vmRegisters.nextFreeFloat()
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code += expressionEval.translateExpression(assignment.value, -1, resultFpRegister)
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} else {
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resultRegister = if (assignment.value is PtMachineRegister) {
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(assignment.value as PtMachineRegister).register
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} else {
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val reg = codeGen.vmRegisters.nextFree()
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code += expressionEval.translateExpression(assignment.value, reg, -1)
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reg
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}
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}
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}
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if(ident!=null) {
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val address = codeGen.allocations.get(ident.targetName)
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code += if(zero) {
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VmCodeInstruction(Opcode.STOREZM, vmDt, value = address)
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} else {
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if (vmDt == VmDataType.FLOAT)
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VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value = address)
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else
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VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value = address)
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}
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}
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else if(array!=null) {
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val variable = array.variable.targetName
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var variableAddr = codeGen.allocations.get(variable)
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val itemsize = codeGen.program.memsizer.memorySize(array.type)
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val fixedIndex = constIntValue(array.index)
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if(zero) {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREZM, VmDataType.FLOAT, value=variableAddr)
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} else {
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val indexReg = codeGen.vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREZX, VmDataType.FLOAT, reg1=indexReg, value=variableAddr)
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}
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} else {
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if(vmDt== VmDataType.FLOAT) {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value=variableAddr)
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} else {
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val indexReg = codeGen.vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
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}
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} else {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value=variableAddr)
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} else {
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val indexReg = codeGen.vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
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}
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}
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}
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}
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else if(memory!=null) {
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require(vmDt== VmDataType.BYTE)
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if(zero) {
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if(memory.address is PtNumber) {
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code += VmCodeInstruction(Opcode.STOREZM, vmDt, value=(memory.address as PtNumber).number.toInt())
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} else {
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val addressReg = codeGen.vmRegisters.nextFree()
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code += expressionEval.translateExpression(memory.address, addressReg, -1)
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code += VmCodeInstruction(Opcode.STOREZI, vmDt, reg1=addressReg)
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}
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} else {
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if(memory.address is PtNumber) {
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1=resultRegister, value=(memory.address as PtNumber).number.toInt())
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} else {
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val addressReg = codeGen.vmRegisters.nextFree()
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code += expressionEval.translateExpression(memory.address, addressReg, -1)
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code += VmCodeInstruction(Opcode.STOREI, vmDt, reg1=resultRegister, reg2=addressReg)
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}
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}
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}
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else
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throw AssemblyError("weird assigntarget")
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return code
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}
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private fun loadIndexReg(array: PtArrayIndexer, itemsize: Int, indexReg: Int): VmCodeChunk {
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val code = VmCodeChunk()
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if(itemsize==1) {
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code += expressionEval.translateExpression(array.index, indexReg, -1)
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}
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else {
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val mult = PtBinaryExpression("*", DataType.UBYTE, array.position)
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mult.children += array.index
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mult.children += PtNumber(DataType.UBYTE, itemsize.toDouble(), array.position)
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code += expressionEval.translateExpression(mult, indexReg, -1)
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}
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return code
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}
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}
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@ -43,6 +43,7 @@ class CodeGen(internal val program: PtProgram,
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internal val allocations = VariableAllocator(symbolTable, program, errors)
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private val expressionEval = ExpressionGen(this)
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private val builtinFuncGen = BuiltinFuncGen(this, expressionEval)
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private val assignmentGen = AssignmentGen(this, expressionEval)
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internal val vmRegisters = VmRegisterPool()
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override fun compileToAssembly(): IAssemblyProgram? {
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@ -52,7 +53,7 @@ class CodeGen(internal val program: PtProgram,
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// collect global variables initializers
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program.allBlocks().forEach {
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val code = VmCodeChunk()
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it.children.filterIsInstance<PtAssignment>().forEach { assign -> code += translate(assign) }
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it.children.filterIsInstance<PtAssignment>().forEach { assign -> code += assignmentGen.translate(assign) }
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vmprog.addGlobalInits(code)
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}
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}
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@ -75,7 +76,7 @@ class CodeGen(internal val program: PtProgram,
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is PtVariable -> VmCodeChunk() // var should be looked up via symbol table
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is PtMemMapped -> VmCodeChunk() // memmapped var should be looked up via symbol table
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is PtConstant -> VmCodeChunk() // constants have all been folded into the code
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is PtAssignment -> translate(node)
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is PtAssignment -> assignmentGen.translate(node)
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is PtNodeGroup -> translateGroup(node.children)
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is PtBuiltinFunctionCall -> translateBuiltinFunc(node, 0)
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is PtFunctionCall -> expressionEval.translate(node, 0, 0)
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@ -651,120 +652,6 @@ class CodeGen(internal val program: PtProgram,
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return code
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}
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private fun translate(assignment: PtAssignment): VmCodeChunk {
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// TODO can in-place assignments be optimized more? use special memory versions of instructions instead of register ones?
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// note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
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if(assignment.target.children.single() is PtMachineRegister)
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throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
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val code = VmCodeChunk()
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val ident = assignment.target.identifier
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val memory = assignment.target.memory
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val array = assignment.target.array
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val vmDt = vmType(assignment.value.type)
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var resultRegister = -1
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var resultFpRegister = -1
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val zero = isZero(assignment.value)
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if(!zero) {
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// calculate the assignment value
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if (vmDt == VmDataType.FLOAT) {
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resultFpRegister = vmRegisters.nextFreeFloat()
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code += expressionEval.translateExpression(assignment.value, -1, resultFpRegister)
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} else {
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resultRegister = if (assignment.value is PtMachineRegister) {
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(assignment.value as PtMachineRegister).register
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} else {
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val reg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(assignment.value, reg, -1)
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reg
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}
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}
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}
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if(ident!=null) {
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val address = allocations.get(ident.targetName)
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code += if(zero) {
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VmCodeInstruction(Opcode.STOREZM, vmDt, value = address)
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} else {
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if (vmDt == VmDataType.FLOAT)
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VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value = address)
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else
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VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value = address)
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}
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}
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else if(array!=null) {
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val variable = array.variable.targetName
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var variableAddr = allocations.get(variable)
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val itemsize = program.memsizer.memorySize(array.type)
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val fixedIndex = constIntValue(array.index)
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if(zero) {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREZM, VmDataType.FLOAT, value=variableAddr)
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} else {
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val indexReg = vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREZX, VmDataType.FLOAT, reg1=indexReg, value=variableAddr)
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}
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} else {
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if(vmDt==VmDataType.FLOAT) {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value=variableAddr)
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} else {
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val indexReg = vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
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}
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} else {
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if(fixedIndex!=null) {
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variableAddr += fixedIndex*itemsize
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value=variableAddr)
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} else {
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val indexReg = vmRegisters.nextFree()
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code += loadIndexReg(array, itemsize, indexReg)
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code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
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}
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}
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}
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}
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else if(memory!=null) {
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require(vmDt==VmDataType.BYTE)
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if(zero) {
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if(memory.address is PtNumber) {
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code += VmCodeInstruction(Opcode.STOREZM, vmDt, value=(memory.address as PtNumber).number.toInt())
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} else {
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val addressReg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(memory.address, addressReg, -1)
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code += VmCodeInstruction(Opcode.STOREZI, vmDt, reg1=addressReg)
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}
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} else {
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if(memory.address is PtNumber) {
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code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1=resultRegister, value=(memory.address as PtNumber).number.toInt())
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} else {
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val addressReg = vmRegisters.nextFree()
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code += expressionEval.translateExpression(memory.address, addressReg, -1)
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code += VmCodeInstruction(Opcode.STOREI, vmDt, reg1=resultRegister, reg2=addressReg)
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}
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}
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}
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else
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throw AssemblyError("weird assigntarget")
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return code
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}
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private fun loadIndexReg(array: PtArrayIndexer, itemsize: Int, indexReg: Int): VmCodeChunk {
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val code = VmCodeChunk()
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if(itemsize==1) {
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code += expressionEval.translateExpression(array.index, indexReg, -1)
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}
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else {
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val mult = PtBinaryExpression("*", DataType.UBYTE, array.position)
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mult.children += array.index
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mult.children += PtNumber(DataType.UBYTE, itemsize.toDouble(), array.position)
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code += expressionEval.translateExpression(mult, indexReg, -1)
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}
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return code
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}
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private fun translate(ret: PtReturn): VmCodeChunk {
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val code = VmCodeChunk()
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val value = ret.value
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@ -828,3 +715,4 @@ class CodeGen(internal val program: PtProgram,
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internal fun isOne(expression: PtExpression): Boolean = expression is PtNumber && expression.number==1.0
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}
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@ -3,7 +3,8 @@ TODO
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For next release
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^^^^^^^^^^^^^^^^
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- vm: add more instructions operating directly on memory instead of only registers? (translate assignment self-assigns)
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- vm: implement the sin/cos functions in math.p8 and make an example 'shader' that uses them
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- vm: add more instructions operating directly on memory instead of only registers? (translate assignment self-assigns in AssignmentGen)
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- complete the Inliner
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- add McCarthy evaluation to shortcircuit and/or expressions. First do ifs by splitting them up? Then do expressions that compute a value?
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@ -23,8 +24,6 @@ Compiler:
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- vm: codeGen: various TODOs to tweak code
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- vm: somehow deal with asmsubs otherwise the vm IR can't fully encode all of prog8
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- vm: make registers typed? so that it's immediately obvious what type they represent. Much like regular variables in memory.
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so we have a set of byte registers, a set of word registers, and other sets if we introduce other types.
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- vm: don't store symbol names in instructions to make optimizing the IR easier? but what about jumps to labels. And it's no longer readable by humans.
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- vm: how to remove all unused subroutines? (in the assembly codegen, we let 64tass solve this for us)
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- vm: rather than being able to jump to any 'address' (IPTR), use 'blocks' that have entry and exit points -> even better dead code elimination possible too
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@ -53,7 +52,7 @@ Libraries:
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- optimize several inner loops in gfx2 even further?
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- add modes 2 and 3 to gfx2 (lowres 4 color and 16 color)?
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- add a flood fill routine to gfx2?
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- diskio: use cx16 MACPTR() to load stuff faster? (see its use in X16edit to fast load blocks)
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- diskio: use cx16 MACPTR() in f_read() to load stuff faster? (see its use in X16edit to fast load blocks)
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note that it might fail on non sdcard files so have to make graceful degradation
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Expressions:
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112
examples/test.p8
112
examples/test.p8
@ -1,114 +1,22 @@
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%import textio
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%import math
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%import string
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%import floats
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%zeropage dontuse
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; NOTE: meant to test to virtual machine output target (use -target vitual)
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main {
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ubyte value = 42
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sub inline_candidate() -> ubyte {
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return math.sin8u(value)
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}
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sub add(ubyte first, ubyte second) -> ubyte {
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return first + second
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}
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sub mul(ubyte first, ubyte second) -> ubyte {
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return first * second
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}
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ubyte ix
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sub start() {
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uword[] array = [1111,2222,3333,4444]
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; a "pixelshader":
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sys.gfx_enable(0) ; enable lo res screen
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sub pa() {
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uword ww
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for ww in array {
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txt.print_uw(ww)
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txt.spc()
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}
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txt.nl()
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ubyte angle
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for angle in 0 to 255 {
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ubyte xx = math.sin8u(angle)
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ubyte yy = math.cos8u(angle)
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sys.gfx_plot(xx, yy, 255)
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}
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; pa()
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; array[2] = 9999
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; pa()
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ix=2
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array[ix]= 8888 ; TODO fix indexing offset in vm
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pa()
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txt.print_uw(array[ix])
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txt.spc()
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txt.print_uw(array[ix+1])
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txt.nl()
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; ubyte @shared value = inline_candidate()
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; txt.print_ub(inline_candidate())
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; txt.nl()
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|
||||
; ubyte value = add(3,4) |> add(10) |> mul(2) |> math.sin8u()
|
||||
; txt.print_ub(value)
|
||||
; txt.nl()
|
||||
; uword wvalue = add(3,4) |> add($30) |> mkword($ea)
|
||||
; txt.print_uwhex(wvalue, true)
|
||||
; txt.nl()
|
||||
|
||||
; expected output: aaabbb aaa bbb
|
||||
|
||||
; float f1 = 1.555
|
||||
; floats.print_f(floats.sin(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.cos(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.tan(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.atan(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.ln(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.log2(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.sqrt(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.rad(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.deg(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.round(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.floor(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.ceil(f1))
|
||||
; txt.nl()
|
||||
; floats.print_f(floats.rndf())
|
||||
; txt.nl()
|
||||
; "sin", "cos", "tan", "atan",
|
||||
; "ln", "log2", "sqrt", "rad",
|
||||
; "deg", "round", "floor", "ceil", "rndf"
|
||||
|
||||
; a "pixelshader":
|
||||
; sys.gfx_enable(0) ; enable lo res screen
|
||||
; ubyte shifter
|
||||
;
|
||||
; repeat {
|
||||
; uword xx
|
||||
; uword yy = 0
|
||||
; repeat 240 {
|
||||
; xx = 0
|
||||
; repeat 320 {
|
||||
; sys.gfx_plot(xx, yy, xx*yy + shifter as ubyte)
|
||||
; xx++
|
||||
; }
|
||||
; yy++
|
||||
; }
|
||||
; shifter+=4
|
||||
; }
|
||||
repeat {
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user