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added math.mul32(), verafx.muls now returns long

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Irmen de Jong
2025-10-04 21:40:12 +02:00
parent db1aa3f257
commit e63921009c
9 changed files with 84 additions and 113 deletions
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5
docs/source/libraries.rst
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@@ -1239,7 +1239,10 @@ Available for the Cx16 target. Routines that use the Vera FX logic to accelerate
But it depends on some Vera manipulation and 4 bytes in vram just below the PSG registers for storage.
Note: there is a block level %option "verafxmuls" that automatically replaces all word multiplications in that block
by calls to verafx, but be careful with it because it may interfere with other Vera operations or IRQs.
The full 32 bits result value is returned in two result values: lower word, upper word.
The full 32 bits result value is returned as a long.
``muls16``
Like ``muls`` but only returns the lower word of the result, which is sometimes useful if you're just interested in word values.
``mult16``
VeraFX hardware multiplication of two unsigned words.

4
docs/source/todo.rst
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@@ -3,9 +3,7 @@ TODO
LONG TYPE
---------
- scan through more library routines if there are opportunities to use a long param or returnvalue?
- document the new long type! and mklong(a,b,c,d) and mklong2(w1,w2) , print_l , print_ulhex (& conv.str_l) and pokel, peekl, cbm.SETTIML/RDTIML, and the use of R0:R1 when doing LONG calculations
- asmsub call convention: @R0R1_32 to specify a 32 bits long combined register R0:R1
- document the new long type! and mklong(a,b,c,d) and mklong2(w1,w2) , print_l , print_ulhex (& conv.str_l) and pokel, peekl, cbm.SETTIML/RDTIML, math.mul32, verafx.muls/muls16, and the use of R0:R1 when doing LONG calculations, asmsub call convention: @R0R1_32 to specify a 32 bits long combined register R0:R1
- how hard is it to also implement the other comparison operators (<,>,<=,>=) on longs?
- implement LONG testcases in testmemory