fix windows issue

This commit is contained in:
Irmen de Jong 2022-09-27 22:36:10 +02:00
parent 7ea7e63f44
commit e7a3a89bfb
5 changed files with 21 additions and 26 deletions

View File

@ -77,7 +77,7 @@ class AsmGen(internal val program: Program,
} }
internal fun out(str: String, splitlines: Boolean = true) { internal fun out(str: String, splitlines: Boolean = true) {
val fragment = (if(splitlines && " | " in str) str.replace("|", "\n") else str).trim('\n') val fragment = (if(splitlines && " | " in str) str.replace("|", "\n") else str).trim('\r', '\n')
if (splitlines) { if (splitlines) {
for (line in fragment.splitToSequence('\n')) { for (line in fragment.splitToSequence('\n')) {
val trimmed = if (line.startsWith(' ')) "\t" + line.trim() else line val trimmed = if (line.startsWith(' ')) "\t" + line.trim() else line
@ -838,7 +838,7 @@ $repeatLabel lda $counterVar
if(stmt.definingModule.source is SourceCode.Generated) if(stmt.definingModule.source is SourceCode.Generated)
throw AssemblyError("%asminclude inside non-library/non-filesystem module not yet supported") throw AssemblyError("%asminclude inside non-library/non-filesystem module not yet supported")
loadAsmIncludeFile(includedName, stmt.definingModule.source).fold( loadAsmIncludeFile(includedName, stmt.definingModule.source).fold(
success = { assemblyLines.add(it.trimEnd().trimStart('\n')) }, success = { assemblyLines.add(it.trimEnd().trimStart('\r', '\n')) },
failure = { errors.err(it.toString(), stmt.position) } failure = { errors.err(it.toString(), stmt.position) }
) )
} }
@ -909,7 +909,7 @@ $repeatLabel lda $counterVar
} }
private fun translate(asm: InlineAssembly) { private fun translate(asm: InlineAssembly) {
val assembly = asm.assembly.trimEnd().trimStart('\n') val assembly = asm.assembly.trimEnd().trimStart('\r', '\n')
assemblyLines.add(assembly) assemblyLines.add(assembly)
} }

View File

@ -56,12 +56,9 @@ Libraries:
Expressions: Expressions:
- rethink the whole "isAugmentable" business. Because the way this is determined, should always also be exactly mirrorred in the AugmentableAssignmentAsmGen or you'll get a crash at code gen time.
note: the new Ast doesn't need this any more so maybe we can get rid of it altogether in the old AST - but it's still used for something in the UnusedCodeRemover.
- can we get rid of pieces of asmgen.AssignmentAsmGen by just reusing the AugmentableAssignment ? generated code should not suffer - can we get rid of pieces of asmgen.AssignmentAsmGen by just reusing the AugmentableAssignment ? generated code should not suffer
- rewrite expression tree evaluation such that it doesn't use an eval stack but flatten the tree into linear code that uses a fixed number of predetermined value 'variables'? - rewrite expression tree evaluation such that it doesn't use an eval stack but flatten the tree into linear code
"Three address code" was mentioned. https://en.wikipedia.org/wiki/Three-address_code that, for instance, uses a fixed number of predetermined value 'variables'?
these variables have to be unique for each subroutine because they could otherwise be interfered with from irq routines etc.
The VM IL solves this already (by using unlimited registers) but that still lacks a translation to 6502. The VM IL solves this already (by using unlimited registers) but that still lacks a translation to 6502.
- this removes the need for the BinExprSplitter? (which is problematic and very limited now) - this removes the need for the BinExprSplitter? (which is problematic and very limited now)
and perhaps the assignment splitting in BeforeAsmAstChanger too and perhaps the assignment splitting in BeforeAsmAstChanger too

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@ -19,7 +19,8 @@ main {
const uword SIZEPL = 8191 const uword SIZEPL = 8191
uword @zp flags_ptr = memory("flags", SIZEPL, $100) uword @zp flags_ptr = memory("flags", SIZEPL, $100)
txt.print("calculating...\n") txt.print_ub(ITERS)
txt.print(" iterations, calculating...\n")
repeat ITERS { repeat ITERS {
sys.memset(flags_ptr, SIZEPL, 1) sys.memset(flags_ptr, SIZEPL, 1)

View File

@ -5,7 +5,6 @@
main { main {
sub start() { sub start() {
const ubyte ITERS = 10
uword count uword count
uword i uword i
uword prime uword prime
@ -15,21 +14,19 @@ main {
txt.print("calculating...\n") txt.print("calculating...\n")
repeat ITERS { sys.memset(flags_ptr, SIZEPL, 1)
sys.memset(flags_ptr, SIZEPL, 1) count = 0
count = 0 for i in 0 to SIZEPL-1 {
for i in 0 to SIZEPL-1 { if @(flags_ptr+i) {
if @(flags_ptr+i) { prime = i + i + 3
prime = i + i + 3 k = i + prime
k = i + prime while k <= SIZEPL-1 {
while k <= SIZEPL-1 { @(flags_ptr + k) = false
@(flags_ptr + k) = false k += prime
k += prime
}
txt.print_uw(prime)
txt.nl()
count++
} }
txt.print_uw(prime)
txt.nl()
count++
} }
} }

View File

@ -70,7 +70,7 @@ class IRFileWriter(private val irProgram: IRProgram, outfileOverride: Path?) {
} }
out.write("</PARAMS>\n") out.write("</PARAMS>\n")
out.write("<INLINEASM POS=${it.position}>\n") out.write("<INLINEASM POS=${it.position}>\n")
out.write(it.assembly.trimStart('\n').trimEnd(' ', '\n')) out.write(it.assembly.trimStart('\r', '\n').trimEnd(' ', '\r', '\n'))
out.write("\n</INLINEASM>\n</ASMSUB>\n") out.write("\n</INLINEASM>\n</ASMSUB>\n")
} }
out.write("</BLOCK>\n") out.write("</BLOCK>\n")
@ -79,7 +79,7 @@ class IRFileWriter(private val irProgram: IRProgram, outfileOverride: Path?) {
private fun writeInlineAsm(chunk: IRInlineAsmChunk) { private fun writeInlineAsm(chunk: IRInlineAsmChunk) {
out.write("<INLINEASM POS=${chunk.position}>\n") out.write("<INLINEASM POS=${chunk.position}>\n")
out.write(chunk.assembly.trimStart('\n').trimEnd(' ', '\n')) out.write(chunk.assembly.trimStart('\r', '\n').trimEnd(' ', '\r', '\n'))
out.write("\n</INLINEASM>\n") out.write("\n</INLINEASM>\n")
} }