diff --git a/docs/source/todo.rst b/docs/source/todo.rst
index 522f4fb6a..18d2385f3 100644
--- a/docs/source/todo.rst
+++ b/docs/source/todo.rst
@@ -1,6 +1,8 @@
 TODO
 ====
 
+- IR/VM: fix the vm/textelite game, it now prints garbage!   (caused by the SGE opcode implementation change to set -1 instead of 1)
+
 - IR: instructions that do type conversion (SZ etc, CONCAT, SGN) should put the result in a DIFFERENT register.
 
 ...
diff --git a/virtualmachine/src/prog8/vm/VirtualMachine.kt b/virtualmachine/src/prog8/vm/VirtualMachine.kt
index 4b959d098..d9595fa01 100644
--- a/virtualmachine/src/prog8/vm/VirtualMachine.kt
+++ b/virtualmachine/src/prog8/vm/VirtualMachine.kt
@@ -881,7 +881,6 @@ class VirtualMachine(irProgram: IRProgram) {
         val value = if(left>=right) -1 else 0
         setResultReg(i.reg1!!, value, i.type!!)
         nextPc()
-
     }
 
     private fun InsSGES(i: IRInstruction) {