todo

2025-01-12 04:30:03 +00:00 · 2023-07-09 01:34:53 +02:00 · 2023-07-09 01:34:53 +02:00 · e98bbc1c52
commit e98bbc1c52
parent 7245aece4f
2 changed files with 2 additions and 1 deletions
--- a/docs/source/todo.rst
+++ b/docs/source/todo.rst
@ -1,6 +1,8 @@
 TODO
 ====

+- IR/VM: fix the vm/textelite game, it now prints garbage!   (caused by the SGE opcode implementation change to set -1 instead of 1)
+
 - IR: instructions that do type conversion (SZ etc, CONCAT, SGN) should put the result in a DIFFERENT register.

 ...
--- a/virtualmachine/src/prog8/vm/VirtualMachine.kt
+++ b/virtualmachine/src/prog8/vm/VirtualMachine.kt
@ -881,7 +881,6 @@ class VirtualMachine(irProgram: IRProgram) {
        val value = if(left>=right) -1 else 0
        setResultReg(i.reg1!!, value, i.type!!)
        nextPc()
-
    }

    private fun InsSGES(i: IRInstruction) {