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fix invalid asm addressing mode for certain value-to-evalstack transfers
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@ -41,11 +41,12 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
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{
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{
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val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toInt() ?: 0}
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val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toInt() ?: 0}
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val constArrayIndexValue by lazy { array?.indexer?.constIndex() }
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val constArrayIndexValue by lazy { array?.indexer?.constIndex() }
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val asmVarname: String
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val asmVarname: String by lazy {
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get() = if(array==null)
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if (array == null)
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variableAsmName!!
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variableAsmName!!
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else
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else
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asmgen.asmVariableName(array.arrayvar)
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asmgen.asmVariableName(array.arrayvar)
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}
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lateinit var origAssign: AsmAssignment
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lateinit var origAssign: AsmAssignment
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@ -949,7 +949,8 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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lda #<$sourceName
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lda #<$sourceName
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ldy #>$sourceName+1
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ldy #>$sourceName+1
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sta P8ESTACK_LO,x
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sta P8ESTACK_LO,x
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sty P8ESTACK_HI,x
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tya
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sta P8ESTACK_HI,x
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dex""")
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dex""")
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}
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}
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else -> throw AssemblyError("string-assign to weird target")
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else -> throw AssemblyError("string-assign to weird target")
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@ -1581,7 +1582,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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}
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}
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TargetStorageKind.STACK -> {
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TargetStorageKind.STACK -> {
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when(regs) {
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when(regs) {
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RegisterOrPair.AY -> asmgen.out(" sta P8ESTACK_LO,x | sty P8ESTACK_HI,x | dex")
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RegisterOrPair.AY -> asmgen.out(" sta P8ESTACK_LO,x | tya | sta P8ESTACK_HI,x | dex")
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RegisterOrPair.AX, RegisterOrPair.XY -> throw AssemblyError("can't use X here")
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RegisterOrPair.AX, RegisterOrPair.XY -> throw AssemblyError("can't use X here")
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in Cx16VirtualRegisters -> {
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in Cx16VirtualRegisters -> {
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val srcReg = asmgen.asmSymbolName(regs)
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val srcReg = asmgen.asmSymbolName(regs)
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