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fix invalid asm addressing mode for certain value-to-evalstack transfers

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This commit is contained in:
Irmen de Jong 2021-11-04 22:44:31 +01:00
parent be73739c62
commit f09c04eeac
2 changed files with 6 additions and 4 deletions
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5
codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AsmAssignment.kt
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@ -41,11 +41,12 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
{
val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toInt() ?: 0}
val constArrayIndexValue by lazy { array?.indexer?.constIndex() }
val asmVarname: String
get() = if(array==null)
val asmVarname: String by lazy {
if (array == null)
variableAsmName!!
else
asmgen.asmVariableName(array.arrayvar)
}
lateinit var origAssign: AsmAssignment

5
codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt
View File

@ -949,7 +949,8 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
lda #<$sourceName
ldy #>$sourceName+1
sta P8ESTACK_LO,x
sty P8ESTACK_HI,x
tya
sta P8ESTACK_HI,x
dex""")
}
else -> throw AssemblyError("string-assign to weird target")
@ -1581,7 +1582,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
}
TargetStorageKind.STACK -> {
when(regs) {
RegisterOrPair.AY -> asmgen.out(" sta P8ESTACK_LO,x | sty P8ESTACK_HI,x | dex")
RegisterOrPair.AY -> asmgen.out(" sta P8ESTACK_LO,x | tya | sta P8ESTACK_HI,x | dex")
RegisterOrPair.AX, RegisterOrPair.XY -> throw AssemblyError("can't use X here")
in Cx16VirtualRegisters -> {
val srcReg = asmgen.asmSymbolName(regs)