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https://github.com/irmen/prog8.git
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explicit integer type check for @R0-R15 parameters
avoids weird type inconsistency for boolean parameters that would get aliased as unsigned byte instead invisibly
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@ -232,9 +232,13 @@ class AstPreprocessor(val program: Program,
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.filter { it.name !in namesInSub && it.name !in existingAliases }
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.forEach {
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if (it.registerOrPair in Cx16VirtualRegisters) {
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val regname = it.registerOrPair!!.asScopedNameVirtualReg(it.type)
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var alias = Alias(it.name, IdentifierReference(regname, it.position), it.position)
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mods += IAstModification.InsertFirst(alias, subroutine)
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if(it.type.isInteger) {
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val regname = it.registerOrPair!!.asScopedNameVirtualReg(it.type)
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var alias = Alias(it.name, IdentifierReference(regname, it.position), it.position)
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mods += IAstModification.InsertFirst(alias, subroutine)
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} else {
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errors.err("using R0-R15 as register param requires integer type", it.position)
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}
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} else
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errors.err("can only use R0-R15 as register param for normal subroutines", it.position)
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}
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@ -350,4 +350,26 @@ main {
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errors.warnings[0] shouldContain "footgun"
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errors.warnings[1] shouldContain "footgun"
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}
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test("reg params R0-R15 cannot be used for non integer types") {
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val src="""
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main {
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sub func(bool flag @R1) {
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if flag
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return
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}
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extsub ${'$'}2000 = extok(bool flag @R0)
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sub start() {
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func(true)
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extok(true)
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}
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}"""
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val errors = ErrorReporterForTests(keepMessagesAfterReporting = true)
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compileText(C64Target(), false, src, writeAssembly = false, errors = errors) shouldBe null
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errors.errors.size shouldBe 1
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errors.warnings.size shouldBe 0
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errors.errors[0] shouldContain "requires integer type"
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}
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})
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@ -3,37 +3,15 @@
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%option no_sysinit
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main {
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sub func(bool flag @R1) {
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if flag
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return
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}
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extsub $2000 = extok(bool flag @R0)
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sub start() {
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cx16.r0 = (cx16.r0 & $a000) | $0055
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cx16.r0 = (cx16.r0 | $a000) ^ $0055
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cx16.r0 = (cx16.r0 ^ $a000) & $0055
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cx16.r0 = (cx16.r1 & $a000)
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cx16.r0 = (cx16.r1 | $a000)
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cx16.r0 = (cx16.r1 ^ $a000)
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; these are optimized already:
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cx16.r0 = (cx16.r0 & $a000)
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cx16.r0 = (cx16.r0 | $a000)
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cx16.r0 = (cx16.r0 ^ $a000)
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/*
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sys.set_irqd()
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cx16.VERA_IEN = 1 ; only vsync irqs
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repeat {
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while (cx16.VERA_ISR & 1)==0 {
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; wait for vsync
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}
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cx16.VERA_ISR = 1 ; clear vsync irq status
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palette.set_color(6, $ff0)
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repeat 2000 {
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cx16.r0++
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}
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palette.set_color(6, $00f)
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}
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*/
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func(true)
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extok(true)
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}
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}
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