mirror of
https://github.com/irmen/prog8.git
synced 2024-07-26 05:29:15 +00:00
tweaking multiple assignment targets
This commit is contained in:
Irmen de Jong
parent
a2a8a772ec
commit
fad74a6ae0
@ -11,16 +11,24 @@ sub start() {
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ubyte v2
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float f2
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uword address
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memory uword memaddr = $c000
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uword[2] wordarray
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byte b1
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v1=foo()
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X, Y =c64.GETADR()
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v1, v2 =c64.GETADR()
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address =c64.MEMBOT(1, 0.w)
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address =c64.IOBASE()
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A = c64.CHRIN()
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X = c64.CHRIN()
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v1 = c64.CHRIN()
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;v1=foo() ; @todo fix return type value error see sub
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A, Y =c64.GETADR() ; ok!
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Y, A =c64.GETADR() ; ok!
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address = c64flt.GETADRAY() ; ok!
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memaddr = c64flt.GETADRAY() ; ok!
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wordarray[1] = c64flt.GETADRAY() ; ok!
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v1, v2 =c64.GETADR() ; ok!
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address =c64.MEMBOT(1, 0.w) ; ok !
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address =c64.IOBASE() ; ok!
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A = c64.CHRIN() ; ok !
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X = c64.CHRIN() ; ok !
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v1 = c64.CHRIN() ; ok !
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return
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}
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@ -394,7 +394,6 @@ interface INameScope {
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}
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}
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private object ParentSentinel : Node {
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override val position = Position("<<sentinel>>", 0, 0, 0)
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override var parent: Node = this
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@ -1436,7 +1435,7 @@ class InlineAssembly(val assembly: String, override val position: Position) : IS
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}
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class RegisterOrStatusflag(val registerOrPair: RegisterOrPair?, val statusflag: Statusflag?)
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data class RegisterOrStatusflag(val registerOrPair: RegisterOrPair?, val statusflag: Statusflag?)
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class AnonymousScope(override var statements: MutableList<IStatement>,
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override val position: Position) : INameScope, IStatement {
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@ -1592,8 +1591,6 @@ fun prog8Parser.ModuleContext.toAst(name: String) : Module =
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Module(name, modulestatement().asSequence().map { it.toAst() }.toMutableList(), toPosition())
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/************** Helper extension methods (private) ************/
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private fun ParserRuleContext.toPosition() : Position {
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val file = Paths.get(this.start.inputStream.sourceName).fileName.toString()
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// note: be ware of TAB characters in the source text, they count as 1 column...
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@ -2056,3 +2053,28 @@ private fun prog8Parser.RepeatloopContext.toAst(): RepeatLoop {
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val scope = AnonymousScope(statements, statement_block()?.toPosition() ?: statement().toPosition())
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return RepeatLoop(scope, untilCondition, toPosition())
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}
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internal fun registerSet(asmReturnvaluesRegisters: Iterable<RegisterOrStatusflag>): Set<Register> {
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val resultRegisters = mutableSetOf<Register>()
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for(x in asmReturnvaluesRegisters) {
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when(x.registerOrPair) {
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RegisterOrPair.A -> resultRegisters.add(Register.A)
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RegisterOrPair.X -> resultRegisters.add(Register.X)
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RegisterOrPair.Y -> resultRegisters.add(Register.Y)
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RegisterOrPair.AX -> {
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resultRegisters.add(Register.A)
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resultRegisters.add(Register.X)
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}
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RegisterOrPair.AY -> {
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resultRegisters.add(Register.A)
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resultRegisters.add(Register.Y)
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}
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RegisterOrPair.XY -> {
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resultRegisters.add(Register.X)
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resultRegisters.add(Register.Y)
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}
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}
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}
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return resultRegisters
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}
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@ -177,7 +177,6 @@ class AstChecker(private val namespace: INameScope,
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return super.process(label)
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}
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/**
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* Check subroutine definition
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*/
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@ -300,9 +299,32 @@ class AstChecker(private val namespace: INameScope,
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/**
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* Assignment target must be register, or a variable name
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* Also check data type compatibility
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* Also check data type compatibility and number of values
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*/
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override fun process(assignment: Assignment): IStatement {
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// assigning from a functioncall COULD return multiple values (from an asm subroutine)
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val stmt = (assignment.value as FunctionCall).target.targetStatement(namespace)
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if(stmt is Subroutine && stmt.returntypes.size>1) {
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if(stmt.isAsmSubroutine) {
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if(stmt.returntypes.size != assignment.targets.size)
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checkResult.add(ExpressionError("number of return values doesn't match number of assignment targets", assignment.value.position))
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else {
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if(assignment.targets.all{it.register!=null}) {
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val returnRegisters = registerSet(stmt.asmReturnvaluesRegisters)
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val targetRegisters = assignment.targets.filter { it.register != null }.map { it.register }.toSet()
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if (returnRegisters != targetRegisters)
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checkResult.add(ExpressionError("asmsub return registers $returnRegisters don't match assignment target registers", assignment.position))
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}
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for(thing in stmt.returntypes.zip(assignment.targets)) {
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if(thing.second.determineDatatype(namespace, heap, assignment)!=thing.first)
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checkResult.add(ExpressionError("return type mismatch for target ${thing.second.shortString()}", assignment.value.position))
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}
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}
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} else
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checkResult.add(ExpressionError("only asmsub subroutines can return multiple values", assignment.value.position))
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}
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var resultingAssignment = assignment
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for (target in assignment.targets) {
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resultingAssignment = processAssignmentTarget(resultingAssignment, target)
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@ -367,31 +389,15 @@ class AstChecker(private val namespace: INameScope,
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} else {
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val sourceDatatype: DataType? = assignment.value.resultingDatatype(namespace, heap)
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if(sourceDatatype==null) {
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if(assignment.value is FunctionCall) {
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// a functioncall COULD return multiple values (from an asm subroutine), treat that differently
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val stmt = (assignment.value as FunctionCall).target.targetStatement(namespace)
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if(stmt is Subroutine && stmt.returntypes.size>1) {
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if(stmt.isAsmSubroutine) {
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if(stmt.returntypes.size != assignment.targets.size)
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checkResult.add(ExpressionError("number of return values doesn't match number of assignment targets", assignment.value.position))
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else {
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for(thing in stmt.returntypes.zip(assignment.targets)) {
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if(thing.second.determineDatatype(namespace, heap, assignment)!=thing.first)
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checkResult.add(ExpressionError("return type mismatch for target ${thing.second.shortString()}", assignment.value.position))
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}
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}
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} else
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checkResult.add(ExpressionError("only asmsub subroutines can return multiple values", assignment.value.position))
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}
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else
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if(assignment.targets.size<=1) {
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if (assignment.value is FunctionCall)
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checkResult.add(ExpressionError("function call doesn't return a suitable value to use in assignment", assignment.value.position))
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else
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checkResult.add(ExpressionError("assignment value is invalid or has no proper datatype", assignment.value.position))
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}
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else
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checkResult.add(ExpressionError("assignment value is invalid or has no proper datatype", assignment.value.position))
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}
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else {
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else
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checkAssignmentCompatible(targetDatatype, sourceDatatype, assignment.value, assignment.position)
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}
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}
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}
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return assignment
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@ -792,13 +792,18 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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private fun translateSubroutineCall(subroutine: Subroutine, arguments: List<IExpression>, callPosition: Position) {
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// evaluate the arguments and assign them into the subroutine's argument variables.
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prog.line(callPosition)
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for(arg in arguments.zip(subroutine.parameters)) {
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translate(arg.first)
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val opcode=opcodePopvar(arg.second.type)
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prog.instr(opcode, callLabel = subroutine.scopedname+"."+arg.second.name)
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if(subroutine.asmReturnvaluesRegisters.isNotEmpty()) {
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TODO("call asmsub by loading registers instead")
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} else {
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prog.line(callPosition)
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for (arg in arguments.zip(subroutine.parameters)) {
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translate(arg.first)
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val opcode = opcodePopvar(arg.second.type)
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prog.instr(opcode, callLabel = subroutine.scopedname + "." + arg.second.name)
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}
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}
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prog.instr(Opcode.CALL, callLabel=subroutine.scopedname)
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prog.instr(Opcode.CALL, callLabel = subroutine.scopedname)
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}
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private fun translateBinaryOperator(operator: String, dt: DataType) {
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@ -1080,7 +1085,6 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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}
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}
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private fun translate(stmt: VariableInitializationAssignment) {
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// this is an assignment to initialize a variable's value in the scope.
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// the compiler can perhaps optimize this phase.
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@ -1089,48 +1093,16 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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}
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private fun translate(stmt: Assignment) {
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val assignTarget= stmt.singleTarget
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prog.line(stmt.position)
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translate(stmt.value)
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val assignTarget= stmt.singleTarget
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if(assignTarget==null) {
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// we're dealing with multiple return values
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val targetStmt = (stmt.value as? FunctionCall)?.target?.targetStatement(namespace)
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if(targetStmt is Subroutine && targetStmt.isAsmSubroutine) {
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// we're dealing with the one case where multiple assignment targets are allowed: a call to an asmsub with multiple return values
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// for now, we only support multiple return values as long as they're returned in registers as well.
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if(targetStmt.asmReturnvaluesRegisters.isEmpty())
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throw CompilerException("we only support multiple return values / assignment when the asmsub returns values in registers")
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// if the result registers are not assigned in the exact same registers, or in variables, we need some code
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if(stmt.targets.all{it.register!=null}) {
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val resultRegisters = mutableListOf<Register>()
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for(x in targetStmt.asmReturnvaluesRegisters) {
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when(x.registerOrPair) {
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RegisterOrPair.A -> resultRegisters.add(Register.A)
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RegisterOrPair.X -> resultRegisters.add(Register.X)
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RegisterOrPair.Y -> resultRegisters.add(Register.Y)
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RegisterOrPair.AX -> {
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resultRegisters.add(Register.A)
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resultRegisters.add(Register.X)
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}
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RegisterOrPair.AY -> {
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resultRegisters.add(Register.A)
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resultRegisters.add(Register.Y)
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}
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RegisterOrPair.XY -> {
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resultRegisters.add(Register.X)
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resultRegisters.add(Register.Y)
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}
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}
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}
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TODO("$resultRegisters")
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} else {
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TODO("store results from registers ${targetStmt.asmReturnvaluesRegisters}")
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}
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} else throw CompilerException("can only use multiple assignment targets on an asmsub call")
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translateMultiReturnAssignment(stmt)
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return
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}
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prog.line(stmt.position)
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translate(stmt.value)
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val valueDt = stmt.value.resultingDatatype(namespace, heap)
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val targetDt = assignTarget.determineDatatype(namespace, heap, stmt)
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if(valueDt!=targetDt) {
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@ -1181,11 +1153,90 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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translateAugAssignOperator(stmt.aug_op, stmt.value.resultingDatatype(namespace, heap))
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}
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if(stmt.value is FunctionCall) {
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val sub = (stmt.value as FunctionCall).target.targetStatement(namespace)
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if(sub is Subroutine && sub.asmReturnvaluesRegisters.isNotEmpty()) {
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// the subroutine call returns its values in registers
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storeRegisterIntoTarget(sub.asmReturnvaluesRegisters.single(), assignTarget, stmt)
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return
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}
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}
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// pop the result value back into the assignment target
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val datatype = assignTarget.determineDatatype(namespace, heap, stmt)!!
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popValueIntoTarget(assignTarget, datatype)
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}
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private fun translateMultiReturnAssignment(stmt: Assignment) {
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val targetStmt = (stmt.value as? FunctionCall)?.target?.targetStatement(namespace)
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if(targetStmt is Subroutine && targetStmt.isAsmSubroutine) {
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// we're dealing with the one case where multiple assignment targets are allowed: a call to an asmsub with multiple return values
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// for now, we only support multiple return values as long as they're returned in registers as well.
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if(targetStmt.asmReturnvaluesRegisters.isEmpty())
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throw CompilerException("we only support multiple return values / assignment when the asmsub returns values in registers")
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// if the result registers are not assigned in the exact same registers, or in variables, we need some code
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if(stmt.targets.all{it.register!=null}) {
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val resultRegisters = registerSet(targetStmt.asmReturnvaluesRegisters)
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if(stmt.targets.size!=resultRegisters.size)
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throw CompilerException("asmsub number of return values doesn't match number of assignment targets ${stmt.position}")
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val targetRegs = stmt.targets.filter {it.register!=null}.map{it.register}.toSet()
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if(resultRegisters!=targetRegs)
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throw CompilerException("asmsub return registers don't match assignment target registers ${stmt.position}")
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// output is in registers already, no need to emit any asm code
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} else {
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// output is in registers but has to be stored somewhere
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for(result in targetStmt.asmReturnvaluesRegisters.zip(stmt.targets))
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storeRegisterIntoTarget(result.first, result.second, stmt)
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}
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} else throw CompilerException("can only use multiple assignment targets on an asmsub call")
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}
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private fun storeRegisterIntoTarget(registerOrStatus: RegisterOrStatusflag, target: AssignTarget, parent: IStatement) {
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if(registerOrStatus.statusflag!=null)
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return
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when(registerOrStatus.registerOrPair){
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RegisterOrPair.A -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.A, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.X -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.X, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.Y -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.Y, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.AX -> {
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// deal with register pair AX: target = A + X*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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throw CompilerException("invalid target datatype for registerpair $targetDt")
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prog.instr(Opcode.PUSH_REGAX_WORD)
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popValueIntoTarget(target, targetDt)
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}
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RegisterOrPair.AY -> {
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// deal with register pair AY: target = A + Y*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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throw CompilerException("invalid target datatype for registerpair $targetDt")
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prog.instr(Opcode.PUSH_REGAY_WORD)
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popValueIntoTarget(target, targetDt)
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}
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RegisterOrPair.XY -> {
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// deal with register pair XY: target = X + Y*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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throw CompilerException("invalid target datatype for registerpair $targetDt")
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prog.instr(Opcode.PUSH_REGXY_WORD)
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popValueIntoTarget(target, targetDt)
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}
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}
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}
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private fun popValueIntoTarget(assignTarget: AssignTarget, datatype: DataType) {
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when {
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assignTarget.identifier != null -> {
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@ -14,6 +14,9 @@ enum class Opcode {
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PUSH_VAR_BYTE, // push byte variable (ubyte, byte)
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PUSH_VAR_WORD, // push word variable (uword, word)
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PUSH_VAR_FLOAT, // push float variable
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PUSH_REGAX_WORD, // push registers A/X as a 16-bit word
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PUSH_REGAY_WORD, // push registers A/Y as a 16-bit word
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PUSH_REGXY_WORD, // push registers X/Y as a 16-bit word
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// popping values off the (evaluation) stack, possibly storing them in another location
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DISCARD_BYTE, // discard top byte value
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@ -459,6 +459,10 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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"""
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}
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Opcode.PUSH_REGAY_WORD -> {
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" sta ${ESTACK_LO.toHex()},x | tya | sta ${ESTACK_HI.toHex()},x | dex "
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}
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Opcode.READ_INDEXED_VAR_BYTE -> { // @todo is this correct?
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"""
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ldy ${(ESTACK_LO+1).toHex()},x
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@ -998,8 +1002,6 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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"""
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private val patterns = listOf(
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// -------------- simple conversions ----------------
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// ----------- assignment to BYTE VARIABLE ----------------
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// var = (u)bytevalue
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AsmPattern(listOf(Opcode.PUSH_BYTE, Opcode.POP_VAR_BYTE)) { segment ->
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@ -2434,10 +2436,56 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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ldy #>${hexVal(segment[2])}
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jsr prog8_lib.copy_float
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"""
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},
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// ---------- some special operations ------------------
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// var word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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sta ${segment[1].callLabel}
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sty ${segment[1].callLabel}+1
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"""
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},
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// var word = AX register pair
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AsmPattern(listOf(Opcode.PUSH_REGAX_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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sta ${segment[1].callLabel}
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stx ${segment[1].callLabel}+1
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"""
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},
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// var word = XY register pair
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AsmPattern(listOf(Opcode.PUSH_REGXY_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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stx ${segment[1].callLabel}
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sty ${segment[1].callLabel}+1
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"""
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},
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// mem word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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sta ${hexVal(segment[1])}
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sty ${hexValPlusOne(segment[1])}
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"""
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},
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// mem word = AX register pair
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AsmPattern(listOf(Opcode.PUSH_REGAX_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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sta ${hexVal(segment[1])}
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stx ${hexValPlusOne(segment[1])}
|
||||
"""
|
||||
},
|
||||
// mem word = XY register pair
|
||||
AsmPattern(listOf(Opcode.PUSH_REGXY_WORD, Opcode.POP_MEM_WORD)) { segment ->
|
||||
"""
|
||||
stx ${hexVal(segment[1])}
|
||||
sty ${hexValPlusOne(segment[1])}
|
||||
"""
|
||||
}
|
||||
|
||||
|
||||
// // assignment: floatarray[idxbyte] = float
|
||||
|
||||
// // @todo assignment: floatarray[idxbyte] = float
|
||||
// AsmPattern(listOf(Opcode.PUSH_FLOAT, Opcode.PUSH_BYTE, Opcode.WRITE_INDEXED_VAR_FLOAT)) { segment ->
|
||||
// val floatConst = getFloatConst(segment[0].arg!!)
|
||||
// val index = intVal(segment[1]) * Mflpt5.MemorySize
|
||||
@ -2451,7 +2499,7 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
|
||||
// jsr prog8_lib.copy_float
|
||||
// """
|
||||
// },
|
||||
// // assignment: floatarray[idxbyte] = floatvar
|
||||
// // @todo assignment: floatarray[idxbyte] = floatvar
|
||||
// AsmPattern(listOf(Opcode.PUSH_VAR_FLOAT, Opcode.PUSH_BYTE, Opcode.WRITE_INDEXED_VAR_FLOAT)) { segment ->
|
||||
// val index = intVal(segment[1]) * Mflpt5.MemorySize
|
||||
// """
|
||||
@ -2464,7 +2512,7 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
|
||||
// jsr prog8_lib.copy_float
|
||||
// """
|
||||
// },
|
||||
// // assignment: floatarray[idxbyte] = memfloat
|
||||
// // @todo assignment: floatarray[idxbyte] = memfloat
|
||||
// AsmPattern(listOf(Opcode.PUSH_MEM_FLOAT, Opcode.PUSH_BYTE, Opcode.WRITE_INDEXED_VAR_FLOAT)) { segment ->
|
||||
// val index = intVal(segment[1]) * Mflpt5.MemorySize
|
||||
// """
|
||||
|
||||
@ -762,6 +762,21 @@ class StackVm(private var traceOutputFile: String?) {
|
||||
checkDt(value, DataType.FLOAT)
|
||||
evalstack.push(value)
|
||||
}
|
||||
Opcode.PUSH_REGAX_WORD -> {
|
||||
val a=variables["A"]!!.integerValue()
|
||||
val x=variables["X"]!!.integerValue()
|
||||
evalstack.push(Value(DataType.UWORD, x*256+a))
|
||||
}
|
||||
Opcode.PUSH_REGAY_WORD -> {
|
||||
val a=variables["A"]!!.integerValue()
|
||||
val y=variables["Y"]!!.integerValue()
|
||||
evalstack.push(Value(DataType.UWORD, y*256+a))
|
||||
}
|
||||
Opcode.PUSH_REGXY_WORD -> {
|
||||
val x=variables["X"]!!.integerValue()
|
||||
val y=variables["Y"]!!.integerValue()
|
||||
evalstack.push(Value(DataType.UWORD, y*256+x))
|
||||
}
|
||||
Opcode.POP_VAR_BYTE -> {
|
||||
val value = evalstack.pop()
|
||||
checkDt(value, DataType.UBYTE, DataType.BYTE)
|
||||
|
||||
@ -120,18 +120,18 @@ asmsub MOVEF () -> clobbers(A,X) -> () = $bc0f ; copy fac1 to fac2
|
||||
asmsub FTOMEMXY (mflpt: uword @ XY) -> clobbers(A,Y) -> () = $bbd4 ; store fac1 to memory X/Y as 5-byte mflpt
|
||||
|
||||
; fac1-> signed word in Y/A (might throw ILLEGAL QUANTITY)
|
||||
; (use c64flt.FTOSWRDAY to get A/Y output; lo/hi switched to normal order)
|
||||
; (tip: use c64flt.FTOSWRDAY to get A/Y output; lo/hi switched to normal little endian order)
|
||||
asmsub FTOSWORDYA () -> clobbers(X) -> (ubyte @ Y, ubyte @ A) = $b1aa
|
||||
|
||||
; fac1 -> unsigned word in Y/A (might throw ILLEGAL QUANTITY) (result also in $14/15)
|
||||
; (use c64flt.GETADRAY to get A/Y output; lo/hi switched to normal order)
|
||||
; (tip: use c64flt.GETADRAY to get A/Y output; lo/hi switched to normal little endian order)
|
||||
asmsub GETADR () -> clobbers(X) -> (ubyte @ Y, ubyte @ A) = $b7f7
|
||||
|
||||
asmsub QINT () -> clobbers(A,X,Y) -> () = $bc9b ; fac1 -> 4-byte signed integer in 98-101 ($62-$65), with the MSB FIRST.
|
||||
asmsub AYINT () -> clobbers(A,X,Y) -> () = $b1bf ; fac1-> signed word in 100-101 ($64-$65) MSB FIRST. (might throw ILLEGAL QUANTITY)
|
||||
|
||||
; signed word in Y/A -> float in fac1
|
||||
; (use c64flt.GIVAYFAY to use A/Y input; lo/hi switched to normal order)
|
||||
; (tip: use c64flt.GIVAYFAY to use A/Y input; lo/hi switched to normal order)
|
||||
; there is also c64flt.GIVUAYF - unsigned word in A/Y (lo/hi) to fac1
|
||||
; there is also c64flt.FREADS32 that reads from 98-101 ($62-$65) MSB FIRST
|
||||
; there is also c64flt.FREADUS32 that reads from 98-101 ($62-$65) MSB FIRST
|
||||
@ -169,7 +169,7 @@ asmsub ABS () -> clobbers() -> () = $bc58 ; fac1 = ABS(fac1)
|
||||
asmsub SQR () -> clobbers(A,X,Y) -> () = $bf71 ; fac1 = SQRT(fac1)
|
||||
asmsub EXP () -> clobbers(A,X,Y) -> () = $bfed ; fac1 = EXP(fac1) (e ** fac1)
|
||||
asmsub NEGOP () -> clobbers(A) -> () = $bfb4 ; switch the sign of fac1
|
||||
asmsub RND () -> clobbers(A,X,Y) -> () = $e097 ; fac1 = RND() (use RNDA instead)
|
||||
asmsub RND () -> clobbers(A,X,Y) -> () = $e097 ; fac1 = RND() (tip: use RNDA instead)
|
||||
asmsub RNDA (acc: ubyte @ A) -> clobbers(A,X,Y) -> () = $e09a ; fac1 = RND(A)
|
||||
asmsub COS () -> clobbers(A,X,Y) -> () = $e264 ; fac1 = COS(fac1)
|
||||
asmsub SIN () -> clobbers(A,X,Y) -> () = $e26b ; fac1 = SIN(fac1)
|
||||
@ -229,7 +229,7 @@ asmsub CLALL () -> clobbers(A,X) -> () = $FFE7 ; (via 812 ($32C)) close al
|
||||
asmsub UDTIM () -> clobbers(A,X) -> () = $FFEA ; update the software clock
|
||||
asmsub SCREEN () -> clobbers() -> (ubyte @ X, ubyte @ Y) = $FFED ; read number of screen rows and columns
|
||||
asmsub PLOT (dir: ubyte @ Pc, col: ubyte @ Y, row: ubyte @ X) -> clobbers() -> (ubyte @ X, ubyte @ Y) = $FFF0 ; read/set position of cursor on screen
|
||||
asmsub IOBASE () -> clobbers() -> (ubyte @ X, ubyte @ Y) = $FFF3 ; read base address of I/O devices
|
||||
asmsub IOBASE () -> clobbers() -> (uword @ XY) = $FFF3 ; read base address of I/O devices
|
||||
|
||||
; ---- end of C64 kernal routines ----
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user