version 8.7

fixed virtual machine string comparison syscall

.idea/compiler.xml

@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <project version="4">
   <component name="CompilerConfiguration">
-    <option name="BUILD_PROCESS_HEAP_SIZE" value="1200" />
+    <option name="BUILD_PROCESS_HEAP_SIZE" value="3000" />
     <bytecodeTargetLevel target="11" />
   </component>
-</project>
+</project>

.idea/kotlinc.xml

@@ -1,6 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<project version="4">
-  <component name="Kotlin2JvmCompilerArguments">
-    <option name="jvmTarget" value="11" />
-  </component>
-</project>

.idea/libraries/antlr_antlr4.xml

@@ -1,15 +1,15 @@
 <component name="libraryTable">
   <library name="antlr.antlr4" type="repository">
-    <properties maven-id="org.antlr:antlr4:4.9.2">
+    <properties maven-id="org.antlr:antlr4:4.10.1">
       <exclude>
         <dependency maven-id="com.ibm.icu:icu4j" />
       </exclude>
     </properties>
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4/4.9.2/antlr4-4.9.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4-runtime/4.9.2/antlr4-runtime-4.9.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr-runtime/3.5.2/antlr-runtime-3.5.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/ST4/4.3/ST4-4.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4/4.10.1/antlr4-4.10.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr4-runtime/4.10.1/antlr4-runtime-4.10.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/antlr-runtime/3.5.3/antlr-runtime-3.5.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/antlr/ST4/4.3.3/ST4-4.3.3.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/abego/treelayout/org.abego.treelayout.core/1.0.3/org.abego.treelayout.core-1.0.3.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/glassfish/javax.json/1.0.4/javax.json-1.0.4.jar!/" />
     </CLASSES>

.idea/libraries/io_kotest_assertions_core_jvm.xml

@@ -1,20 +1,21 @@
 <component name="libraryTable">
   <library name="io.kotest.assertions.core.jvm" type="repository">
-    <properties maven-id="io.kotest:kotest-assertions-core-jvm:4.6.3" />
+    <properties maven-id="io.kotest:kotest-assertions-core-jvm:5.3.2" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/4.6.3/kotest-assertions-core-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.5.0/kotlin-stdlib-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.5.0/kotlin-stdlib-1.5.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.3.2/kotest-assertions-core-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.6.21/kotlin-stdlib-jdk8-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.6.21/kotlin-stdlib-1.6.21.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/13.0/annotations-13.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.5.0/kotlin-stdlib-jdk7-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/4.6.3/kotest-assertions-shared-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.9/java-diff-utils-4.9.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.5.0/kotlinx-coroutines-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.5.0/kotlin-reflect-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.5.0/kotlinx-coroutines-core-jvm-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.5.0/kotlin-stdlib-common-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/4.6.3/kotest-common-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/4.6.3/kotest-assertions-api-jvm-4.6.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.6.21/kotlin-stdlib-jdk7-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.3.2/kotest-assertions-shared-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.11/java-diff-utils-4.11.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.2.0/opentest4j-1.2.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.6.1/kotlinx-coroutines-jdk8-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.6.21/kotlin-reflect-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.6.1/kotlinx-coroutines-core-jvm-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.6.0/kotlin-stdlib-common-1.6.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.3.2/kotest-common-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.3.2/kotest-assertions-api-jvm-5.3.2.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/io_kotest_property_jvm.xml

@@ -1,22 +1,22 @@
 <component name="libraryTable">
   <library name="io.kotest.property.jvm" type="repository">
-    <properties maven-id="io.kotest:kotest-property-jvm:4.6.3" />
+    <properties maven-id="io.kotest:kotest-property-jvm:5.3.2" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-property-jvm/4.6.3/kotest-property-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.5.0/kotlin-stdlib-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.5.0/kotlin-stdlib-1.5.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-property-jvm/5.3.2/kotest-property-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/com/github/curious-odd-man/rgxgen/1.3/rgxgen-1.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.6.21/kotlin-stdlib-jdk8-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.6.21/kotlin-stdlib-1.6.21.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/13.0/annotations-13.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.5.0/kotlin-stdlib-jdk7-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/4.6.3/kotest-common-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/4.6.3/kotest-assertions-shared-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/4.6.3/kotest-assertions-api-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.5.0/kotlinx-coroutines-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.9/java-diff-utils-4.9.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/com/github/mifmif/generex/1.0.2/generex-1.0.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/dk/brics/automaton/automaton/1.11-8/automaton-1.11-8.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.5.0/kotlin-reflect-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.5.0/kotlinx-coroutines-core-jvm-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.5.0/kotlin-stdlib-common-1.5.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.6.21/kotlin-stdlib-jdk7-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.3.2/kotest-common-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.3.2/kotest-assertions-shared-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.3.2/kotest-assertions-api-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.6.1/kotlinx-coroutines-jdk8-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.2.0/opentest4j-1.2.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.11/java-diff-utils-4.11.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.6.21/kotlin-reflect-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.6.1/kotlinx-coroutines-core-jvm-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.6.0/kotlin-stdlib-common-1.6.0.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/io_kotest_runner_junit5_jvm.xml

@@ -1,54 +1,51 @@
 <component name="libraryTable">
   <library name="io.kotest.runner.junit5.jvm" type="repository">
-    <properties maven-id="io.kotest:kotest-runner-junit5-jvm:4.6.3" />
+    <properties maven-id="io.kotest:kotest-runner-junit5-jvm:5.3.2" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-runner-junit5-jvm/4.6.3/kotest-runner-junit5-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-api-jvm/4.6.3/kotest-framework-api-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/4.6.3/kotest-assertions-shared-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.9/java-diff-utils-4.9.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/4.6.3/kotest-common-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-engine-jvm/4.6.3/kotest-framework-engine-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/github/classgraph/classgraph/4.8.105/classgraph-4.8.105.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-runner-junit5-jvm/5.3.2/kotest-runner-junit5-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-api-jvm/5.3.2/kotest-framework-api-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-shared-jvm/5.3.2/kotest-assertions-shared-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/github/java-diff-utils/java-diff-utils/4.11/java-diff-utils-4.11.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-test-jvm/1.6.1/kotlinx-coroutines-test-jvm-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-common-jvm/5.3.2/kotest-common-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-engine-jvm/5.3.2/kotest-framework-engine-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/github/classgraph/classgraph/4.8.146/classgraph-4.8.146.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/com/github/ajalt/mordant/1.2.1/mordant-1.2.1.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/com/github/ajalt/colormath/1.2.0/colormath-1.2.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-script-util/1.5.0/kotlin-script-util-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/intellij/deps/trove4j/1.0.20181211/trove4j-1.0.20181211.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-daemon-client/1.5.0/kotlin-daemon-client-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core/1.3.8/kotlinx-coroutines-core-1.3.8.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-scripting-jvm/1.5.0/kotlin-scripting-jvm-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-scripting-common/1.5.0/kotlin-scripting-common-1.5.0.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/opentest4j/opentest4j/1.2.0/opentest4j-1.2.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-discovery-jvm/4.6.3/kotest-framework-discovery-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/4.6.3/kotest-assertions-core-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.5.0/kotlinx-coroutines-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/4.6.3/kotest-assertions-api-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-extensions-jvm/4.6.3/kotest-extensions-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/commons-io/commons-io/2.6/commons-io-2.6.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk/1.9.3/mockk-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-common/1.9.3/mockk-common-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-dsl/1.9.3/mockk-dsl-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-dsl-jvm/1.9.3/mockk-dsl-jvm-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-jvm/1.9.3/mockk-agent-jvm-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-api/1.9.3/mockk-agent-api-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-common/1.9.3/mockk-agent-common-1.9.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/objenesis/objenesis/3.0.1/objenesis-3.0.1.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy/1.9.10/byte-buddy-1.9.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy-agent/1.9.10/byte-buddy-agent-1.9.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-concurrency-jvm/4.6.3/kotest-framework-concurrency-jvm-4.6.3.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.5.0/kotlinx-coroutines-core-jvm-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.5.0/kotlin-stdlib-common-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-engine/1.6.2/junit-platform-engine-1.6.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-debug/1.6.1/kotlinx-coroutines-debug-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/net/java/dev/jna/jna/5.9.0/jna-5.9.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/net/java/dev/jna/jna-platform/5.9.0/jna-platform-5.9.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-discovery-jvm/5.3.2/kotest-framework-discovery-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-core-jvm/5.3.2/kotest-assertions-core-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-jdk8/1.6.1/kotlinx-coroutines-jdk8-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-assertions-api-jvm/5.3.2/kotest-assertions-api-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-extensions-jvm/5.3.2/kotest-extensions-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/commons-io/commons-io/2.11.0/commons-io-2.11.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk/1.12.3/mockk-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-common/1.12.3/mockk-common-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-dsl/1.12.3/mockk-dsl-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-dsl-jvm/1.12.3/mockk-dsl-jvm-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-jvm/1.12.3/mockk-agent-jvm-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-api/1.12.3/mockk-agent-api-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/mockk/mockk-agent-common/1.12.3/mockk-agent-common-1.12.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/objenesis/objenesis/3.1/objenesis-3.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy/1.12.6/byte-buddy-1.12.6.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/net/bytebuddy/byte-buddy-agent/1.12.6/byte-buddy-agent-1.12.6.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/io/kotest/kotest-framework-concurrency-jvm/5.3.2/kotest-framework-concurrency-jvm-5.3.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-coroutines-core-jvm/1.6.1/kotlinx-coroutines-core-jvm-1.6.1.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.6.0/kotlin-stdlib-common-1.6.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-engine/1.7.2/junit-platform-engine-1.7.2.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/apiguardian/apiguardian-api/1.1.0/apiguardian-api-1.1.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-commons/1.6.2/junit-platform-commons-1.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-suite-api/1.6.2/junit-platform-suite-api-1.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-launcher/1.6.2/junit-platform-launcher-1.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/junit/jupiter/junit-jupiter-api/5.6.2/junit-jupiter-api-5.6.2.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.5.0/kotlin-stdlib-jdk8-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.5.0/kotlin-stdlib-1.5.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-commons/1.7.2/junit-platform-commons-1.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-suite-api/1.7.2/junit-platform-suite-api-1.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/junit/platform/junit-platform-launcher/1.7.2/junit-platform-launcher-1.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/junit/jupiter/junit-jupiter-api/5.7.2/junit-jupiter-api-5.7.2.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.6.21/kotlin-stdlib-jdk8-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.6.21/kotlin-stdlib-1.6.21.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/13.0/annotations-13.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.5.0/kotlin-stdlib-jdk7-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-script-runtime/1.5.0/kotlin-script-runtime-1.5.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.5.0/kotlin-reflect-1.5.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.6.21/kotlin-stdlib-jdk7-1.6.21.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-reflect/1.6.21/kotlin-reflect-1.6.21.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/jetbrains_kotlinx_cli_jvm.xml

@@ -1,8 +1,8 @@
 <component name="libraryTable">
   <library name="jetbrains.kotlinx.cli.jvm" type="repository">
-    <properties include-transitive-deps="false" maven-id="org.jetbrains.kotlinx:kotlinx-cli-jvm:0.3.3" />
+    <properties include-transitive-deps="false" maven-id="org.jetbrains.kotlinx:kotlinx-cli-jvm:0.3.4" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-cli-jvm/0.3.3/kotlinx-cli-jvm-0.3.3.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlinx/kotlinx-cli-jvm/0.3.4/kotlinx-cli-jvm-0.3.4.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/michael_bull_kotlin_result_jvm.xml

@@ -1,13 +1,13 @@
 <component name="libraryTable">
   <library name="michael.bull.kotlin.result.jvm" type="repository">
-    <properties maven-id="com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.12" />
+    <properties maven-id="com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/com/michael-bull/kotlin-result/kotlin-result-jvm/1.1.12/kotlin-result-jvm-1.1.12.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.5.10/kotlin-stdlib-jdk8-1.5.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.5.10/kotlin-stdlib-1.5.10.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/com/michael-bull/kotlin-result/kotlin-result-jvm/1.1.16/kotlin-result-jvm-1.1.16.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.6.20/kotlin-stdlib-common-1.6.20.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk8/1.6.20/kotlin-stdlib-jdk8-1.6.20.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib/1.6.20/kotlin-stdlib-1.6.20.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/annotations/13.0/annotations-13.0.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.5.10/kotlin-stdlib-jdk7-1.5.10.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-common/1.5.10/kotlin-stdlib-common-1.5.10.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/jetbrains/kotlin/kotlin-stdlib-jdk7/1.6.20/kotlin-stdlib-jdk7-1.6.20.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/slf4j_simple.xml

@@ -1,9 +1,9 @@
 <component name="libraryTable">
   <library name="slf4j.simple" type="repository">
-    <properties maven-id="org.slf4j:slf4j-simple:1.7.30" />
+    <properties maven-id="org.slf4j:slf4j-simple:1.7.36" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-simple/1.7.30/slf4j-simple-1.7.30.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-api/1.7.30/slf4j-api-1.7.30.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-simple/1.7.36/slf4j-simple-1.7.36.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-api/1.7.36/slf4j-api-1.7.36.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/libraries/takes.xml

@@ -1,11 +1,15 @@
 <component name="libraryTable">
   <library name="takes" type="repository">
-    <properties maven-id="org.takes:takes:1.19" />
+    <properties maven-id="org.takes:takes:1.20" />
     <CLASSES>
-      <root url="jar://$MAVEN_REPOSITORY$/org/takes/takes/1.19/takes-1.19.jar!/" />
-      <root url="jar://$MAVEN_REPOSITORY$/org/cactoos/cactoos/0.42/cactoos-0.42.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/takes/takes/1.20/takes-1.20.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/cactoos/cactoos/0.50/cactoos-0.50.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/javax/xml/bind/jaxb-api/2.3.0/jaxb-api-2.3.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/org/slf4j/slf4j-api/1.7.25/slf4j-api-1.7.25.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/apache/commons/commons-text/1.4/commons-text-1.4.jar!/" />
       <root url="jar://$MAVEN_REPOSITORY$/org/apache/commons/commons-lang3/3.7/commons-lang3-3.7.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/com/sun/xml/bind/jaxb-core/2.3.0/jaxb-core-2.3.0.jar!/" />
+      <root url="jar://$MAVEN_REPOSITORY$/com/sun/xml/bind/jaxb-impl/2.3.0/jaxb-impl-2.3.0.jar!/" />
     </CLASSES>
     <JAVADOC />
     <SOURCES />

.idea/misc.xml

@@ -19,7 +19,7 @@
   <component name="FrameworkDetectionExcludesConfiguration">
     <type id="Python" />
   </component>
-  <component name="ProjectRootManager" version="2" languageLevel="JDK_11" project-jdk-name="11" project-jdk-type="JavaSDK">
+  <component name="ProjectRootManager" version="2" languageLevel="JDK_11" default="true" project-jdk-name="11" project-jdk-type="JavaSDK">
     <output url="file://$PROJECT_DIR$/out" />
   </component>
 </project>

.idea/modules.xml

@@ -2,16 +2,21 @@
 <project version="4">
   <component name="ProjectModuleManager">
     <modules>
-      <module fileurl="file://$PROJECT_DIR$/codeGeneration/codeGeneration.iml" filepath="$PROJECT_DIR$/codeGeneration/codeGeneration.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeCore/codeCore.iml" filepath="$PROJECT_DIR$/codeCore/codeCore.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeGenCpu6502/codeGenCpu6502.iml" filepath="$PROJECT_DIR$/codeGenCpu6502/codeGenCpu6502.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeGenExperimental/codeGenExperimental.iml" filepath="$PROJECT_DIR$/codeGenExperimental/codeGenExperimental.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeGenIntermediate/codeGenIntermediate.iml" filepath="$PROJECT_DIR$/codeGenIntermediate/codeGenIntermediate.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeGenVirtual/codeGenVirtual.iml" filepath="$PROJECT_DIR$/codeGenVirtual/codeGenVirtual.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeOptimizers/codeOptimizers.iml" filepath="$PROJECT_DIR$/codeOptimizers/codeOptimizers.iml" />
       <module fileurl="file://$PROJECT_DIR$/compiler/compiler.iml" filepath="$PROJECT_DIR$/compiler/compiler.iml" />
       <module fileurl="file://$PROJECT_DIR$/compilerAst/compilerAst.iml" filepath="$PROJECT_DIR$/compilerAst/compilerAst.iml" />
-      <module fileurl="file://$PROJECT_DIR$/compilerInterfaces/compilerInterfaces.iml" filepath="$PROJECT_DIR$/compilerInterfaces/compilerInterfaces.iml" />
       <module fileurl="file://$PROJECT_DIR$/dbusCompilerService/dbusCompilerService.iml" filepath="$PROJECT_DIR$/dbusCompilerService/dbusCompilerService.iml" />
       <module fileurl="file://$PROJECT_DIR$/docs/docs.iml" filepath="$PROJECT_DIR$/docs/docs.iml" />
       <module fileurl="file://$PROJECT_DIR$/examples/examples.iml" filepath="$PROJECT_DIR$/examples/examples.iml" />
       <module fileurl="file://$PROJECT_DIR$/httpCompilerService/httpCompilerService.iml" filepath="$PROJECT_DIR$/httpCompilerService/httpCompilerService.iml" />
+      <module fileurl="file://$PROJECT_DIR$/intermediate/intermediate.iml" filepath="$PROJECT_DIR$/intermediate/intermediate.iml" />
       <module fileurl="file://$PROJECT_DIR$/parser/parser.iml" filepath="$PROJECT_DIR$/parser/parser.iml" />
+      <module fileurl="file://$PROJECT_DIR$/virtualmachine/virtualmachine.iml" filepath="$PROJECT_DIR$/virtualmachine/virtualmachine.iml" />
     </modules>
   </component>
 </project>

.idea/vcs.xml

@@ -3,4 +3,4 @@
   <component name="VcsDirectoryMappings">
     <mapping directory="$PROJECT_DIR$" vcs="Git" />
   </component>
-</project>
+</project>

CompilerDevelopment.md

@@ -12,6 +12,9 @@
 * The same argument applies to `IMemSizer`, and - not entirely sure about that - `IBuiltinFunctions`.
 
 #### Steps to take, in conceptual (!) order:
+
+(note: all these steps have been implemented, rejected or otherwise solved now.)
+
 1. introduce an abstraction `SourceCode` that encapsulates the origin and actual loading of Prog8 source code
    - from the local file system (use case: user programs)
    - from resources (prog8lib)

LICENSE

@@ -1,6 +1,9 @@
 
-This sofware license is for Prog8 the compiler + associated libraries.
-The software generated by running the compiler is excluded from this.
+This sofware license is for Prog8 the compiler + associated library files.
+
+Exception: All output files generated by the compiler (intermediary files
+and compiled binary programs) are excluded from this; you can do with those
+whatever you want.
 
 
 

README.md

@@ -16,10 +16,11 @@ https://prog8.readthedocs.io/
 
 Software license
 ----------------
-GNU GPL 3.0, see file LICENSE
+GNU GPL 3.0 (see file LICENSE), with exception for generated code:
 
-- prog8 (the compiler + libraries) is licensed under GNU GPL 3.0
-- *exception:* the resulting files created by running the compiler are free to use in whatever way desired.
+- The compiler and its libraries are free to use according to the terms of the GNU GPL 3.0
+- *exception:* the resulting files (intermediate source codes and resulting binary program) created by the compiler
+  are excluded from the GPL and are free to use in whatever way desired, commercially or not.
 
 
 What does Prog8 provide?
@@ -37,7 +38,8 @@ What does Prog8 provide?
 - small program boilerplate/compilersupport overhead
 - programs can be run multiple times without reloading because of automatic variable (re)initializations.
 - conditional branches
-- 'when' statement to provide a concise jump table alternative to if/elseif chains
+- ``when`` statement to provide a concise jump table alternative to if/elseif chains
+- ``in`` expression for concise and efficient multi-value/containment check 
 - many built-in functions such as ``sin``, ``cos``, ``rnd``, ``abs``, ``min``, ``max``, ``sqrt``, ``msb``, ``rol``, ``ror``, ``swap``, ``sort`` and ``reverse``
 - various powerful built-in libraries to do I/O, number conversions, graphics and more  
 - convenience abstractions for low level aspects such as ZeroPage handling, program startup, explicit memory addresses
@@ -52,11 +54,12 @@ What does Prog8 provide?
 - breakpoints, that let the Vice emulator drop into the monitor if execution hits them
 - source code labels automatically loaded in Vice emulator so it can show them in disassembly
 
-*Two supported compiler targets* (contributions to improve these or to add support for other machines are welcome!):
+*Multiple supported compiler targets* (contributions to improve these or to add support for other machines are welcome!):
 
-- "c64": Commodore-64  (6510 CPU = almost a 6502)
+- "c64": Commodore-64  (6502 like CPU)
+- "c128": Commodore-128  (6502 like CPU - the Z80 cpu mode is not supported)
 - "cx16": [CommanderX16](https://www.commanderx16.com)  (65c02 CPU)
-- If you only use standard kernal and prog8 library routines, it is possible to compile the *exact same program* for both machines (just change the compiler target flag)!
+- If you only use standard kernal and prog8 library routines, it is possible to compile the *exact same program* for different machines (just change the compiler target flag)
 
 
 
@@ -75,6 +78,9 @@ It's handy to have an emulator (or a real machine perhaps!) to run the programs
 of the [Vice emulator](http://vice-emu.sourceforge.net/)  for the C64 target,
 and the [x16emu emulator](https://github.com/commanderx16/x16-emulator) for the CommanderX16 target.
 
+**Syntax highlighting:** for a few different editors, syntax highlighting definition files are provided.
+Look in the [syntax-files](https://github.com/irmen/prog8/tree/master/syntax-files) directory in the github repository to find them.
+
 
 Example code
 ------------

codeCore/build.gradle

@@ -24,9 +24,9 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':compilerAst')
+    // should have no dependencies to other modules
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
-    // implementation "org.jetbrains.kotlin:kotlin-reflect"
+    implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"
 }
 
 sourceSets {

codeCore/codeCore.iml

@@ -4,12 +4,11 @@
     <exclude-output />
     <content url="file://$MODULE_DIR$">
       <sourceFolder url="file://$MODULE_DIR$/src" isTestSource="false" />
-      <sourceFolder url="file://$MODULE_DIR$/test" isTestSource="true" />
       <excludeFolder url="file://$MODULE_DIR$/build" />
     </content>
     <orderEntry type="inheritedJdk" />
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
-    <orderEntry type="module" module-name="compilerAst" />
+    <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
   </component>
 </module>

codeCore/src/prog8/code/Either.kt

@@ -1,8 +1,7 @@
-package prog8
+package prog8.code
 
 /**
  * By convention, the right side of an `Either` is used to hold successful values.
- *
  */
 sealed class Either<out L, out R> {
 

codeCore/src/prog8/code/SymbolTable.kt

@@ -0,0 +1,267 @@
+package prog8.code
+
+import prog8.code.core.*
+
+
+/**
+ * Tree structure containing all symbol definitions in the program
+ * (blocks, subroutines, variables (all types), memoryslabs, and labels).
+ */
+class SymbolTable : StNode("", StNodeType.GLOBAL, Position.DUMMY) {
+    fun print() = printIndented(0)
+
+    override fun printProperties() { }
+
+    /**
+     * The table as a flat mapping of scoped names to the StNode.
+     * This gives the fastest lookup possible (no need to traverse tree nodes)
+     */
+    val flat: Map<List<String>, StNode> by lazy {
+        val result = mutableMapOf<List<String>, StNode>()
+        fun flatten(node: StNode) {
+            result[node.scopedName] = node
+            node.children.values.forEach { flatten(it) }
+        }
+        children.values.forEach { flatten(it) }
+        result
+    }
+
+    val allVariables: Collection<StStaticVariable> by lazy {
+        val vars = mutableListOf<StStaticVariable>()
+        fun collect(node: StNode) {
+            for(child in node.children) {
+                if(child.value.type== StNodeType.STATICVAR)
+                    vars.add(child.value as StStaticVariable)
+                else
+                    collect(child.value)
+            }
+        }
+        collect(this)
+        vars
+    }
+
+    val allMemMappedVariables: Collection<StMemVar> by lazy {
+        val vars = mutableListOf<StMemVar>()
+        fun collect(node: StNode) {
+            for(child in node.children) {
+                if(child.value.type== StNodeType.MEMVAR)
+                    vars.add(child.value as StMemVar)
+                else
+                    collect(child.value)
+            }
+        }
+        collect(this)
+        vars
+    }
+
+    val allMemorySlabs: Collection<StMemorySlab> by lazy {
+        children.mapNotNull { if (it.value.type == StNodeType.MEMORYSLAB) it.value as StMemorySlab else null }
+    }
+
+    override fun lookup(scopedName: List<String>) = flat[scopedName]
+}
+
+
+enum class StNodeType {
+    GLOBAL,
+    // MODULE,     // not used with current scoping rules
+    BLOCK,
+    SUBROUTINE,
+    ROMSUB,
+    LABEL,
+    STATICVAR,
+    MEMVAR,
+    CONSTANT,
+    BUILTINFUNC,
+    MEMORYSLAB
+}
+
+
+open class StNode(val name: String,
+                  val type: StNodeType,
+                  val position: Position,
+                  val children: MutableMap<String, StNode> = mutableMapOf()
+) {
+
+    lateinit var parent: StNode
+
+    val scopedName: List<String> by lazy {
+        if(type== StNodeType.GLOBAL)
+            emptyList()
+        else
+            parent.scopedName + name
+    }
+
+    fun lookup(name: String) =
+        lookupUnqualified(name)
+    open fun lookup(scopedName: List<String>) =
+        if(scopedName.size>1) lookupQualified(scopedName) else lookupUnqualified(scopedName[0])
+    fun lookupOrElse(name: String, default: () -> StNode) =
+        lookupUnqualified(name) ?: default()
+    fun lookupOrElse(scopedName: List<String>, default: () -> StNode) =
+        lookup(scopedName) ?: default()
+
+    private fun lookupQualified(scopedName: List<String>): StNode? {
+        // a scoped name refers to a name in another namespace, and always stars from the root.
+        var node = this
+        while(node.type!= StNodeType.GLOBAL)
+            node = node.parent
+
+        for(name in scopedName) {
+            if(name in node.children)
+                node = node.children.getValue(name)
+            else
+                return null
+        }
+        return node
+    }
+
+    private fun lookupUnqualified(name: String): StNode? {
+        // first consider the builtin functions
+        var globalscope = this
+        while(globalscope.type!= StNodeType.GLOBAL)
+            globalscope = globalscope.parent
+        val globalNode = globalscope.children[name]
+        if(globalNode!=null && globalNode.type== StNodeType.BUILTINFUNC)
+            return globalNode
+
+        // search for the unqualified name in the current scope or its parent scopes
+        var scope=this
+        while(true) {
+            val node = scope.children[name]
+            if(node!=null)
+                return node
+            if(scope.type== StNodeType.GLOBAL)
+                return null
+            else
+                scope = scope.parent
+        }
+    }
+
+    fun printIndented(indent: Int) {
+        print("    ".repeat(indent))
+        when(type) {
+            StNodeType.GLOBAL -> print("SYMBOL-TABLE:")
+            StNodeType.BLOCK -> print("(B) ")
+            StNodeType.SUBROUTINE -> print("(S) ")
+            StNodeType.LABEL -> print("(L) ")
+            StNodeType.STATICVAR -> print("(V) ")
+            StNodeType.MEMVAR -> print("(M) ")
+            StNodeType.MEMORYSLAB -> print("(MS) ")
+            StNodeType.CONSTANT -> print("(C) ")
+            StNodeType.BUILTINFUNC -> print("(F) ")
+            StNodeType.ROMSUB -> print("(R) ")
+        }
+        printProperties()
+        println()
+        children.forEach { (_, node) -> node.printIndented(indent+1) }
+    }
+
+    open fun printProperties() {
+        print("$name  ")
+    }
+
+    fun add(child: StNode) {
+        children[child.name] = child
+        child.parent = this
+    }
+}
+
+class StStaticVariable(name: String,
+                       val dt: DataType,
+                       val bss: Boolean,
+                       val onetimeInitializationNumericValue: Double?,      // regular (every-run-time) initialization is done via regular assignments
+                       val onetimeInitializationStringValue: StString?,
+                       val onetimeInitializationArrayValue: StArray?,
+                       val length: Int?,             // for arrays: the number of elements, for strings: number of characters *including* the terminating 0-byte
+                       val zpwish: ZeropageWish,
+                       position: Position) : StNode(name, StNodeType.STATICVAR, position) {
+
+    init {
+        if(bss) {
+            require(onetimeInitializationNumericValue==null)
+            require(onetimeInitializationStringValue==null)
+            require(onetimeInitializationArrayValue.isNullOrEmpty())
+        } else {
+            require(onetimeInitializationNumericValue!=null ||
+                    onetimeInitializationStringValue!=null ||
+                    onetimeInitializationArrayValue!=null)
+        }
+        if(length!=null) {
+            require(onetimeInitializationNumericValue == null)
+            if(onetimeInitializationArrayValue!=null)
+                require(onetimeInitializationArrayValue.isEmpty() ||onetimeInitializationArrayValue.size==length)
+        }
+        if(onetimeInitializationNumericValue!=null)
+            require(dt in NumericDatatypes)
+        if(onetimeInitializationArrayValue!=null)
+            require(dt in ArrayDatatypes)
+        if(onetimeInitializationStringValue!=null) {
+            require(dt == DataType.STR)
+            require(length == onetimeInitializationStringValue.first.length+1)
+        }
+    }
+
+    override fun printProperties() {
+        print("$name  dt=$dt  zpw=$zpwish  bss=$bss")
+    }
+}
+
+
+class StConstant(name: String, val dt: DataType, val value: Double, position: Position) :
+    StNode(name, StNodeType.CONSTANT, position) {
+    override fun printProperties() {
+        print("$name  dt=$dt value=$value")
+    }
+}
+
+
+class StMemVar(name: String,
+               val dt: DataType,
+               val address: UInt,
+               val length: Int?,             // for arrays: the number of elements, for strings: number of characters *including* the terminating 0-byte
+               position: Position) :
+    StNode(name, StNodeType.MEMVAR, position) {
+    override fun printProperties() {
+        print("$name  dt=$dt address=${address.toHex()}")
+    }
+}
+
+class StMemorySlab(
+    name: String,
+    val size: UInt,
+    val align: UInt,
+    position: Position
+):
+    StNode(name, StNodeType.MEMORYSLAB, position) {
+    override fun printProperties() {
+        print("$name  size=$size  align=$align")
+    }
+}
+
+class StSub(name: String, val parameters: List<StSubroutineParameter>, val returnType: DataType?, position: Position) :
+        StNode(name, StNodeType.SUBROUTINE, position) {
+    override fun printProperties() {
+        print(name)
+    }
+}
+
+
+class StRomSub(name: String,
+               val address: UInt,
+               val parameters: List<StRomSubParameter>,
+               val returns: List<RegisterOrStatusflag>,
+               position: Position) :
+    StNode(name, StNodeType.ROMSUB, position) {
+    override fun printProperties() {
+        print("$name  address=${address.toHex()}")
+    }
+}
+
+
+class StSubroutineParameter(val name: String, val type: DataType)
+class StRomSubParameter(val register: RegisterOrStatusflag, val type: DataType)
+class StArrayElement(val number: Double?, val addressOf: List<String>?)
+
+typealias StString = Pair<String, Encoding>
+typealias StArray = List<StArrayElement>

codeCore/src/prog8/code/ast/AstBase.kt

@@ -0,0 +1,149 @@
+package prog8.code.ast
+
+import prog8.code.core.*
+import java.nio.file.Path
+
+// New simplified AST for the code generator.
+
+
+sealed class PtNode(val position: Position) {
+
+    val children = mutableListOf<PtNode>()
+    lateinit var parent: PtNode
+
+    fun printIndented(indent: Int) {
+        print("    ".repeat(indent))
+        print("${this.javaClass.simpleName}  ")
+        printProperties()
+        println()
+        children.forEach { it.printIndented(indent+1) }
+    }
+
+    abstract fun printProperties()
+
+    fun add(child: PtNode) {
+        children.add(child)
+        child.parent = this
+    }
+
+    fun add(index: Int, child: PtNode) {
+        children.add(index, child)
+        child.parent = this
+    }
+
+    fun definingBlock() = findParentNode<PtBlock>(this)
+    fun definingSub() = findParentNode<PtSub>(this)
+    fun definingAsmSub() = findParentNode<PtAsmSub>(this)
+}
+
+
+class PtNodeGroup : PtNode(Position.DUMMY) {
+    override fun printProperties() {}
+}
+
+
+sealed class PtNamedNode(val name: String, position: Position): PtNode(position) {
+    val scopedName: List<String> by lazy {
+        var namedParent: PtNode = this.parent
+        if(namedParent is PtProgram)
+            listOf(name)
+        else {
+            while (namedParent !is PtNamedNode)
+                namedParent = namedParent.parent
+            namedParent.scopedName + name
+        }
+    }
+}
+
+
+class PtProgram(
+    val name: String,
+    val memsizer: IMemSizer,
+    val encoding: IStringEncoding
+) : PtNode(Position.DUMMY) {
+    fun print() = printIndented(0)
+    override fun printProperties() {
+        print("'$name'")
+    }
+
+//    fun allModuleDirectives(): Sequence<PtDirective> =
+//        children.asSequence().flatMap { it.children }.filterIsInstance<PtDirective>().distinct()
+
+    fun allBlocks(): Sequence<PtBlock> =
+        children.asSequence().filterIsInstance<PtBlock>()
+
+    fun entrypoint(): PtSub? =
+        allBlocks().firstOrNull { it.name == "main" }?.children?.firstOrNull { it is PtSub && it.name == "start" } as PtSub?
+}
+
+
+class PtBlock(name: String,
+              val address: UInt?,
+              val library: Boolean,
+              val forceOutput: Boolean,
+              val alignment: BlockAlignment,
+              position: Position
+) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print("$name  addr=$address  library=$library  forceOutput=$forceOutput  alignment=$alignment")
+    }
+
+    enum class BlockAlignment {
+        NONE,
+        WORD,
+        PAGE
+    }
+}
+
+
+class PtInlineAssembly(val assembly: String, val isIR: Boolean, position: Position) : PtNode(position) {
+    override fun printProperties() {}
+
+    init {
+        require(!assembly.startsWith('\n') && !assembly.startsWith('\r')) { "inline assembly should be trimmed" }
+        require(!assembly.endsWith('\n') && !assembly.endsWith('\r')) { "inline assembly should be trimmed" }
+    }
+}
+
+
+class PtLabel(name: String, position: Position) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print(name)
+    }
+}
+
+
+class PtBreakpoint(position: Position): PtNode(position) {
+    override fun printProperties() {}
+}
+
+
+class PtIncludeBinary(val file: Path, val offset: UInt?, val length: UInt?, position: Position) : PtNode(position) {
+    override fun printProperties() {
+        print("filename=$file  offset=$offset  length=$length")
+    }
+}
+
+
+class PtNop(position: Position): PtNode(position) {
+    override fun printProperties() {}
+}
+
+
+class PtScopeVarsDecls(position: Position): PtNode(position) {
+    override fun printProperties() {}
+}
+
+
+
+// find the parent node of a specific type or interface
+// (useful to figure out in what namespace/block something is defined, etc.)
+inline fun <reified T> findParentNode(node: PtNode): T? {
+    var candidate = node.parent
+    while(candidate !is T && candidate !is PtProgram)
+        candidate = candidate.parent
+    return if(candidate is PtProgram)
+        null
+    else
+        candidate as T
+}

codeCore/src/prog8/code/ast/AstExpressions.kt

@@ -0,0 +1,226 @@
+package prog8.code.ast
+
+import prog8.code.core.DataType
+import prog8.code.core.Encoding
+import prog8.code.core.Position
+import java.util.*
+import kotlin.math.round
+
+
+sealed class PtExpression(val type: DataType, position: Position) : PtNode(position) {
+
+    init {
+        if(type==DataType.BOOL)
+            throw IllegalArgumentException("bool should have become ubyte @$position")
+        if(type==DataType.UNDEFINED) {
+            @Suppress("LeakingThis")
+            when(this) {
+                is PtBuiltinFunctionCall -> { /* void function call */ }
+                is PtFunctionCall -> { /* void function call */ }
+                is PtIdentifier -> { /* non-variable identifier */ }
+                else -> throw IllegalArgumentException("type should be known @$position")
+            }
+        }
+    }
+
+    override fun printProperties() {
+        print(type)
+    }
+
+    infix fun isSameAs(other: PtExpression): Boolean {
+        return when(this) {
+            is PtAddressOf -> other is PtAddressOf && other.type==type && other.identifier isSameAs identifier
+            is PtArrayIndexer -> other is PtArrayIndexer && other.type==type && other.variable isSameAs variable && other.index isSameAs index
+            is PtBinaryExpression -> other is PtBinaryExpression && other.left isSameAs left && other.right isSameAs right
+            is PtContainmentCheck -> other is PtContainmentCheck && other.type==type && other.element isSameAs element && other.iterable isSameAs iterable
+            is PtIdentifier -> other is PtIdentifier && other.type==type && other.targetName==targetName
+            is PtMachineRegister -> other is PtMachineRegister && other.type==type && other.register==register
+            is PtMemoryByte -> other is PtMemoryByte && other.address isSameAs address
+            is PtNumber -> other is PtNumber && other.type==type && other.number==number
+            is PtPrefix -> other is PtPrefix && other.type==type && other.operator==operator && other.value isSameAs value
+            is PtRange -> other is PtRange && other.type==type && other.from==from && other.to==to && other.step==step
+            is PtTypeCast -> other is PtTypeCast && other.type==type && other.value isSameAs value
+            else -> false
+        }
+    }
+}
+
+class PtAddressOf(position: Position) : PtExpression(DataType.UWORD, position) {
+    val identifier: PtIdentifier
+        get() = children.single() as PtIdentifier
+}
+
+
+class PtArrayIndexer(type: DataType, position: Position): PtExpression(type, position) {
+    val variable: PtIdentifier
+        get() = children[0] as PtIdentifier
+    val index: PtExpression
+        get() = children[1] as PtExpression
+}
+
+
+class PtArray(type: DataType, position: Position): PtExpression(type, position) {
+    override fun hashCode(): Int = Objects.hash(children, type)
+    override fun equals(other: Any?): Boolean {
+        if(other==null || other !is PtArray)
+            return false
+        return type==other.type && children == other.children
+    }
+}
+
+
+class PtBuiltinFunctionCall(val name: String,
+                            val void: Boolean,
+                            val hasNoSideEffects: Boolean,
+                            type: DataType,
+                            position: Position) : PtExpression(type, position) {
+    init {
+        if(!void)
+            require(type!=DataType.UNDEFINED)
+    }
+
+    val args: List<PtExpression>
+        get() = children.map { it as PtExpression }
+    override fun printProperties() {
+        print("$name void=$void noSideFx=$hasNoSideEffects")
+    }
+}
+
+
+class PtBinaryExpression(val operator: String, type: DataType, position: Position): PtExpression(type, position) {
+    // note: "and", "or", "xor" do not occur anymore as operators. They've been replaced int the ast by their bitwise versions &, |, ^.
+    val left: PtExpression
+        get() = children[0] as PtExpression
+    val right: PtExpression
+        get() = children[1] as PtExpression
+
+    override fun printProperties() {
+        print("$operator -> $type")
+    }
+}
+
+
+class PtContainmentCheck(position: Position): PtExpression(DataType.UBYTE, position) {
+    val element: PtExpression
+        get() = children[0] as PtExpression
+    val iterable: PtIdentifier
+        get() = children[1] as PtIdentifier
+}
+
+
+class PtFunctionCall(val functionName: List<String>,
+                     val void: Boolean,
+                     type: DataType,
+                     position: Position) : PtExpression(type, position) {
+    init {
+        if(!void)
+            require(type!=DataType.UNDEFINED)
+    }
+
+    val args: List<PtExpression>
+        get() = children.map { it as PtExpression }
+    override fun printProperties() {
+        print("${functionName.joinToString(".")} void=$void")
+    }
+}
+
+
+class PtIdentifier(val ref: List<String>, val targetName: List<String>, type: DataType, position: Position) : PtExpression(type, position) {
+    override fun printProperties() {
+        print("$ref --> $targetName  $type")
+    }
+}
+
+
+class PtMemoryByte(position: Position) : PtExpression(DataType.UBYTE, position) {
+    val address: PtExpression
+        get() = children.single() as PtExpression
+    override fun printProperties() {}
+}
+
+
+class PtNumber(type: DataType, val number: Double, position: Position) : PtExpression(type, position) {
+
+    init {
+        if(type==DataType.BOOL)
+            throw IllegalArgumentException("bool should have become ubyte @$position")
+        if(type!=DataType.FLOAT) {
+            val rounded = round(number)
+            if (rounded != number)
+                throw IllegalArgumentException("refused rounding of float to avoid loss of precision @$position")
+        }
+    }
+
+    override fun printProperties() {
+        print("$number ($type)")
+    }
+
+    override fun hashCode(): Int = Objects.hash(type, number)
+
+    override fun equals(other: Any?): Boolean {
+        if(other==null || other !is PtNumber)
+            return false
+        return number==other.number
+    }
+
+    operator fun compareTo(other: PtNumber): Int = number.compareTo(other.number)
+}
+
+
+class PtPrefix(val operator: String, type: DataType, position: Position): PtExpression(type, position) {
+    val value: PtExpression
+        get() = children.single() as PtExpression
+
+    init {
+        // note: the "not" operator may no longer occur in the ast; not x should have been replaced with x==0
+        require(operator in setOf("+", "-", "~")) { "invalid prefix operator: $operator" }
+    }
+
+    override fun printProperties() {
+        print(operator)
+    }
+}
+
+
+class PtRange(type: DataType, position: Position) : PtExpression(type, position) {
+    val from: PtExpression
+        get() = children[0] as PtExpression
+    val to: PtExpression
+        get() = children[1] as PtExpression
+    val step: PtNumber
+        get() = children[2] as PtNumber
+
+    override fun printProperties() {}
+}
+
+
+class PtString(val value: String, val encoding: Encoding, position: Position) : PtExpression(DataType.STR, position) {
+    override fun printProperties() {
+        print("$encoding:\"$value\"")
+    }
+
+    override fun hashCode(): Int = Objects.hash(value, encoding)
+    override fun equals(other: Any?): Boolean {
+        if(other==null || other !is PtString)
+            return false
+        return value==other.value && encoding == other.encoding
+    }
+}
+
+
+class PtTypeCast(type: DataType, position: Position) : PtExpression(type, position) {
+    val value: PtExpression
+        get() = children.single() as PtExpression
+}
+
+
+// special node that isn't created from compiling user code, but used internally
+class PtMachineRegister(val register: Int, type: DataType, position: Position) : PtExpression(type, position) {
+    override fun printProperties() {
+        print("reg=$register  $type")
+    }
+}
+
+
+fun constValue(expr: PtExpression): Double? = if(expr is PtNumber) expr.number else null
+fun constIntValue(expr: PtExpression): Int? = if(expr is PtNumber) expr.number.toInt() else null

codeCore/src/prog8/code/ast/AstStatements.kt

@@ -0,0 +1,228 @@
+package prog8.code.ast
+
+import prog8.code.core.*
+
+
+class PtAsmSub(
+    name: String,
+    val address: UInt?,
+    val clobbers: Set<CpuRegister>,
+    val parameters: List<Pair<PtSubroutineParameter, RegisterOrStatusflag>>,
+    val returnTypes: List<DataType>,    // TODO join with register as Pairs ?
+    val retvalRegisters: List<RegisterOrStatusflag>,
+    val inline: Boolean,
+    position: Position
+) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print("$name  inline=$inline")
+    }
+}
+
+
+class PtSub(
+    name: String,
+    val parameters: List<PtSubroutineParameter>,
+    val returntype: DataType?,
+    val inline: Boolean,
+    position: Position
+) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print(name)
+    }
+
+    init {
+        // params and return value should not be str
+        if(parameters.any{ it.type !in NumericDatatypes })
+            throw AssemblyError("non-numeric parameter")
+        if(returntype!=null && returntype !in NumericDatatypes)
+            throw AssemblyError("non-numeric returntype $returntype")
+    }
+}
+
+
+class PtSubroutineParameter(val name: String, val type: DataType, position: Position): PtNode(position) {
+    override fun printProperties() {
+        print("$type $name")
+    }
+}
+
+
+class PtAssignment(position: Position) : PtNode(position) {
+    val target: PtAssignTarget
+        get() = children[0] as PtAssignTarget
+    val value: PtExpression
+        get() = children[1] as PtExpression
+
+    override fun printProperties() { }
+
+    val isInplaceAssign: Boolean by lazy {
+        val target = target.children.single() as PtExpression
+        when(val source = value) {
+            is PtArrayIndexer -> {
+                if(target is PtArrayIndexer && source.type==target.type) {
+                    if(target.variable isSameAs source.variable) {
+                        target.index isSameAs source.index
+                    }
+                }
+                false
+            }
+            is PtIdentifier -> target is PtIdentifier && target.type==source.type && target.targetName==source.targetName
+            is PtMachineRegister -> target is PtMachineRegister && target.register==source.register
+            is PtMemoryByte -> target is PtMemoryByte && target.address isSameAs source.address
+            is PtNumber -> target is PtNumber && target.type == source.type && target.number==source.number
+            is PtAddressOf -> target is PtAddressOf && target.identifier isSameAs source.identifier
+            is PtPrefix -> {
+                (target is PtPrefix && target.operator==source.operator && target.value isSameAs source.value)
+                        ||
+                (target is PtIdentifier && (source.value as? PtIdentifier)?.targetName==target.targetName)
+            }
+            is PtTypeCast -> target is PtTypeCast && target.type==source.type && target.value isSameAs source.value
+            is PtBinaryExpression ->
+                target isSameAs source.left
+            else -> false
+        }
+    }
+}
+
+class PtAssignTarget(position: Position) : PtNode(position) {
+    val identifier: PtIdentifier?
+        get() = children.single() as? PtIdentifier
+    val array: PtArrayIndexer?
+        get() = children.single() as? PtArrayIndexer
+    val memory: PtMemoryByte?
+        get() = children.single() as? PtMemoryByte
+
+    val type: DataType
+        get() {
+            return when(val tgt = children.single()) {
+                is PtIdentifier -> tgt.type
+                is PtArrayIndexer -> tgt.type
+                is PtMemoryByte -> tgt.type
+                else -> throw AssemblyError("weird target $tgt")
+            }
+        }
+
+    override fun printProperties() {}
+}
+
+
+class PtConditionalBranch(val condition: BranchCondition, position: Position) : PtNode(position) {
+    val trueScope: PtNodeGroup
+        get() = children[0] as PtNodeGroup
+    val falseScope: PtNodeGroup
+        get() = children[1] as PtNodeGroup
+
+    override fun printProperties() {
+        print(condition)
+    }
+}
+
+
+class PtForLoop(position: Position) : PtNode(position) {
+    val variable: PtIdentifier
+        get() = children[0] as PtIdentifier
+    val iterable: PtExpression
+        get() = children[1] as PtExpression
+    val statements: PtNodeGroup
+        get() = children[2] as PtNodeGroup
+
+    override fun printProperties() {}
+}
+
+
+class PtIfElse(position: Position) : PtNode(position) {
+    val condition: PtBinaryExpression
+        get() = children[0] as PtBinaryExpression
+    val ifScope: PtNodeGroup
+        get() = children[1] as PtNodeGroup
+    val elseScope: PtNodeGroup
+        get() = children[2] as PtNodeGroup
+
+    override fun printProperties() {}
+}
+
+
+class PtJump(val identifier: PtIdentifier?,
+             val address: UInt?,
+             val generatedLabel: String?,
+             position: Position) : PtNode(position) {
+    override fun printProperties() {
+        identifier?.printProperties()
+        if(address!=null) print(address.toHex())
+        if(generatedLabel!=null) print(generatedLabel)
+    }
+}
+
+
+class PtPostIncrDecr(val operator: String, position: Position) : PtNode(position) {
+    val target: PtAssignTarget
+        get() = children.single() as PtAssignTarget
+
+    override fun printProperties() {
+        print(operator)
+    }
+}
+
+
+class PtRepeatLoop(position: Position) : PtNode(position) {
+    val count: PtExpression
+        get() = children[0] as PtExpression
+    val statements: PtNodeGroup
+        get() = children[1] as PtNodeGroup
+
+    override fun printProperties() {}
+}
+
+
+class PtReturn(position: Position) : PtNode(position) {
+    val hasValue = children.any()
+    val value: PtExpression?
+        get() {
+            return if(children.any())
+                children.single() as PtExpression
+            else
+                null
+        }
+
+    override fun printProperties() {}
+}
+
+
+class PtVariable(name: String, val type: DataType, var value: PtExpression?, var arraySize: UInt?, position: Position) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print("$type  $name")
+    }
+}
+
+
+class PtConstant(name: String, val type: DataType, val value: Double, position: Position) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print("$type $name = $value")
+    }
+}
+
+
+class PtMemMapped(name: String, val type: DataType, val address: UInt, position: Position) : PtNamedNode(name, position) {
+    override fun printProperties() {
+        print("&$type $name = ${address.toHex()}")
+    }
+}
+
+
+class PtWhen(position: Position) : PtNode(position) {
+    val value: PtExpression
+        get() = children[0] as PtExpression
+    val choices: PtNodeGroup
+        get() = children[1] as PtNodeGroup
+
+    override fun printProperties() {}
+}
+
+
+class PtWhenChoice(val isElse: Boolean, position: Position) : PtNode(position) {
+    val values: PtNodeGroup
+        get() = children[0] as PtNodeGroup
+    val statements: PtNodeGroup
+        get() = children[1] as PtNodeGroup
+    override fun printProperties() {}
+}

codeCore/src/prog8/code/core/CompilationOptions.kt

@@ -0,0 +1,27 @@
+package prog8.code.core
+
+import java.nio.file.Path
+import kotlin.io.path.Path
+
+
+class CompilationOptions(val output: OutputType,
+                         val launcher: CbmPrgLauncherType,
+                         val zeropage: ZeropageType,
+                         val zpReserved: List<UIntRange>,
+                         val floats: Boolean,
+                         val noSysInit: Boolean,
+                         val compTarget: ICompilationTarget,
+                         // these are set later, based on command line arguments or options in the source code:
+                         var loadAddress: UInt,
+                         var slowCodegenWarnings: Boolean = false,
+                         var optimize: Boolean = false,
+                         var optimizeFloatExpressions: Boolean = false,
+                         var dontReinitGlobals: Boolean = false,
+                         var asmQuiet: Boolean = false,
+                         var asmListfile: Boolean = false,
+                         var experimentalCodegen: Boolean = false,
+                         var keepIR: Boolean = false,
+                         var evalStackBaseAddress: UInt? = null,
+                         var outputDir: Path = Path(""),
+                         var symbolDefs: Map<String, String> = emptyMap()
+)

codeCore/src/prog8/code/core/Conversions.kt

@@ -0,0 +1,89 @@
+package prog8.code.core
+
+import kotlin.math.abs
+
+fun Number.toHex(): String {
+    //  0..15 -> "0".."15"
+    //  16..255 -> "$10".."$ff"
+    //  256..65536 -> "$0100".."$ffff"
+    // negative values are prefixed with '-'.
+    val integer = this.toInt()
+    if(integer<0)
+        return '-' + abs(integer).toHex()
+    return when (integer) {
+        in 0 until 16 -> integer.toString()
+        in 0 until 0x100 -> "$"+integer.toString(16).padStart(2,'0')
+        in 0 until 0x10000 -> "$"+integer.toString(16).padStart(4,'0')
+        else -> throw IllegalArgumentException("number too large for 16 bits $this")
+    }
+}
+
+fun UInt.toHex(): String {
+    //  0..15 -> "0".."15"
+    //  16..255 -> "$10".."$ff"
+    //  256..65536 -> "$0100".."$ffff"
+    return when (this) {
+        in 0u until 16u -> this.toString()
+        in 0u until 0x100u -> "$"+this.toString(16).padStart(2,'0')
+        in 0u until 0x10000u -> "$"+this.toString(16).padStart(4,'0')
+        else -> throw IllegalArgumentException("number too large for 16 bits $this")
+    }
+}
+
+fun Char.escape(): Char = this.toString().escape()[0]
+
+fun String.escape(): String {
+    val es = this.map {
+        when(it) {
+            '\t' -> "\\t"
+            '\n' -> "\\n"
+            '\r' -> "\\r"
+            '"' -> "\\\""
+            in '\u8000'..'\u80ff' -> "\\x" + (it.code - 0x8000).toString(16).padStart(2, '0')       // 'ugly' passthrough hack
+            in '\u0000'..'\u00ff' -> it.toString()
+            else -> "\\u" + it.code.toString(16).padStart(4, '0')
+        }
+    }
+    return es.joinToString("")
+}
+
+fun String.unescape(): String {
+    val result = mutableListOf<Char>()
+    val iter = this.iterator()
+    while(iter.hasNext()) {
+        val c = iter.nextChar()
+        if(c=='\\') {
+            val ec = iter.nextChar()
+            result.add(when(ec) {
+                '\\' -> '\\'
+                'n' -> '\n'
+                'r' -> '\r'
+                '"' -> '"'
+                '\'' -> '\''
+                'u' -> {
+                    try {
+                        "${iter.nextChar()}${iter.nextChar()}${iter.nextChar()}${iter.nextChar()}".toInt(16).toChar()
+                    } catch (sb: StringIndexOutOfBoundsException) {
+                        throw IllegalArgumentException("invalid \\u escape sequence")
+                    } catch (nf: NumberFormatException) {
+                        throw IllegalArgumentException("invalid \\u escape sequence")
+                    }
+                }
+                'x' -> {
+                    try {
+                        val hex = ("" + iter.nextChar() + iter.nextChar()).toInt(16)
+                        (0x8000 + hex).toChar()         // 'ugly' pass-through hack
+                    } catch (sb: StringIndexOutOfBoundsException) {
+                        throw IllegalArgumentException("invalid \\x escape sequence")
+                    } catch (nf: NumberFormatException) {
+                        throw IllegalArgumentException("invalid \\x escape sequence")
+                    }
+                }
+                else -> throw IllegalArgumentException("invalid escape char in string: \\$ec")
+            })
+        } else {
+            result.add(c)
+        }
+    }
+    return result.joinToString("")
+}

codeCore/src/prog8/code/core/Enumerations.kt

@@ -0,0 +1,182 @@
+package prog8.code.core
+
+enum class DataType {
+    UBYTE,              // pass by value
+    BYTE,               // pass by value
+    UWORD,              // pass by value
+    WORD,               // pass by value
+    FLOAT,              // pass by value
+    BOOL,               // pass by value
+    STR,                // pass by reference
+    ARRAY_UB,           // pass by reference
+    ARRAY_B,            // pass by reference
+    ARRAY_UW,           // pass by reference
+    ARRAY_W,            // pass by reference
+    ARRAY_F,            // pass by reference
+    ARRAY_BOOL,         // pass by reference
+    UNDEFINED;
+
+    /**
+     * is the type assignable to the given other type (perhaps via a typecast) without loss of precision?
+     */
+    infix fun isAssignableTo(targetType: DataType) =
+        when(this) {
+            BOOL -> targetType.oneOf(BOOL, BYTE, UBYTE, WORD, UWORD, FLOAT)
+            UBYTE -> targetType.oneOf(UBYTE, WORD, UWORD, FLOAT, BOOL)
+            BYTE -> targetType.oneOf(BYTE, WORD, FLOAT)
+            UWORD -> targetType.oneOf(UWORD, FLOAT)
+            WORD -> targetType.oneOf(WORD, FLOAT)
+            FLOAT -> targetType.oneOf(FLOAT)
+            STR -> targetType.oneOf(STR, UWORD)
+            in ArrayDatatypes -> targetType == this
+            else -> false
+        }
+
+    fun oneOf(vararg types: DataType) = this in types
+
+    infix fun largerThan(other: DataType) =
+        when {
+            this == other -> false
+            this in ByteDatatypes -> false
+            this in WordDatatypes -> other in ByteDatatypes
+            this== STR && other== UWORD || this== UWORD && other== STR -> false
+            else -> true
+        }
+
+    infix fun equalsSize(other: DataType) =
+        when {
+            this == other -> true
+            this in ByteDatatypes -> other in ByteDatatypes
+            this in WordDatatypes -> other in WordDatatypes
+            this== STR && other== UWORD || this== UWORD && other== STR -> true
+            else -> false
+        }
+}
+
+enum class CpuRegister {
+    A,
+    X,
+    Y
+}
+
+enum class RegisterOrPair {
+    A,
+    X,
+    Y,
+    AX,
+    AY,
+    XY,
+    FAC1,
+    FAC2,
+    // cx16 virtual registers:
+    R0, R1, R2, R3, R4, R5, R6, R7,
+    R8, R9, R10, R11, R12, R13, R14, R15;
+
+    companion object {
+        val names by lazy { values().map { it.toString()} }
+    }
+
+    fun asCpuRegister(): CpuRegister = when(this) {
+        A -> CpuRegister.A
+        X -> CpuRegister.X
+        Y -> CpuRegister.Y
+        else -> throw IllegalArgumentException("no cpu hardware register for $this")
+    }
+
+}       // only used in parameter and return value specs in asm subroutines
+
+enum class Statusflag {
+    Pc,
+    Pz,     // don't use
+    Pv,
+    Pn;     // don't use
+
+    companion object {
+        val names by lazy { values().map { it.toString()} }
+    }
+}
+
+enum class BranchCondition {
+    CS,
+    CC,
+    EQ,     // EQ == Z
+    Z,
+    NE,     // NE == NZ
+    NZ,
+    MI,     // MI == NEG
+    NEG,
+    PL,     // PL == POS
+    POS,
+    VS,
+    VC,
+}
+
+
+val ByteDatatypes = arrayOf(DataType.UBYTE, DataType.BYTE, DataType.BOOL)
+val WordDatatypes = arrayOf(DataType.UWORD, DataType.WORD)
+val IntegerDatatypes = arrayOf(DataType.UBYTE, DataType.BYTE, DataType.UWORD, DataType.WORD, DataType.BOOL)
+val IntegerDatatypesNoBool = arrayOf(DataType.UBYTE, DataType.BYTE, DataType.UWORD, DataType.WORD)
+val NumericDatatypes = arrayOf(DataType.UBYTE, DataType.BYTE, DataType.UWORD, DataType.WORD, DataType.FLOAT, DataType.BOOL)
+val NumericDatatypesNoBool = arrayOf(DataType.UBYTE, DataType.BYTE, DataType.UWORD, DataType.WORD, DataType.FLOAT)
+val SignedDatatypes =  arrayOf(DataType.BYTE, DataType.WORD, DataType.FLOAT)
+val ArrayDatatypes = arrayOf(DataType.ARRAY_UB, DataType.ARRAY_B, DataType.ARRAY_UW, DataType.ARRAY_W, DataType.ARRAY_F, DataType.ARRAY_BOOL)
+val StringlyDatatypes = arrayOf(DataType.STR, DataType.ARRAY_UB, DataType.ARRAY_B, DataType.UWORD)
+val IterableDatatypes = arrayOf(
+    DataType.STR,
+    DataType.ARRAY_UB, DataType.ARRAY_B,
+    DataType.ARRAY_UW, DataType.ARRAY_W,
+    DataType.ARRAY_F, DataType.ARRAY_BOOL
+)
+val PassByValueDatatypes = NumericDatatypes
+val PassByReferenceDatatypes = IterableDatatypes
+val ArrayToElementTypes = mapOf(
+    DataType.STR to DataType.UBYTE,
+    DataType.ARRAY_B to DataType.BYTE,
+    DataType.ARRAY_UB to DataType.UBYTE,
+    DataType.ARRAY_W to DataType.WORD,
+    DataType.ARRAY_UW to DataType.UWORD,
+    DataType.ARRAY_F to DataType.FLOAT,
+    DataType.ARRAY_BOOL to DataType.BOOL
+)
+val ElementToArrayTypes = mapOf(
+    DataType.BYTE to DataType.ARRAY_B,
+    DataType.UBYTE to DataType.ARRAY_UB,
+    DataType.WORD to DataType.ARRAY_W,
+    DataType.UWORD to DataType.ARRAY_UW,
+    DataType.FLOAT to DataType.ARRAY_F,
+    DataType.BOOL to DataType.ARRAY_BOOL
+)
+val Cx16VirtualRegisters = arrayOf(
+    RegisterOrPair.R0, RegisterOrPair.R1, RegisterOrPair.R2, RegisterOrPair.R3,
+    RegisterOrPair.R4, RegisterOrPair.R5, RegisterOrPair.R6, RegisterOrPair.R7,
+    RegisterOrPair.R8, RegisterOrPair.R9, RegisterOrPair.R10, RegisterOrPair.R11,
+    RegisterOrPair.R12, RegisterOrPair.R13, RegisterOrPair.R14, RegisterOrPair.R15
+)
+
+
+
+enum class OutputType {
+    RAW,
+    PRG,
+    XEX
+}
+
+enum class CbmPrgLauncherType {
+    BASIC,
+    NONE
+}
+
+enum class ZeropageType {
+    BASICSAFE,
+    FLOATSAFE,
+    KERNALSAFE,
+    FULL,
+    DONTUSE
+}
+
+enum class ZeropageWish {
+    REQUIRE_ZEROPAGE,
+    PREFER_ZEROPAGE,
+    DONTCARE,
+    NOT_IN_ZEROPAGE
+}

codeCore/src/prog8/code/core/Exceptions.kt

@@ -0,0 +1,7 @@
+package prog8.code.core
+
+class InternalCompilerException(message: String?) : Exception(message)
+
+class AssemblyError(msg: String) : RuntimeException(msg)
+
+class ErrorsReportedException(message: String?) : Exception(message)

codeCore/src/prog8/code/core/IAssemblyGenerator.kt

@@ -0,0 +1,12 @@
+package prog8.code.core
+
+interface IAssemblyGenerator {
+    fun compileToAssembly(): IAssemblyProgram?
+}
+
+interface IAssemblyProgram {
+    val name: String
+    fun assemble(options: CompilationOptions): Boolean
+}
+
+fun viceMonListName(baseFilename: String) = "$baseFilename.vice-mon-list"

codeCore/src/prog8/code/core/ICompilationTarget.kt

@@ -0,0 +1,11 @@
+package prog8.code.core
+
+interface ICompilationTarget: IStringEncoding, IMemSizer {
+    val name: String
+    val machine: IMachineDefinition
+    val supportedEncodings: Set<Encoding>
+    val defaultEncoding: Encoding
+
+    override fun encodeString(str: String, encoding: Encoding): List<UByte>
+    override fun decodeString(bytes: List<UByte>, encoding: Encoding): String
+}

codeCore/src/prog8/code/core/IErrorReporter.kt

@@ -1,7 +1,4 @@
-package prog8.compilerinterface
-
-import prog8.ast.base.Position
-
+package prog8.code.core
 
 interface IErrorReporter {
     fun err(msg: String, position: Position)
@@ -10,7 +7,6 @@ interface IErrorReporter {
     fun report()
     fun finalizeNumErrors(numErrors: Int, numWarnings: Int) {
         if(numErrors>0)
-            throw AbortCompilation("There are $numErrors errors and $numWarnings warnings.")
+            throw ErrorsReportedException("There are $numErrors errors and $numWarnings warnings.")
     }
 }
-

codeCore/src/prog8/code/core/IMachineDefinition.kt

@@ -1,38 +1,35 @@
-package prog8.compilerinterface
+package prog8.code.core
 
-import prog8.ast.base.DataType
 import java.nio.file.Path
 
 
-interface IMachineFloat {
-    fun toDouble(): Double
-    fun makeFloatFillAsm(): String
-}
-
 enum class CpuType {
     CPU6502,
-    CPU65c02
+    CPU65c02,
+    VIRTUAL
 }
 
 interface IMachineDefinition {
     val FLOAT_MAX_NEGATIVE: Double
     val FLOAT_MAX_POSITIVE: Double
     val FLOAT_MEM_SIZE: Int
-    val POINTER_MEM_SIZE: Int
-    val ESTACK_LO: UInt
-    val ESTACK_HI: UInt
-    val BASIC_LOAD_ADDRESS : UInt
-    val RAW_LOAD_ADDRESS : UInt
+    var ESTACK_LO: UInt
+    var ESTACK_HI: UInt
+    val PROGRAM_LOAD_ADDRESS : UInt
 
     val opcodeNames: Set<String>
     var zeropage: Zeropage
     val cpu: CpuType
 
     fun initializeZeropage(compilerOptions: CompilationOptions)
-    fun getFloat(num: Number): IMachineFloat
+    fun getFloatAsmBytes(num: Number): String
 
     fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String>
     fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path)
     fun isIOAddress(address: UInt): Boolean
-    fun getPreallocatedZeropageVars(): Map<String, Pair<UInt, DataType>>
+    fun overrideEvalStack(evalStackBaseAddress: UInt) {
+        require(evalStackBaseAddress and 255u == 0u)
+        ESTACK_LO = evalStackBaseAddress
+        ESTACK_HI = evalStackBaseAddress + 256u
+    }
 }

codeCore/src/prog8/code/core/IMemSizer.kt

@@ -0,0 +1,6 @@
+package prog8.code.core
+
+interface IMemSizer {
+    fun memorySize(dt: DataType): Int
+    fun memorySize(arrayDt: DataType, numElements: Int): Int
+}

codeCore/src/prog8/code/core/IStringEncoding.kt

@@ -0,0 +1,14 @@
+package prog8.code.core
+
+enum class Encoding(val prefix: String) {
+    DEFAULT("default"),         // depends on compilation target
+    PETSCII("petscii"),         // c64/c128/cx16
+    SCREENCODES("sc"),          // c64/c128/cx16
+    ATASCII("atascii"),         // atari
+    ISO("iso")                  // cx16
+}
+
+interface IStringEncoding {
+    fun encodeString(str: String, encoding: Encoding): List<UByte>
+    fun decodeString(bytes: List<UByte>, encoding: Encoding): String
+}

codeCore/src/prog8/code/core/Operators.kt

@@ -0,0 +1,19 @@
+package prog8.code.core
+
+val AssociativeOperators = setOf("+", "*", "&", "|", "^", "==", "!=")
+val ComparisonOperators = setOf("==", "!=", "<", ">", "<=", ">=")
+val LogicalOperators = setOf("and", "or", "xor", "not")
+val AugmentAssignmentOperators = setOf("+", "-", "/", "*", "&", "|", "^", "<<", ">>", "%", "and", "or", "xor")
+val BitwiseOperators = setOf("&", "|", "^", "~")
+// val InvalidOperatorsForBoolean = setOf("+", "-", "*", "/", "%", "<<", ">>") + BitwiseOperators
+
+fun invertedComparisonOperator(operator: String) =
+    when (operator) {
+        "==" -> "!="
+        "!=" -> "=="
+        "<" -> ">="
+        ">" -> "<="
+        "<=" -> ">"
+        ">=" -> "<"
+        else -> null
+    }

codeCore/src/prog8/code/core/Position.kt

@@ -0,0 +1,22 @@
+package prog8.code.core
+
+import java.nio.file.InvalidPathException
+import kotlin.io.path.Path
+import kotlin.io.path.absolute
+
+data class Position(val file: String, val line: Int, val startCol: Int, val endCol: Int) {
+    override fun toString(): String = "[$file: line $line col ${startCol+1}-${endCol+1}]"
+    fun toClickableStr(): String {
+        return try {
+            val path = Path(file).absolute().normalize().toString()
+            "file://$path:$line:$startCol:"
+        } catch(x: InvalidPathException) {
+            // this can occur on Windows when the source origin contains "invalid" characters such as ':'
+            "file://$file:$line:$startCol:"
+        }
+    }
+
+    companion object {
+        val DUMMY = Position("~dummy~", 0, 0, 0)
+    }
+}

codeCore/src/prog8/code/core/RegisterOrStatusflag.kt

@@ -0,0 +1,3 @@
+package prog8.code.core
+
+data class RegisterOrStatusflag(val registerOrPair: RegisterOrPair?, val statusflag: Statusflag?)

codeCore/src/prog8/code/core/SourceCode.kt

@@ -1,26 +1,20 @@
-package prog8.parser
+package prog8.code.core
 
-import org.antlr.v4.runtime.CharStream
-import org.antlr.v4.runtime.CharStreams
 import java.io.File
 import java.io.IOException
-import java.nio.channels.Channels
-import java.nio.charset.CodingErrorAction
 import java.nio.file.Path
-import kotlin.io.path.*
+import kotlin.io.path.Path
+import kotlin.io.path.readText
+
+
+const val internedStringsModuleName = "prog8_interned_strings"
+
 
 /**
- * Encapsulates - and ties together - actual source code (=text)
- * and its [origin].
+ * Encapsulates - and ties together - actual source code (=text) and its [origin].
  */
 sealed class SourceCode {
 
-    /**
-     * To be used *only* by the parser (as input to a TokenStream).
-     * DO NOT mess around with!
-     */
-    internal abstract fun getCharStream(): CharStream
-
     /**
      * Whether this [SourceCode] instance was created as a [Resource]
      */
@@ -31,11 +25,16 @@ sealed class SourceCode {
      */
     abstract val isFromFilesystem: Boolean
 
+    /**
+     * The logical name of the source code unit. Usually the module's name.
+     */
+    abstract val name: String
+
     /**
      * Where this [SourceCode] instance came from.
      * This can be one of the following:
      * * a normal string representation of a [java.nio.file.Path], if it originates from a file (see [File])
-     * * `$stringSourcePrefix44c56085>` if was created via [String]
+     * * `string:44c56085` if was created via [String]
      * * `library:/x/y/z.ext` if it is a library file that was loaded from resources (see [Resource])
      */
     abstract val origin: String
@@ -43,11 +42,10 @@ sealed class SourceCode {
     /**
      * The source code as plain string.
      */
-    abstract fun readText(): String
+    abstract val text: String
 
     /**
-     * Deliberately does NOT return the actual text.
-     * For this - if at all - use [getCharStream].
+     * Printable representation, deliberately does NOT return the actual text.
      */
     final override fun toString() = "${this.javaClass.name}[${this.origin}]"
 
@@ -57,7 +55,7 @@ sealed class SourceCode {
          * filename prefix to designate library files that will be retreived from internal resources rather than disk
          */
         const val libraryFilePrefix = "library:"
-        const val stringSourcePrefix = "<String@"
+        const val stringSourcePrefix = "string:"
         val curdir: Path = Path(".").toAbsolutePath()
         fun relative(path: Path): Path = curdir.relativize(path.toAbsolutePath())
         fun isRegularFilesystemPath(pathString: String) =
@@ -66,52 +64,55 @@ sealed class SourceCode {
 
     /**
      * Turn a plain String into a [SourceCode] object.
-     * [origin] will be something like `$stringSourcePrefix44c56085>`.
+     * [origin] will be something like `string:44c56085`.
      */
-    class Text(val text: String): SourceCode() {
+    class Text(override val text: String): SourceCode() {
         override val isFromResources = false
         override val isFromFilesystem = false
-        override val origin = "$stringSourcePrefix${System.identityHashCode(text).toString(16)}>"
-        public override fun getCharStream(): CharStream = CharStreams.fromString(text, origin)
-        override fun readText() = text
+        override val origin = "$stringSourcePrefix${System.identityHashCode(text).toString(16)}"
+        override val name = "<unnamed-text>"
     }
 
     /**
      * Get [SourceCode] from the file represented by the specified Path.
-     * This does not actually *access* the file, but it does check
-     * whether it
-     * * exists
-     * * is a regular file (ie: not a directory)
-     * * and is actually readable
+     * This immediately reads the file fully into memory.
      *
      * [origin] will be the given path in absolute and normalized form.
      * @throws NoSuchFileException if the file does not exist
-     * @throws AccessDeniedException if the given path points to a directory or the file is non-readable for some other reason
+     * @throws FileSystemException if the file cannot be read
      */
     class File(path: Path): SourceCode() {
-        private val normalized = path.normalize()
-        init {
-            val file = normalized.toFile()
-            if (!path.exists())
-                throw NoSuchFileException(file)
-            if (path.isDirectory())
-                throw AccessDeniedException(file, reason = "Not a file but a directory")
-            if (!path.isReadable())
-                throw AccessDeniedException(file, reason = "Is not readable")
-        }
-
+        override val text: String
+        override val origin: String
+        override val name: String
         override val isFromResources = false
         override val isFromFilesystem = true
-        override val origin = relative(normalized).toString()
-        override fun getCharStream(): CharStream = CharStreams.fromPath(normalized)
-        override fun readText() = normalized.readText()
+
+        init {
+            val normalized = path.normalize()
+            origin = relative(normalized).toString()
+            try {
+                text = normalized.readText()
+                name = normalized.toFile().nameWithoutExtension
+            } catch (nfx: java.nio.file.NoSuchFileException) {
+                throw NoSuchFileException(normalized.toFile()).also { it.initCause(nfx) }
+            } catch (iox: IOException) {
+                throw FileSystemException(normalized.toFile()).also { it.initCause(iox) }
+            }
+        }
     }
 
     /**
      * [origin]: `library:/x/y/z.p8` for a given `pathString` of "x/y/z.p8"
      */
     class Resource(pathString: String): SourceCode() {
-        private val normalized = "/" + Path.of(pathString).normalize().toMutableList().joinToString("/")
+        private val normalized = "/" + Path(pathString).normalize().toMutableList().joinToString("/")
+
+        override val isFromResources = true
+        override val isFromFilesystem = false
+        override val origin = "$libraryFilePrefix$normalized"
+        override val text: String
+        override val name: String
 
         init {
             val rscURL = object {}.javaClass.getResource(normalized)
@@ -122,32 +123,19 @@ sealed class SourceCode {
                     reason = "looked in resources rooted at $rscRoot"
                 )
             }
-        }
-
-        override val isFromResources = true
-        override val isFromFilesystem = false
-        override val origin = "$libraryFilePrefix$normalized"
-        public override fun getCharStream(): CharStream {
-            val inpStr = object {}.javaClass.getResourceAsStream(normalized)!!
-            // CharStreams.fromStream() doesn't allow us to set the stream name properly, so we use a lower level api
-            val channel = Channels.newChannel(inpStr)
-            return CharStreams.fromChannel(channel, Charsets.UTF_8, 4096, CodingErrorAction.REPLACE, origin, -1)
-        }
-
-        override fun readText(): String {
             val stream = object {}.javaClass.getResourceAsStream(normalized)
-            return stream!!.bufferedReader().use { r -> r.readText() }
+            text = stream!!.reader().use { it.readText() }
+            name = Path(pathString).toFile().nameWithoutExtension
         }
     }
 
     /**
      * SourceCode for internally generated nodes (usually Modules)
      */
-    class Generated(name: String) : SourceCode() {
-        override fun getCharStream(): CharStream = throw IOException("generated code nodes doesn't have a stream to read")
+    class Generated(override val name: String) : SourceCode() {
         override val isFromResources: Boolean = false
         override val isFromFilesystem: Boolean = false
         override val origin: String = name
-        override fun readText() = throw IOException("generated code nodes don't have a text representation")
+        override val text: String = "<generated code node, no text representation>"
     }
 }

codeCore/src/prog8/code/core/Zeropage.kt

@@ -0,0 +1,122 @@
+package prog8.code.core
+
+import com.github.michaelbull.result.Err
+import com.github.michaelbull.result.Ok
+import com.github.michaelbull.result.Result
+
+
+class ZeropageAllocationError(message: String) : Exception(message)
+
+
+abstract class Zeropage(protected val options: CompilationOptions) {
+
+    abstract val SCRATCH_B1 : UInt      // temp storage for a single byte
+    abstract val SCRATCH_REG : UInt     // temp storage for a register, must be B1+1
+    abstract val SCRATCH_W1 : UInt      // temp storage 1 for a word  $fb+$fc
+    abstract val SCRATCH_W2 : UInt      // temp storage 2 for a word  $fb+$fc
+
+    data class ZpAllocation(val address: UInt, val dt: DataType, val size: Int)
+
+    // the variables allocated into Zeropage.
+    // name (scoped) ==> pair of address to (Datatype + bytesize)
+    val allocatedVariables = mutableMapOf<List<String>, ZpAllocation>()
+
+    val free = mutableListOf<UInt>()     // subclasses must set this to the appropriate free locations.
+
+    fun removeReservedFromFreePool() {
+        synchronized(this) {
+            for (reserved in options.zpReserved)
+                reserve(reserved)
+
+            free.removeAll(setOf(SCRATCH_B1, SCRATCH_REG, SCRATCH_W1, SCRATCH_W1 + 1u, SCRATCH_W2, SCRATCH_W2 + 1u))
+        }
+    }
+
+    fun availableBytes() = if(options.zeropage== ZeropageType.DONTUSE) 0 else free.size
+    fun hasByteAvailable() = if(options.zeropage== ZeropageType.DONTUSE) false else free.isNotEmpty()
+    fun hasWordAvailable(): Boolean {
+        if(options.zeropage== ZeropageType.DONTUSE)
+            return false
+
+        return free.windowed(2).any { it[0] == it[1] - 1u }
+    }
+
+    fun allocate(name: List<String>,
+                 datatype: DataType,
+                 numElements: Int?,
+                 position: Position?,
+                 errors: IErrorReporter
+    ): Result<Pair<UInt, Int>, ZeropageAllocationError> {
+
+        require(name.isEmpty() || name !in allocatedVariables) {"name can't be allocated twice"}
+
+        if(options.zeropage== ZeropageType.DONTUSE)
+            return Err(ZeropageAllocationError("zero page usage has been disabled"))
+
+        val size: Int =
+                when (datatype) {
+                    in IntegerDatatypes -> options.compTarget.memorySize(datatype)
+                    DataType.STR, in ArrayDatatypes  -> {
+                        val memsize = options.compTarget.memorySize(datatype, numElements!!)
+                        if(position!=null)
+                            errors.warn("allocating a large value in zeropage; str/array $memsize bytes", position)
+                        else
+                            errors.warn("$name: allocating a large value in zeropage; str/array $memsize bytes", Position.DUMMY)
+                        memsize
+                    }
+                    DataType.FLOAT -> {
+                        if (options.floats) {
+                            val memsize = options.compTarget.memorySize(DataType.FLOAT)
+                            if(position!=null)
+                                errors.warn("allocating a large value in zeropage; float $memsize bytes", position)
+                            else
+                                errors.warn("$name: allocating a large value in zeropage; float $memsize bytes", Position.DUMMY)
+                            memsize
+                        } else return Err(ZeropageAllocationError("floating point option not enabled"))
+                    }
+                    else -> return Err(ZeropageAllocationError("cannot put datatype $datatype in zeropage"))
+                }
+
+        synchronized(this) {
+            if(free.size > 0) {
+                if(size==1) {
+                    for(candidate in free.minOrNull()!! .. free.maxOrNull()!!+1u) {
+                        if(oneSeparateByteFree(candidate))
+                            return Ok(Pair(makeAllocation(candidate, 1, datatype, name), 1))
+                    }
+                    return Ok(Pair(makeAllocation(free[0], 1, datatype, name), 1))
+                }
+                for(candidate in free.minOrNull()!! .. free.maxOrNull()!!+1u) {
+                    if (sequentialFree(candidate, size))
+                        return Ok(Pair(makeAllocation(candidate, size, datatype, name), size))
+                }
+            }
+        }
+
+        return Err(ZeropageAllocationError("no more free space in ZP to allocate $size sequential bytes"))
+    }
+
+    private fun reserve(range: UIntRange) = free.removeAll(range)
+
+    private fun makeAllocation(address: UInt, size: Int, datatype: DataType, name: List<String>): UInt {
+        require(size>=0)
+        free.removeAll(address until address+size.toUInt())
+        if(name.isNotEmpty()) {
+            allocatedVariables[name] = when(datatype) {
+                in NumericDatatypes -> ZpAllocation(address, datatype, size)        // numerical variables in zeropage never have an initial value here because they are set in separate initializer assignments
+                DataType.STR -> ZpAllocation(address, datatype, size)
+                in ArrayDatatypes -> ZpAllocation(address, datatype, size)
+                else -> throw AssemblyError("invalid dt")
+            }
+        }
+        return address
+    }
+
+    private fun oneSeparateByteFree(address: UInt) = address in free && address-1u !in free && address+1u !in free
+    private fun sequentialFree(address: UInt, size: Int): Boolean {
+        require(size>0)
+        return free.containsAll((address until address+size.toUInt()).toList())
+    }
+
+    abstract fun allocateCx16VirtualRegisters()
+}

codeCore/src/prog8/code/target/AtariTarget.kt

@@ -0,0 +1,28 @@
+package prog8.code.target
+
+import prog8.code.core.*
+import prog8.code.target.atari.AtariMachineDefinition
+
+
+class AtariTarget: ICompilationTarget, IStringEncoding by Encoder, IMemSizer {
+    override val name = NAME
+    override val machine = AtariMachineDefinition()
+    override val supportedEncodings = setOf(Encoding.ATASCII)
+    override val defaultEncoding = Encoding.ATASCII
+
+    companion object {
+        const val NAME = "atari"
+    }
+
+    override fun memorySize(dt: DataType): Int {
+        return when(dt) {
+            in ByteDatatypes -> 1
+            in WordDatatypes, in PassByReferenceDatatypes -> 2
+            DataType.FLOAT -> machine.FLOAT_MEM_SIZE
+            else -> Int.MIN_VALUE
+        }
+    }
+
+    override fun memorySize(arrayDt: DataType, numElements: Int) =
+        memorySize(ArrayToElementTypes.getValue(arrayDt)) * numElements
+}

codeCore/src/prog8/code/target/C128Target.kt

@@ -0,0 +1,20 @@
+package prog8.code.target
+
+import prog8.code.core.Encoding
+import prog8.code.core.ICompilationTarget
+import prog8.code.core.IMemSizer
+import prog8.code.core.IStringEncoding
+import prog8.code.target.c128.C128MachineDefinition
+import prog8.code.target.cbm.CbmMemorySizer
+
+
+class C128Target: ICompilationTarget, IStringEncoding by Encoder, IMemSizer by CbmMemorySizer {
+    override val name = NAME
+    override val machine = C128MachineDefinition()
+    override val supportedEncodings = setOf(Encoding.PETSCII, Encoding.SCREENCODES)
+    override val defaultEncoding = Encoding.PETSCII
+
+    companion object {
+        const val NAME = "c128"
+    }
+}

codeCore/src/prog8/code/target/C64Target.kt

@@ -0,0 +1,20 @@
+package prog8.code.target
+
+import prog8.code.core.Encoding
+import prog8.code.core.ICompilationTarget
+import prog8.code.core.IMemSizer
+import prog8.code.core.IStringEncoding
+import prog8.code.target.c64.C64MachineDefinition
+import prog8.code.target.cbm.CbmMemorySizer
+
+
+class C64Target: ICompilationTarget, IStringEncoding by Encoder, IMemSizer by CbmMemorySizer {
+    override val name = NAME
+    override val machine = C64MachineDefinition()
+    override val supportedEncodings = setOf(Encoding.PETSCII, Encoding.SCREENCODES)
+    override val defaultEncoding = Encoding.PETSCII
+
+    companion object {
+        const val NAME = "c64"
+    }
+}

codeCore/src/prog8/code/target/Cx16Target.kt

@@ -0,0 +1,20 @@
+package prog8.code.target
+
+import prog8.code.core.Encoding
+import prog8.code.core.ICompilationTarget
+import prog8.code.core.IMemSizer
+import prog8.code.core.IStringEncoding
+import prog8.code.target.cbm.CbmMemorySizer
+import prog8.code.target.cx16.CX16MachineDefinition
+
+
+class Cx16Target: ICompilationTarget, IStringEncoding by Encoder, IMemSizer by CbmMemorySizer {
+    override val name = NAME
+    override val machine = CX16MachineDefinition()
+    override val supportedEncodings = setOf(Encoding.PETSCII, Encoding.SCREENCODES, Encoding.ISO)
+    override val defaultEncoding = Encoding.PETSCII
+
+    companion object {
+        const val NAME = "cx16"
+    }
+}

codeCore/src/prog8/code/target/Encoder.kt

@@ -0,0 +1,39 @@
+package prog8.code.target
+
+import com.github.michaelbull.result.fold
+import prog8.code.core.Encoding
+import prog8.code.core.IStringEncoding
+import prog8.code.core.InternalCompilerException
+import prog8.code.target.cbm.AtasciiEncoding
+import prog8.code.target.cbm.IsoEncoding
+import prog8.code.target.cbm.PetsciiEncoding
+
+
+object Encoder: IStringEncoding {
+    override fun encodeString(str: String, encoding: Encoding): List<UByte> {
+        val coded = when(encoding) {
+            Encoding.PETSCII -> PetsciiEncoding.encodePetscii(str, true)
+            Encoding.SCREENCODES -> PetsciiEncoding.encodeScreencode(str, true)
+            Encoding.ISO -> IsoEncoding.encode(str)
+            Encoding.ATASCII -> AtasciiEncoding.encode(str)
+            else -> throw InternalCompilerException("unsupported encoding $encoding")
+        }
+        return coded.fold(
+            failure = { throw it },
+            success = { it }
+        )
+    }
+    override fun decodeString(bytes: List<UByte>, encoding: Encoding): String {
+        val decoded = when(encoding) {
+            Encoding.PETSCII -> PetsciiEncoding.decodePetscii(bytes, true)
+            Encoding.SCREENCODES -> PetsciiEncoding.decodeScreencode(bytes, true)
+            Encoding.ISO -> IsoEncoding.decode(bytes)
+            Encoding.ATASCII -> AtasciiEncoding.decode(bytes)
+            else -> throw InternalCompilerException("unsupported encoding $encoding")
+        }
+        return decoded.fold(
+            failure = { throw it },
+            success = { it }
+        )
+    }
+}

codeCore/src/prog8/code/target/VMTarget.kt

@@ -0,0 +1,27 @@
+package prog8.code.target
+
+import prog8.code.core.*
+import prog8.code.target.virtual.VirtualMachineDefinition
+
+class VMTarget: ICompilationTarget, IStringEncoding by Encoder, IMemSizer {
+    override val name = NAME
+    override val machine = VirtualMachineDefinition()
+    override val supportedEncodings = setOf(Encoding.ISO)
+    override val defaultEncoding = Encoding.ISO
+
+    companion object {
+        const val NAME = "virtual"
+    }
+
+    override fun memorySize(dt: DataType): Int {
+        return when(dt) {
+            in ByteDatatypes -> 1
+            in WordDatatypes, in PassByReferenceDatatypes -> 2
+            DataType.FLOAT -> machine.FLOAT_MEM_SIZE
+            else -> Int.MIN_VALUE
+        }
+    }
+
+    override fun memorySize(arrayDt: DataType, numElements: Int) =
+        memorySize(ArrayToElementTypes.getValue(arrayDt)) * numElements
+}

codeCore/src/prog8/code/target/atari/AtariMachineDefinition.kt

@@ -0,0 +1,65 @@
+package prog8.code.target.atari
+
+import prog8.code.core.*
+import prog8.code.target.c64.normal6502instructions
+import java.nio.file.Path
+
+
+class AtariMachineDefinition: IMachineDefinition {
+
+    override val cpu = CpuType.CPU6502
+
+    override val FLOAT_MAX_POSITIVE = 9.999999999e97
+    override val FLOAT_MAX_NEGATIVE = -9.999999999e97
+    override val FLOAT_MEM_SIZE = 6
+    override val PROGRAM_LOAD_ADDRESS = 0x2000u
+
+    // the 2*256 byte evaluation stack (on which bytes, words, and even floats are stored during calculations)
+    override var ESTACK_LO = 0x1a00u     //  $1a00-$1aff inclusive      // TODO
+    override var ESTACK_HI = 0x1b00u     //  $1b00-$1bff inclusive      // TODO
+
+    override lateinit var zeropage: Zeropage
+
+    override fun getFloatAsmBytes(num: Number) = TODO("float asm bytes from number")
+
+    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
+        return if (compilerOptions.output == OutputType.XEX)
+            listOf("syslib")
+        else
+            emptyList()
+    }
+
+    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
+        val emulatorName: String
+        val cmdline: List<String>
+        when(selectedEmulator) {
+            1 -> {
+                emulatorName = "atari800"
+                cmdline = listOf(emulatorName, "-xl", "-xl-rev", "2", "-nobasic", "-run", "${programNameWithPath}.xex")
+            }
+            2 -> {
+                emulatorName = "altirra"
+                cmdline = listOf("Altirra64.exe", "${programNameWithPath.normalize()}.xex")
+            }
+            else -> {
+                System.err.println("Atari target only supports atari800 and altirra emulators.")
+                return
+            }
+        }
+
+        // TODO monlist?
+
+        println("\nStarting Atari800XL emulator $emulatorName...")
+        val processb = ProcessBuilder(cmdline).inheritIO()
+        val process: Process = processb.start()
+        process.waitFor()
+    }
+
+    override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0xd000u..0xdfffu        // TODO
+
+    override fun initializeZeropage(compilerOptions: CompilationOptions) {
+        zeropage = AtariZeropage(compilerOptions)
+    }
+
+    override val opcodeNames = normal6502instructions
+}

codeCore/src/prog8/code/target/atari/AtariZeropage.kt

@@ -0,0 +1,52 @@
+package prog8.code.target.atari
+
+import prog8.code.core.CompilationOptions
+import prog8.code.core.InternalCompilerException
+import prog8.code.core.Zeropage
+import prog8.code.core.ZeropageType
+
+class AtariZeropage(options: CompilationOptions) : Zeropage(options) {
+
+    override val SCRATCH_B1 = 0xcbu      // temp storage for a single byte
+    override val SCRATCH_REG = 0xccu     // temp storage for a register, must be B1+1
+    override val SCRATCH_W1 = 0xcdu      // temp storage 1 for a word  $cd+$ce
+    override val SCRATCH_W2 = 0xcfu      // temp storage 2 for a word  $cf+$d0        TODO is $d0 okay to use?
+
+    init {
+        if (options.floats && options.zeropage !in arrayOf(
+                ZeropageType.FLOATSAFE,
+                ZeropageType.BASICSAFE,
+                ZeropageType.DONTUSE
+            ))
+            throw InternalCompilerException("when floats are enabled, zero page type should be 'floatsafe' or 'basicsafe' or 'dontuse'")
+
+        when (options.zeropage) {
+            ZeropageType.FULL -> {
+                // TODO all atari usable zero page locations, except the ones used by the system's IRQ routine
+                free.addAll(0x00u..0xffu)
+                // TODO atari  free.removeAll(setOf(0xa0u, 0xa1u, 0xa2u, 0x91u, 0xc0u, 0xc5u, 0xcbu, 0xf5u, 0xf6u))        // these are updated by IRQ
+            }
+            ZeropageType.KERNALSAFE -> {
+                free.addAll(0x80u..0xffu)       // TODO
+            }
+            ZeropageType.BASICSAFE,
+            ZeropageType.FLOATSAFE -> {
+                free.addAll(0x80u..0xffu)       // TODO
+                free.removeAll(0xd4u .. 0xefu)      // floating point storage
+            }
+            ZeropageType.DONTUSE -> {
+                free.clear()  // don't use zeropage at all
+            }
+        }
+
+        val distictFree = free.distinct()
+        free.clear()
+        free.addAll(distictFree)
+
+        removeReservedFromFreePool()
+    }
+
+    override fun allocateCx16VirtualRegisters() {
+        TODO("Not known if atari can put the virtual regs in ZP")
+    }
+}

codeCore/src/prog8/code/target/c128/C128MachineDefinition.kt

@@ -0,0 +1,55 @@
+package prog8.code.target.c128
+
+import prog8.code.core.*
+import prog8.code.target.c64.normal6502instructions
+import prog8.code.target.cbm.Mflpt5
+import java.nio.file.Path
+
+
+class C128MachineDefinition: IMachineDefinition {
+
+    override val cpu = CpuType.CPU6502
+
+    override val FLOAT_MAX_POSITIVE = Mflpt5.FLOAT_MAX_POSITIVE
+    override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
+    override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
+    override val PROGRAM_LOAD_ADDRESS = 0x1c01u
+
+    // the 2*256 byte evaluation stack (on which bytes, words, and even floats are stored during calculations)
+    override var ESTACK_LO = 0x1a00u     //  $1a00-$1aff inclusive
+    override var ESTACK_HI = 0x1b00u     //  $1b00-$1bff inclusive
+
+    override lateinit var zeropage: Zeropage
+
+    override fun getFloatAsmBytes(num: Number) = Mflpt5.fromNumber(num).makeFloatFillAsm()
+
+    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
+        return if (compilerOptions.launcher == CbmPrgLauncherType.BASIC || compilerOptions.output == OutputType.PRG)
+            listOf("syslib")
+        else
+            emptyList()
+    }
+
+    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
+        if(selectedEmulator!=1) {
+            System.err.println("The c128 target only supports the main emulator (Vice).")
+            return
+        }
+
+        println("\nStarting C-128 emulator x128...")
+        val viceMonlist = viceMonListName(programNameWithPath.toString())
+        val cmdline = listOf("x128", "-silent", "-moncommands", viceMonlist,
+                "-autostartprgmode", "1", "-autostart-warp", "-autostart", "${programNameWithPath}.prg")
+        val processb = ProcessBuilder(cmdline).inheritIO()
+        val process: Process = processb.start()
+        process.waitFor()
+    }
+
+    override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0xd000u..0xdfffu
+
+    override fun initializeZeropage(compilerOptions: CompilationOptions) {
+        zeropage = C128Zeropage(compilerOptions)
+    }
+
+    override val opcodeNames = normal6502instructions
+}

codeCore/src/prog8/code/target/c128/C128Zeropage.kt

@@ -0,0 +1,51 @@
+package prog8.code.target.c128
+
+import prog8.code.core.CompilationOptions
+import prog8.code.core.InternalCompilerException
+import prog8.code.core.Zeropage
+import prog8.code.core.ZeropageType
+
+
+class C128Zeropage(options: CompilationOptions) : Zeropage(options) {
+
+    override val SCRATCH_B1 = 0x9bu      // temp storage for a single byte
+    override val SCRATCH_REG = 0x9cu     // temp storage for a register, must be B1+1
+    override val SCRATCH_W1 = 0xfbu      // temp storage 1 for a word  $fb+$fc
+    override val SCRATCH_W2 = 0xfdu      // temp storage 2 for a word  $fd+$fe
+
+
+    init {
+        if (options.floats && options.zeropage !in arrayOf(
+                ZeropageType.FLOATSAFE,
+                ZeropageType.BASICSAFE,
+                ZeropageType.DONTUSE
+            ))
+            throw InternalCompilerException("when floats are enabled, zero page type should be 'floatsafe' or 'basicsafe' or 'dontuse'")
+
+        when (options.zeropage) {
+            ZeropageType.FULL -> {
+                // TODO all c128 usable zero page locations, except the ones used by the system's IRQ routine
+                free.addAll(0x0au..0xffu)       // TODO c128 what about $02-$09?
+                // TODO c128  free.removeAll(setOf(0xa0u, 0xa1u, 0xa2u, 0x91u, 0xc0u, 0xc5u, 0xcbu, 0xf5u, 0xf6u))        // these are updated by IRQ
+            }
+            ZeropageType.KERNALSAFE,
+            ZeropageType.FLOATSAFE,
+            ZeropageType.BASICSAFE -> {
+                free.clear()   // TODO c128 usable zero page addresses
+            }
+            ZeropageType.DONTUSE -> {
+                free.clear()  // don't use zeropage at all
+            }
+        }
+
+        val distictFree = free.distinct()
+        free.clear()
+        free.addAll(distictFree)
+
+        removeReservedFromFreePool()
+    }
+
+    override fun allocateCx16VirtualRegisters() {
+        TODO("Not known if C128 can put the virtual regs in ZP")
+    }
+}

codeCore/src/prog8/code/target/c64/C64MachineDefinition.kt

@@ -1,9 +1,7 @@
-package prog8.compiler.target.c64
+package prog8.code.target.c64
 
-import prog8.ast.base.DataType
-import prog8.compiler.target.cbm.Mflpt5
-import prog8.compiler.target.cbm.viceMonListPostfix
-import prog8.compilerinterface.*
+import prog8.code.core.*
+import prog8.code.target.cbm.Mflpt5
 import java.io.IOException
 import java.nio.file.Path
 
@@ -15,20 +13,18 @@ class C64MachineDefinition: IMachineDefinition {
     override val FLOAT_MAX_POSITIVE = Mflpt5.FLOAT_MAX_POSITIVE
     override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
     override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
-    override val POINTER_MEM_SIZE = 2
-    override val BASIC_LOAD_ADDRESS = 0x0801u
-    override val RAW_LOAD_ADDRESS = 0xc000u
+    override val PROGRAM_LOAD_ADDRESS = 0x0801u
 
     // the 2*256 byte evaluation stack (on which bytes, words, and even floats are stored during calculations)
-    override val ESTACK_LO = 0xce00u     //  $ce00-$ceff inclusive
-    override val ESTACK_HI = 0xcf00u     //  $ce00-$ceff inclusive
+    override var ESTACK_LO = 0xce00u     //  $ce00-$ceff inclusive
+    override var ESTACK_HI = 0xcf00u     //  $ce00-$ceff inclusive
 
     override lateinit var zeropage: Zeropage
 
-    override fun getFloat(num: Number) = Mflpt5.fromNumber(num)
+    override fun getFloatAsmBytes(num: Number) = Mflpt5.fromNumber(num).makeFloatFillAsm()
 
     override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
-        return if (compilerOptions.launcher == LauncherType.BASIC || compilerOptions.output == OutputType.PRG)
+        return if (compilerOptions.launcher == CbmPrgLauncherType.BASIC || compilerOptions.output == OutputType.PRG)
             listOf("syslib")
         else
             emptyList()
@@ -42,7 +38,8 @@ class C64MachineDefinition: IMachineDefinition {
 
         for(emulator in listOf("x64sc", "x64")) {
             println("\nStarting C-64 emulator $emulator...")
-            val cmdline = listOf(emulator, "-silent", "-moncommands", "${programNameWithPath}.$viceMonListPostfix",
+            val viceMonlist = viceMonListName(programNameWithPath.toString())
+            val cmdline = listOf(emulator, "-silent", "-moncommands", viceMonlist,
                     "-autostartprgmode", "1", "-autostart-warp", "-autostart", "${programNameWithPath}.prg")
             val processb = ProcessBuilder(cmdline).inheritIO()
             val process: Process
@@ -57,22 +54,23 @@ class C64MachineDefinition: IMachineDefinition {
     }
 
     override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0xd000u..0xdfffu
-    override fun getPreallocatedZeropageVars(): Map<String, Pair<UInt, DataType>> = emptyMap()
 
     override fun initializeZeropage(compilerOptions: CompilationOptions) {
         zeropage = C64Zeropage(compilerOptions)
     }
 
-    // 6502 opcodes (including aliases and illegal opcodes), these cannot be used as variable or label names
-    override val opcodeNames = setOf("adc", "ahx", "alr", "anc", "and", "ane", "arr", "asl", "asr", "axs", "bcc", "bcs",
-            "beq", "bge", "bit", "blt", "bmi", "bne", "bpl", "brk", "bvc", "bvs", "clc",
-            "cld", "cli", "clv", "cmp", "cpx", "cpy", "dcm", "dcp", "dec", "dex", "dey",
-            "eor", "gcc", "gcs", "geq", "gge", "glt", "gmi", "gne", "gpl", "gvc", "gvs",
-            "inc", "ins", "inx", "iny", "isb", "isc", "jam", "jmp", "jsr", "lae", "las",
-            "lax", "lda", "lds", "ldx", "ldy", "lsr", "lxa", "nop", "ora", "pha", "php",
-            "pla", "plp", "rla", "rol", "ror", "rra", "rti", "rts", "sax", "sbc", "sbx",
-            "sec", "sed", "sei", "sha", "shl", "shr", "shs", "shx", "shy", "slo", "sre",
-            "sta", "stx", "sty", "tas", "tax", "tay", "tsx", "txa", "txs", "tya", "xaa")
-
-
+    override val opcodeNames = normal6502instructions
 }
+
+
+// 6502 opcodes (including aliases and illegal opcodes), these cannot be used as variable or label names
+internal val normal6502instructions = setOf(
+    "adc", "ahx", "alr", "anc", "and", "ane", "arr", "asl", "asr", "axs", "bcc", "bcs",
+    "beq", "bge", "bit", "blt", "bmi", "bne", "bpl", "brk", "bvc", "bvs", "clc",
+    "cld", "cli", "clv", "cmp", "cpx", "cpy", "dcm", "dcp", "dec", "dex", "dey",
+    "eor", "gcc", "gcs", "geq", "gge", "glt", "gmi", "gne", "gpl", "gvc", "gvs",
+    "inc", "ins", "inx", "iny", "isb", "isc", "jam", "jmp", "jsr", "lae", "las",
+    "lax", "lda", "lds", "ldx", "ldy", "lsr", "lxa", "nop", "ora", "pha", "php",
+    "pla", "plp", "rla", "rol", "ror", "rra", "rti", "rts", "sax", "sbc", "sbx",
+    "sec", "sed", "sei", "sha", "shl", "shr", "shs", "shx", "shy", "slo", "sre",
+    "sta", "stx", "sty", "tas", "tax", "tay", "tsx", "txa", "txs", "tya", "xaa")

codeCore/src/prog8/code/target/c64/C64Zeropage.kt

@@ -1,16 +1,14 @@
-package prog8.compiler.target.c64
+package prog8.code.target.c64
+
+import prog8.code.core.*
 
-import prog8.compilerinterface.CompilationOptions
-import prog8.compilerinterface.InternalCompilerException
-import prog8.compilerinterface.Zeropage
-import prog8.compilerinterface.ZeropageType
 
 class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
 
     override val SCRATCH_B1 = 0x02u      // temp storage for a single byte
     override val SCRATCH_REG = 0x03u     // temp storage for a register, must be B1+1
     override val SCRATCH_W1 = 0xfbu      // temp storage 1 for a word  $fb+$fc
-    override val SCRATCH_W2 = 0xfdu      // temp storage 2 for a word  $fb+$fc
+    override val SCRATCH_W2 = 0xfdu      // temp storage 2 for a word  $fd+$fe
 
 
     init {
@@ -22,16 +20,15 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
             throw InternalCompilerException("when floats are enabled, zero page type should be 'floatsafe' or 'basicsafe' or 'dontuse'")
 
         if (options.zeropage == ZeropageType.FULL) {
-            free.addAll(0x04u..0xf9u)
-            free.add(0xffu)
+            free.addAll(0x02u..0xffu)
+            free.removeAll(setOf(SCRATCH_B1, SCRATCH_REG, SCRATCH_W1, SCRATCH_W1+1u, SCRATCH_W2, SCRATCH_W2+1u))
             free.removeAll(setOf(0xa0u, 0xa1u, 0xa2u, 0x91u, 0xc0u, 0xc5u, 0xcbu, 0xf5u, 0xf6u))        // these are updated by IRQ
         } else {
             if (options.zeropage == ZeropageType.KERNALSAFE || options.zeropage == ZeropageType.FLOATSAFE) {
                 free.addAll(listOf(
-                        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
-                        0x16, 0x17, 0x18, 0x19, 0x1a,
-                        0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21,
-                        0x22, 0x23, 0x24, 0x25,
+                        0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+                        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+                        0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
                         0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46,
                         0x47, 0x48, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x51, 0x52, 0x53,
                         0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60,
@@ -47,8 +44,8 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
             if (options.zeropage == ZeropageType.FLOATSAFE) {
                 // remove the zeropage locations used for floating point operations from the free list
                 free.removeAll(listOf(
-                        0x22, 0x23, 0x24, 0x25,
-                        0x10, 0x11, 0x12, 0x26, 0x27, 0x28, 0x29, 0x2a,
+                        0x03, 0x04, 0x10, 0x11, 0x12,
+                        0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a,
                         0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60,
                         0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
                         0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72,
@@ -59,7 +56,7 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
             if(options.zeropage!= ZeropageType.DONTUSE) {
                 // add the free Zp addresses
                 // these are valid for the C-64 but allow BASIC to keep running fully *as long as you don't use tape I/O*
-                free.addAll(listOf(0x04, 0x05, 0x06, 0x0a, 0x0e,
+                free.addAll(listOf(0x02, 0x03, 0x04, 0x05, 0x06, 0x0a, 0x0e,
                         0x92, 0x96, 0x9b, 0x9c, 0x9e, 0x9f, 0xa5, 0xa6,
                         0xb0, 0xb1, 0xbe, 0xbf, 0xf9).map{it.toUInt()})
             } else {
@@ -68,6 +65,32 @@ class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
             }
         }
 
+        val distictFree = free.distinct()
+        free.clear()
+        free.addAll(distictFree)
+
         removeReservedFromFreePool()
+
+        if(options.zeropage==ZeropageType.FULL || options.zeropage==ZeropageType.KERNALSAFE) {
+            // in these cases there is enough space on the zero page to stick the cx16 virtual registers in there as well.
+            allocateCx16VirtualRegisters()
+        }
+    }
+
+    override fun allocateCx16VirtualRegisters() {
+        // Note: the 16 virtual registers R0-R15 are not regular allocated variables, they're *memory mapped* elsewhere to fixed addresses.
+        // However, to be able for the compiler to "see" them as zero page variables, we have to register them here as well.
+        // This is important because the compiler sometimes treats ZP variables more efficiently (for example if it's a pointer)
+        // The base addres is $04.  Unfortunately it cannot be the same as on the Commander X16 ($02).
+        for(reg in 0..15) {
+            allocatedVariables[listOf("cx16", "r${reg}")]   = ZpAllocation((4+reg*2).toUInt(), DataType.UWORD, 2)       // cx16.r0 .. cx16.r15
+            allocatedVariables[listOf("cx16", "r${reg}s")]  = ZpAllocation((4+reg*2).toUInt(), DataType.WORD, 2)        // cx16.r0s .. cx16.r15s
+            allocatedVariables[listOf("cx16", "r${reg}L")]  = ZpAllocation((4+reg*2).toUInt(), DataType.UBYTE, 1)       // cx16.r0L .. cx16.r15L
+            allocatedVariables[listOf("cx16", "r${reg}H")]  = ZpAllocation((5+reg*2).toUInt(), DataType.UBYTE, 1)       // cx16.r0H .. cx16.r15H
+            allocatedVariables[listOf("cx16", "r${reg}sL")] = ZpAllocation((4+reg*2).toUInt(), DataType.BYTE, 1)        // cx16.r0sL .. cx16.r15sL
+            allocatedVariables[listOf("cx16", "r${reg}sH")] = ZpAllocation((5+reg*2).toUInt(), DataType.BYTE, 1)        // cx16.r0sH .. cx16.r15sH
+            free.remove((4+reg*2).toUInt())
+            free.remove((5+reg*2).toUInt())
+        }
     }
 }

codeCore/src/prog8/code/target/cbm/AtasciiEncoding.kt

@@ -0,0 +1,214 @@
+package prog8.code.target.cbm
+
+import com.github.michaelbull.result.Ok
+import com.github.michaelbull.result.Result
+import java.io.CharConversionException
+
+object AtasciiEncoding {
+
+    private val decodeTable: CharArray = charArrayOf(
+        // $00
+        '♥',
+        '├',
+        '\uf130',    //  🮇    0x02 -> RIGHT ONE QUARTER BLOCK (CUS)
+        '┘',
+        '┤',
+        '┐',
+        '╱',
+        '╲',
+        '◢',
+        '▗',
+        '◣',
+        '▝',
+        '▘',
+        '\uf132',    //  🮂    0x1d -> UPPER ONE QUARTER BLOCK (CUS)
+        '▂',
+        '▖',
+
+        // $10
+     	'♣',
+        '┌',
+        '─',
+        '┼',
+        '•',
+        '▄',
+        '▎',
+        '┬',
+        '┴',
+        '▌',
+        '└',
+        '\u001b',           // $1b = escape
+        '\ufffe',           // UNDEFINED CHAR.   $1c = cursor up
+        '\ufffe',           // UNDEFINED CHAR.   $1d = cursor down
+        '\ufffe',           // UNDEFINED CHAR.   $1e = cursor left
+        '\ufffe',           // UNDEFINED CHAR.   $1f = cursor right
+
+        // $20
+        ' ',
+        '!',
+        '"',
+        '#',
+        '$',
+        '%',
+        '&',
+        '\'',
+        '(',
+        ')',
+        '*',
+        '+',
+        ',',
+        '-',
+        '.',
+        '/',
+
+        // $30
+     	'0',
+        '1',
+        '2',
+        '3',
+        '4',
+        '5',
+        '6',
+        '7',
+        '8',
+        '9',
+        ':',
+        ';',
+        '<',
+        '=',
+        '>',
+        '?',
+
+        // $40
+     	'@',
+        'A',
+        'B',
+        'C',
+        'D',
+        'E',
+        'F',
+        'G',
+        'H',
+        'I',
+        'J',
+        'K',
+        'L',
+        'M',
+        'N',
+        'O',
+
+        // $50
+        'P',
+        'Q',
+        'R',
+        'S',
+        'T',
+        'U',
+        'V',
+        'W',
+        'X',
+        'Y',
+        'Z',
+        '[',
+        '\\',
+        ']',
+        '^',
+        '_',
+
+        // $60
+        '♦',
+        'a',
+        'b',
+        'c',
+        'd',
+        'e',
+        'f',
+        'g',
+        'h',
+        'i',
+        'j',
+        'k',
+        'l',
+        'm',
+        'n',
+        'o',
+
+        // $70
+        'p',
+        'q',
+        'r',
+        's',
+        't',
+        'u',
+        'v',
+        'w',
+        'x',
+        'y',
+        'z',
+        '♠',
+        '|',
+        '\u000c',    //       $7d -> FORM FEED (CLEAR SCREEN)
+        '\u0008',    //       $7e -> BACKSPACE
+        '\u0009',    //       $7f -> TAB
+
+        // $80-$ff are reversed video characters + various special characters.
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $90
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\n',               // $9b -> EOL/RETURN
+        '\ufffe',           // UNDEFINED   $9c = DELETE LINE
+        '\ufffe',           // UNDEFINED   $9d = INSERT LINE
+        '\ufffe',           // UNDEFINED   $9e = CLEAR TAB STOP
+        '\ufffe',           // UNDEFINED   $9f = SET TAB STOP
+        // $a0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $b0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $c0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $d0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $e0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        // $f0
+        '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe', '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\ufffe',
+        '\u0007',           // $fd = bell/beep
+        '\u007f',           // $fe = DELETE
+        '\ufffe'            // UNDEFINED     $ff = INSERT
+    )
+
+    private val encodeTable = decodeTable.withIndex().associate{it.value to it.index}
+
+
+    fun encode(str: String): Result<List<UByte>, CharConversionException> {
+        val mapped = str.map { chr ->
+            when (chr) {
+                '\u0000' -> 0u
+                in '\u8000'..'\u80ff' -> {
+                    // special case: take the lower 8 bit hex value directly
+                    (chr.code - 0x8000).toUByte()
+                }
+                else -> encodeTable.getValue(chr).toUByte()
+            }
+        }
+        return Ok(mapped)
+    }
+
+    fun decode(bytes: List<UByte>): Result<String, CharConversionException> {
+        return Ok(bytes.map { decodeTable[it.toInt()] }.joinToString(""))
+    }
+}

codeCore/src/prog8/code/target/cbm/CbmMemorySizer.kt

@@ -0,0 +1,18 @@
+package prog8.code.target.cbm
+
+import prog8.code.core.*
+
+
+internal object CbmMemorySizer: IMemSizer {
+    override fun memorySize(dt: DataType): Int {
+        return when(dt) {
+            in ByteDatatypes -> 1
+            in WordDatatypes, in PassByReferenceDatatypes -> 2
+            DataType.FLOAT -> Mflpt5.FLOAT_MEM_SIZE
+            else -> Int.MIN_VALUE
+        }
+    }
+
+    override fun memorySize(arrayDt: DataType, numElements: Int) =
+        memorySize(ArrayToElementTypes.getValue(arrayDt)) * numElements
+}

codeCore/src/prog8/code/target/cbm/IsoEncoding.kt

@@ -0,0 +1,37 @@
+package prog8.code.target.cbm
+
+import com.github.michaelbull.result.Err
+import com.github.michaelbull.result.Ok
+import com.github.michaelbull.result.Result
+import java.io.CharConversionException
+import java.nio.charset.Charset
+
+object IsoEncoding {
+    val charset: Charset = Charset.forName("ISO-8859-15")
+
+    fun encode(str: String): Result<List<UByte>, CharConversionException> {
+        return try {
+            val mapped = str.map { chr ->
+                when (chr) {
+                    '\u0000' -> 0u
+                    in '\u8000'..'\u80ff' -> {
+                        // special case: take the lower 8 bit hex value directly
+                        (chr.code - 0x8000).toUByte()
+                    }
+                    else -> charset.encode(chr.toString())[0].toUByte()
+                }
+            }
+            Ok(mapped)
+        } catch (ce: CharConversionException) {
+            Err(ce)
+        }
+    }
+
+    fun decode(bytes: List<UByte>): Result<String, CharConversionException> {
+        return try {
+            Ok(String(bytes.map { it.toByte() }.toByteArray(), charset))
+        } catch (ce: CharConversionException) {
+            Err(ce)
+        }
+    }
+}

codeCore/src/prog8/code/target/cbm/Mflpt5.kt

@@ -1,12 +1,11 @@
-package prog8.compiler.target.cbm
+package prog8.code.target.cbm
 
-import prog8.compilerinterface.IMachineFloat
-import prog8.compilerinterface.InternalCompilerException
+import prog8.code.core.InternalCompilerException
 import kotlin.math.absoluteValue
 import kotlin.math.pow
 
 
-data class Mflpt5(val b0: UByte, val b1: UByte, val b2: UByte, val b3: UByte, val b4: UByte): IMachineFloat {
+data class Mflpt5(val b0: UByte, val b1: UByte, val b2: UByte, val b3: UByte, val b4: UByte) {
 
     companion object {
         const val FLOAT_MAX_POSITIVE = 1.7014118345e+38         // bytes: 255,127,255,255,255
@@ -58,7 +57,7 @@ data class Mflpt5(val b0: UByte, val b1: UByte, val b2: UByte, val b3: UByte, va
         }
     }
 
-    override fun toDouble(): Double {
+    fun toDouble(): Double {
         if (this == zero) return 0.0
         val exp = b0.toInt() - 128
         val sign = (b1.toInt() and 0x80) > 0
@@ -67,7 +66,7 @@ data class Mflpt5(val b0: UByte, val b1: UByte, val b2: UByte, val b3: UByte, va
         return if (sign) -result else result
     }
 
-    override fun makeFloatFillAsm(): String {
+    fun makeFloatFillAsm(): String {
         val b0 = "$" + b0.toString(16).padStart(2, '0')
         val b1 = "$" + b1.toString(16).padStart(2, '0')
         val b2 = "$" + b2.toString(16).padStart(2, '0')

codeCore/src/prog8/code/target/cbm/PetsciiEncoding.kt

@@ -1,15 +1,14 @@
-package prog8.compiler.target.cbm
+package prog8.code.target.cbm
 
 import com.github.michaelbull.result.Err
 import com.github.michaelbull.result.Ok
 import com.github.michaelbull.result.Result
-import prog8.ast.antlr.escape
 import java.io.CharConversionException
 
-object Petscii {
+object PetsciiEncoding {
 
     // decoding:  from Petscii/Screencodes (0-255) to unicode
-    // character tables used from https://github.com/dj51d/cbmcodecs
+    // character tables used from https://github.com/irmen/cbmcodecs2
 
     private val decodingPetsciiLowercase = charArrayOf(
         '\u0000',    //       0x00 -> \u0000
@@ -159,7 +158,7 @@ object Petscii {
         '\uf105',    //       0x90 -> BLACK COLOR SWITCH (CUS)
         '\uf11e',    //      0x91 -> CURSOR UP (CUS)
         '\uf11b',    //      0x92 -> REVERSE VIDEO OFF (CUS)
-        '\u000c',    //       0x93 -> FORM FEED
+        '\u000c',    //       0x93 -> FORM FEED (CLEAR SCREEN)
         '\uf121',    //      0x94 -> INSERT (CUS)
         '\uf106',    //       0x95 -> BROWN COLOR SWITCH (CUS)
         '\uf107',    //       0x96 -> LIGHT RED COLOR SWITCH (CUS)
@@ -195,7 +194,7 @@ object Petscii {
         '\u258e',    //  ▎    0xB4 -> LEFT ONE QUARTER BLOCK
         '\u258d',    //  ▍    0xB5 -> LEFT THREE EIGTHS BLOCK
         '\uf131',    //      0xB6 -> RIGHT THREE EIGHTHS BLOCK (CUS)
-        '\uf132',    //      0xB7 -> UPPER ONE QUARTER BLOCK (CUS)
+        '\uf132',    //  🮂    0xB7 -> UPPER ONE QUARTER BLOCK (CUS)
         '\uf133',    //      0xB8 -> UPPER THREE EIGHTS BLOCK (CUS)
         '\u2583',    //  ▃    0xB9 -> LOWER THREE EIGHTHS BLOCK
         '\u2713',    //  ✓    0xBA -> CHECK MARK
@@ -246,7 +245,7 @@ object Petscii {
         '\u2595',    //  ▕    0xE7 -> RIGHT ONE EIGHTH BLOCK
         '\uf12f',    //      0xE8 -> LOWER HALF BLOCK MEDIUM SHADE (CUS)
         '\uf13a',    //      0xE9 -> MEDIUM SHADE SLASHED RIGHT (CUS)
-        '\uf130',    //      0xEA -> RIGHT ONE QUARTER BLOCK (CUS)
+        '\uf130',    //  🮇    0xEA -> RIGHT ONE QUARTER BLOCK (CUS)
         '\u251c',    //  ├    0xEB -> BOX DRAWINGS LIGHT VERTICAL AND RIGHT
         '\u2597',    //  ▗    0xEC -> QUADRANT LOWER RIGHT
         '\u2514',    //  └    0xED -> BOX DRAWINGS LIGHT UP AND RIGHT
@@ -418,7 +417,7 @@ object Petscii {
         '\uf105',    //       0x90 -> BLACK COLOR SWITCH (CUS)
         '\uf11e',    //       0x91 -> CURSOR UP (CUS)
         '\uf11b',    //       0x92 -> REVERSE VIDEO OFF (CUS)
-        '\u000c',    //       0x93 -> FORM FEED
+        '\u000c',    //       0x93 -> FORM FEED (CLEAR SCREEN)
         '\uf121',    //       0x94 -> INSERT (CUS)
         '\uf106',    //       0x95 -> BROWN COLOR SWITCH (CUS)
         '\uf107',    //       0x96 -> LIGHT RED COLOR SWITCH (CUS)
@@ -1077,7 +1076,7 @@ object Petscii {
                 }
                 else -> {
                     val case = if (lowercase) "lower" else "upper"
-                    throw CharConversionException("no ${case}Petscii character for '${escape(chr.toString())}' (${chr.code})")
+                    throw CharConversionException("no ${case}Petscii character for '${chr}' (${chr.code})")
                 }
             }
         }
@@ -1095,13 +1094,17 @@ object Petscii {
         }
     }
 
-    fun decodePetscii(petscii: Iterable<UByte>, lowercase: Boolean = false): String {
-        return petscii.map {
-            val code = it.toInt()
-            if(code<0 || code>= decodingPetsciiLowercase.size)
-                throw CharConversionException("petscii $code out of range 0..${decodingPetsciiLowercase.size-1}")
-            if(lowercase) decodingPetsciiLowercase[code] else decodingPetsciiUppercase[code]
-        }.joinToString("")
+    fun decodePetscii(petscii: Iterable<UByte>, lowercase: Boolean = false): Result<String, CharConversionException> {
+        return try {
+            Ok(petscii.map {
+                val code = it.toInt()
+                if(code<0 || code>= decodingPetsciiLowercase.size)
+                    throw CharConversionException("petscii $code out of range 0..${decodingPetsciiLowercase.size-1}")
+                if(lowercase) decodingPetsciiLowercase[code] else decodingPetsciiUppercase[code]
+            }.joinToString(""))
+        } catch(ce: CharConversionException) {
+            return Err(ce)
+        }
     }
 
     fun encodeScreencode(text: String, lowercase: Boolean = false): Result<List<UByte>, CharConversionException> {
@@ -1116,7 +1119,7 @@ object Petscii {
                 }
                 else -> {
                     val case = if (lowercase) "lower" else "upper"
-                    throw CharConversionException("no ${case}Screencode character for '${escape(chr.toString())}' (${chr.code})")
+                    throw CharConversionException("no ${case}Screencode character for '${chr}' (${chr.code})")
                 }
             }
         }
@@ -1134,13 +1137,17 @@ object Petscii {
         }
     }
 
-    fun decodeScreencode(screencode: Iterable<UByte>, lowercase: Boolean = false): String {
-        return screencode.map {
-            val code = it.toInt()
-            if(code<0 || code>= decodingScreencodeLowercase.size)
-                throw CharConversionException("screencode $code out of range 0..${decodingScreencodeLowercase.size-1}")
-            if (lowercase) decodingScreencodeLowercase[code] else decodingScreencodeUppercase[code]
-        }.joinToString("")
+    fun decodeScreencode(screencode: Iterable<UByte>, lowercase: Boolean = false): Result<String, CharConversionException> {
+        return try {
+            Ok(screencode.map {
+                val code = it.toInt()
+                if(code<0 || code>= decodingScreencodeLowercase.size)
+                    throw CharConversionException("screencode $code out of range 0..${decodingScreencodeLowercase.size-1}")
+                if (lowercase) decodingScreencodeLowercase[code] else decodingScreencodeUppercase[code]
+            }.joinToString(""))
+        } catch(ce: CharConversionException) {
+            Err(ce)
+        }
     }
 
     fun petscii2scr(petscii_code: UByte, inverseVideo: Boolean): Result<UByte, CharConversionException> {

codeCore/src/prog8/code/target/cx16/CX16MachineDefinition.kt

@@ -0,0 +1,77 @@
+package prog8.code.target.cx16
+
+import prog8.code.core.*
+import prog8.code.target.cbm.Mflpt5
+import java.nio.file.Path
+
+
+class CX16MachineDefinition: IMachineDefinition {
+
+    override val cpu = CpuType.CPU65c02
+
+    override val FLOAT_MAX_POSITIVE = Mflpt5.FLOAT_MAX_POSITIVE
+    override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
+    override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
+    override val PROGRAM_LOAD_ADDRESS = 0x0801u
+
+    // the 2*256 byte evaluation stack (on which bytes, words, and even floats are stored during calculations)
+    override var ESTACK_LO = 0x0400u        //  $0400-$04ff inclusive
+    override var ESTACK_HI = 0x0500u        //  $0500-$05ff inclusive
+
+    override lateinit var zeropage: Zeropage
+
+    override fun getFloatAsmBytes(num: Number) = Mflpt5.fromNumber(num).makeFloatFillAsm()
+    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
+        return if (compilerOptions.launcher == CbmPrgLauncherType.BASIC || compilerOptions.output == OutputType.PRG)
+            listOf("syslib")
+        else
+            emptyList()
+    }
+
+    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
+        val emulator: String
+        val extraArgs: List<String>
+
+        when(selectedEmulator) {
+            1 -> {
+                emulator = "x16emu"
+                extraArgs = emptyList()
+            }
+            2 -> {
+                emulator = "box16"
+                extraArgs = listOf("-sym", viceMonListName(programNameWithPath.toString()))
+            }
+            else -> {
+                System.err.println("Cx16 target only supports x16emu and box16 emulators.")
+                return
+            }
+        }
+
+        println("\nStarting Commander X16 emulator $emulator...")
+        val cmdline = listOf(emulator, "-scale", "2", "-run", "-prg", "${programNameWithPath}.prg") + extraArgs
+        val processb = ProcessBuilder(cmdline).inheritIO()
+        val process: Process = processb.start()
+        process.waitFor()
+    }
+
+    override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0x9f00u..0x9fffu
+
+    override fun initializeZeropage(compilerOptions: CompilationOptions) {
+        zeropage = CX16Zeropage(compilerOptions)
+    }
+
+    // 65c02 opcodes, these cannot be used as variable or label names
+    override val opcodeNames = setOf("adc", "and", "asl", "bcc", "bcs",
+            "beq", "bge", "bit", "blt", "bmi", "bne", "bpl", "brk", "bvc", "bvs", "clc",
+            "cld", "cli", "clv", "cmp", "cpx", "cpy", "dec", "dex", "dey",
+            "eor", "gcc", "gcs", "geq", "gge", "glt", "gmi", "gne", "gpl", "gvc", "gvs",
+            "inc", "inx", "iny", "jmp", "jsr",
+            "lda", "ldx", "ldy", "lsr", "nop", "ora", "pha", "php",
+            "pla", "plp", "rol", "ror", "rti", "rts", "sbc",
+            "sec", "sed", "sei",
+            "sta", "stx", "sty", "tax", "tay", "tsx", "txa", "txs", "tya",
+            "bra", "phx", "phy", "plx", "ply", "stz", "trb", "tsb", "bbr", "bbs",
+            "rmb", "smb", "stp", "wai")
+
+
+}

codeCore/src/prog8/code/target/cx16/CX16Zeropage.kt

@@ -0,0 +1,69 @@
+package prog8.code.target.cx16
+
+import prog8.code.core.*
+
+
+class CX16Zeropage(options: CompilationOptions) : Zeropage(options) {
+
+    override val SCRATCH_B1 = 0x7au      // temp storage for a single byte
+    override val SCRATCH_REG = 0x7bu     // temp storage for a register, must be B1+1
+    override val SCRATCH_W1 = 0x7cu      // temp storage 1 for a word  $7c+$7d
+    override val SCRATCH_W2 = 0x7eu      // temp storage 2 for a word  $7e+$7f
+
+
+    init {
+        if (options.floats && options.zeropage !in arrayOf(
+                ZeropageType.FLOATSAFE,
+                ZeropageType.BASICSAFE,
+                ZeropageType.DONTUSE
+            ))
+            throw InternalCompilerException("when floats are enabled, zero page type should be 'floatsafe' or 'basicsafe' or 'dontuse'")
+
+        // the addresses 0x02 to 0x21 (inclusive) are taken for sixteen virtual 16-bit api registers.
+
+        synchronized(this) {
+            when (options.zeropage) {
+                ZeropageType.FULL -> {
+                    free.addAll(0x22u..0xffu)
+                }
+                ZeropageType.KERNALSAFE -> {
+                    free.addAll(0x22u..0x7fu)
+                    free.addAll(0xa9u..0xffu)
+                }
+                ZeropageType.FLOATSAFE -> {
+                    free.addAll(0x22u..0x7fu)
+                    free.addAll(0xd4u..0xffu)
+                }
+                ZeropageType.BASICSAFE -> {
+                    free.addAll(0x22u..0x7fu)
+                }
+                ZeropageType.DONTUSE -> {
+                    free.clear() // don't use zeropage at all
+                }
+                else -> throw InternalCompilerException("for this machine target, zero page type 'floatsafe' is not available. ${options.zeropage}")
+            }
+
+            val distictFree = free.distinct()
+            free.clear()
+            free.addAll(distictFree)
+
+            removeReservedFromFreePool()
+
+            allocateCx16VirtualRegisters()
+        }
+    }
+
+    override fun allocateCx16VirtualRegisters() {
+        // Note: the 16 virtual registers R0-R15 are not regular allocated variables, they're *memory mapped* elsewhere to fixed addresses.
+        // However, to be able for the compiler to "see" them as zero page variables, we have to register them here as well.
+        // This is important because the compiler sometimes treats ZP variables more efficiently (for example if it's a pointer)
+        for(reg in 0..15) {
+            allocatedVariables[listOf("cx16", "r${reg}")]   = ZpAllocation((2+reg*2).toUInt(), DataType.UWORD, 2)       // cx16.r0 .. cx16.r15
+            allocatedVariables[listOf("cx16", "r${reg}s")]  = ZpAllocation((2+reg*2).toUInt(), DataType.WORD, 2)        // cx16.r0s .. cx16.r15s
+            allocatedVariables[listOf("cx16", "r${reg}L")]  = ZpAllocation((2+reg*2).toUInt(), DataType.UBYTE, 1)       // cx16.r0L .. cx16.r15L
+            allocatedVariables[listOf("cx16", "r${reg}H")]  = ZpAllocation((3+reg*2).toUInt(), DataType.UBYTE, 1)       // cx16.r0H .. cx16.r15H
+            allocatedVariables[listOf("cx16", "r${reg}sL")] = ZpAllocation((2+reg*2).toUInt(), DataType.BYTE, 1)        // cx16.r0sL .. cx16.r15sL
+            allocatedVariables[listOf("cx16", "r${reg}sH")] = ZpAllocation((3+reg*2).toUInt(), DataType.BYTE, 1)        // cx16.r0sH .. cx16.r15sH
+        }
+    }
+}

codeCore/src/prog8/code/target/virtual/VirtualMachineDefinition.kt

@@ -0,0 +1,57 @@
+package prog8.code.target.virtual
+
+import prog8.code.core.CompilationOptions
+import prog8.code.core.CpuType
+import prog8.code.core.IMachineDefinition
+import prog8.code.core.Zeropage
+import java.nio.file.Path
+import kotlin.io.path.isReadable
+import kotlin.io.path.name
+import kotlin.io.path.readText
+
+class VirtualMachineDefinition: IMachineDefinition {
+
+    override val cpu = CpuType.VIRTUAL
+
+    override val FLOAT_MAX_POSITIVE = Float.MAX_VALUE.toDouble()
+    override val FLOAT_MAX_NEGATIVE = -Float.MAX_VALUE.toDouble()
+    override val FLOAT_MEM_SIZE = 4             // 32-bits floating point
+    override val PROGRAM_LOAD_ADDRESS = 0u      // not actually used
+
+    override var ESTACK_LO = 0u                 // not actually used
+    override var ESTACK_HI = 0u                 // not actually used
+
+    override lateinit var zeropage: Zeropage     // not actually used
+
+    override fun getFloatAsmBytes(num: Number) = TODO("float asm bytes from number")
+
+    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
+        return listOf("syslib")
+    }
+
+    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
+        println("\nStarting Virtual Machine...")
+        // to not have external module dependencies in our own module, we launch the virtual machine via reflection
+        val vm = Class.forName("prog8.vm.VmRunner").getDeclaredConstructor().newInstance() as IVirtualMachineRunner
+        val filename = programNameWithPath.name
+        if(programNameWithPath.isReadable()) {
+            vm.runProgram(programNameWithPath.readText())
+        } else {
+            val withExt = programNameWithPath.resolveSibling("$filename.p8ir")
+            if(withExt.isReadable())
+                vm.runProgram(withExt.readText())
+            else
+                throw NoSuchFileException(withExt.toFile(), reason="not a .p8ir file")
+        }
+    }
+
+    override fun isIOAddress(address: UInt): Boolean = false
+
+    override fun initializeZeropage(compilerOptions: CompilationOptions) {}
+
+    override val opcodeNames = emptySet<String>()
+}
+
+interface IVirtualMachineRunner {
+    fun runProgram(irSource: CharSequence)
+}

codeGenCpu6502/build.gradle

@@ -24,11 +24,11 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':compilerInterfaces')
+    implementation project(':codeCore')
     implementation project(':compilerAst')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
-    implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.12"
+    implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"
 
 }
 

codeGenCpu6502/codeGenCpu6502.iml

@@ -9,8 +9,8 @@
     <orderEntry type="inheritedJdk" />
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
-    <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
-    <orderEntry type="module" module-name="compilerInterfaces" />
+    <orderEntry type="module" module-name="codeCore" />
     <orderEntry type="module" module-name="compilerAst" />
+    <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
   </component>
 </module>

codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt

@@ -1,16 +1,16 @@
-package prog8.compiler.target.cpu6502.codegen
+package prog8.codegen.cpu6502
 
 import prog8.ast.Program
-import prog8.ast.base.VarDeclType
-import prog8.ast.expressions.NumericLiteralValue
+import prog8.ast.expressions.NumericLiteral
 import prog8.ast.statements.VarDecl
-import prog8.compilerinterface.IMachineDefinition
+import prog8.ast.statements.VarDeclType
+import prog8.code.core.IMachineDefinition
 
 
 // note: see https://wiki.nesdev.org/w/index.php/6502_assembly_optimisations
 
 
-fun optimizeAssembly(lines: MutableList<String>, machine: IMachineDefinition, program: Program): Int {
+internal fun optimizeAssembly(lines: MutableList<String>, machine: IMachineDefinition, program: Program): Int {
 
     var numberOfOptimizations = 0
 
@@ -59,11 +59,23 @@ fun optimizeAssembly(lines: MutableList<String>, machine: IMachineDefinition, pr
         numberOfOptimizations++
     }
 
-    // TODO more assembly optimizations
+    mods = optimizeSamePointerIndexing(linesByFourteen, machine, program)
+    if(mods.isNotEmpty()) {
+        apply(mods, lines)
+        linesByFourteen = getLinesBy(lines, 14)
+        numberOfOptimizations++
+    }
+
+    // TODO more assembly peephole optimizations
 
     return numberOfOptimizations
 }
 
+private fun String.isBranch() = this.startsWith("b")
+private fun String.isStoreReg() = this.startsWith("sta") || this.startsWith("sty") || this.startsWith("stx")
+private fun String.isStoreRegOrZero() = this.isStoreReg() || this.startsWith("stz")
+private fun String.isLoadReg() = this.startsWith("lda") || this.startsWith("ldy") || this.startsWith("ldx")
+
 private class Modification(val lineIndex: Int, val remove: Boolean, val replacement: String?)
 
 private fun apply(modifications: List<Modification>, lines: MutableList<String>) {
@@ -196,9 +208,9 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
         sta  A1
         sty  A2
          */
-        if(first.startsWith("st") && second.startsWith("st")
-            && third.startsWith("ld") && fourth.startsWith("ld")
-            && fifth.startsWith("st") && sixth.startsWith("st")) {
+        if(first.isStoreReg() && second.isStoreReg()
+            && third.isLoadReg() && fourth.isLoadReg()
+            && fifth.isStoreReg() && sixth.isStoreReg()) {
             val reg1 = first[2]
             val reg2 = second[2]
             val reg3 = third[2]
@@ -227,8 +239,8 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
         lda  A1     ; can be removed
         ldy  A2     ; can be removed if not followed by a branch instuction
          */
-        if(!overlappingMods && first.startsWith("st") && second.startsWith("st")
-            && third.startsWith("ld") && fourth.startsWith("ld")) {
+        if(!overlappingMods && first.isStoreReg() && second.isStoreReg()
+            && third.isLoadReg() && fourth.isLoadReg()) {
             val reg1 = first[2]
             val reg2 = second[2]
             val reg3 = third[2]
@@ -249,13 +261,14 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
                 }
             }
         }
+
         /*
         sta  A1
-        sty  A2
+        sty  A2     ; ... or stz
         lda  A1     ; can be removed if not followed by a branch instruction
          */
-        if(!overlappingMods && first.startsWith("st") && second.startsWith("st")
-            && third.startsWith("ld") && !fourth.startsWith("b")) {
+        if(!overlappingMods && first.isStoreReg() && second.isStoreRegOrZero()
+            && third.isLoadReg() && !fourth.isBranch()) {
             val reg1 = first[2]
             val reg3 = third[2]
             if(reg1==reg3) {
@@ -276,7 +289,7 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
         ldy  A1     ; make tay
         sta  A1     ; remove
          */
-        if(!overlappingMods && first.startsWith("sta") && second.startsWith("ld")
+        if(!overlappingMods && first.startsWith("sta") && second.isLoadReg()
             && third.startsWith("sta") && second.length>4) {
             val firstvalue = first.substring(4)
             val secondvalue = second.substring(4)
@@ -293,10 +306,10 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
         }
 
         /*
-        sta  A
-        sta  A
+        sta  A   ; or stz     double store, remove this first one
+        sta  A   ; or stz
          */
-        if(!overlappingMods && first.startsWith("st") && second.startsWith("st")) {
+        if(!overlappingMods && first.isStoreRegOrZero() && second.isStoreRegOrZero()) {
             if(first[2]==second[2]) {
                 val firstvalue = first.substring(4)
                 val secondvalue = second.substring(4)
@@ -304,7 +317,7 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
                     val address = getAddressArg(first, program)
                     if(address==null || !machine.isIOAddress(address)) {
                         overlappingMods = true
-                        mods.add(Modification(lines[1].index, true, null))
+                        mods.add(Modification(lines[0].index, true, null))
                     }
                 }
             }
@@ -314,6 +327,48 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
     return mods
 }
 
+private fun optimizeSamePointerIndexing(linesByFourteen: List<List<IndexedValue<String>>>, machine: IMachineDefinition, program: Program): List<Modification> {
+
+    // Optimize same pointer indexing where for instance we load and store to the same ptr index in Y
+    // if Y isn't modified in between we can omit the second LDY:
+    //    ldy  #0
+    //    lda  (ptr),y
+    //    ora  #3       ; <-- instruction(s) that don't modify Y
+    //    ldy  #0       ; <-- can be removed
+    //    sta  (ptr),y
+
+    val mods = mutableListOf<Modification>()
+    for (lines in linesByFourteen) {
+        val first = lines[0].value.trimStart()
+        val second = lines[1].value.trimStart()
+        val third = lines[2].value.trimStart()
+        val fourth = lines[3].value.trimStart()
+        val fifth = lines[4].value.trimStart()
+        val sixth = lines[5].value.trimStart()
+
+        if(first.startsWith("ldy") && second.startsWith("lda") && fourth.startsWith("ldy") && fifth.startsWith("sta")) {
+            val firstvalue = first.substring(4)
+            val secondvalue = second.substring(4)
+            val fourthvalue = fourth.substring(4)
+            val fifthvalue = fifth.substring(4)
+            if("y" !in third && firstvalue==fourthvalue && secondvalue==fifthvalue && secondvalue.endsWith(",y") && fifthvalue.endsWith(",y")) {
+                mods.add(Modification(lines[3].index, true, null))
+            }
+        }
+        if(first.startsWith("ldy") && second.startsWith("lda") && fifth.startsWith("ldy") && sixth.startsWith("sta")) {
+            val firstvalue = first.substring(4)
+            val secondvalue = second.substring(4)
+            val fifthvalue = fifth.substring(4)
+            val sixthvalue = sixth.substring(4)
+            if("y" !in third && "y" !in fourth && firstvalue==fifthvalue && secondvalue==sixthvalue && secondvalue.endsWith(",y") && sixthvalue.endsWith(",y")) {
+                mods.add(Modification(lines[4].index, true, null))
+            }
+        }
+    }
+
+    return mods
+}
+
 private fun optimizeStoreLoadSame(linesByFour: List<List<IndexedValue<String>>>, machine: IMachineDefinition, program: Program): List<Modification> {
     // sta X + lda X,  sty X + ldy X,   stx X + ldx X  -> the second instruction can OFTEN be eliminated
     val mods = mutableListOf<Modification>()
@@ -333,7 +388,7 @@ private fun optimizeStoreLoadSame(linesByFour: List<List<IndexedValue<String>>>,
         ) {
             val third = lines[3].value.trimStart()
             val attemptRemove =
-                if(third.startsWith("b")) {
+                if(third.isBranch()) {
                     // a branch instruction follows, we can only remove the load instruction if
                     // another load instruction of the same register precedes the store instruction
                     // (otherwise wrong cpu flags are used)
@@ -400,7 +455,7 @@ private fun getAddressArg(line: String, program: Program): UInt? {
                     when(decl.type){
                         VarDeclType.VAR -> null
                         VarDeclType.CONST,
-                        VarDeclType.MEMORY -> (decl.value as NumericLiteralValue).number.toUInt()
+                        VarDeclType.MEMORY -> (decl.value as NumericLiteral).number.toUInt()
                     }
                 }
                 else null

codeGenCpu6502/src/prog8/codegen/cpu6502/AsmsubHelpers.kt

@@ -1,13 +1,15 @@
-package prog8.compiler.target.cpu6502.codegen
+package prog8.codegen.cpu6502
 
-import prog8.ast.base.Cx16VirtualRegisters
-import prog8.ast.base.RegisterOrPair
-import prog8.ast.expressions.*
-import prog8.ast.statements.RegisterOrStatusflag
+import prog8.ast.expressions.ArrayIndexedExpression
+import prog8.ast.expressions.BuiltinFunctionCall
+import prog8.ast.expressions.Expression
 import prog8.ast.statements.Subroutine
+import prog8.code.core.Cx16VirtualRegisters
+import prog8.code.core.RegisterOrPair
+import prog8.code.core.RegisterOrStatusflag
 
 
-internal fun asmsub6502ArgsEvalOrder(sub: Subroutine): List<Int> {
+fun asmsub6502ArgsEvalOrder(sub: Subroutine): List<Int> {
     val order = mutableListOf<Int>()
     // order is:
     //  1) cx16 virtual word registers,
@@ -35,7 +37,7 @@ internal fun asmsub6502ArgsEvalOrder(sub: Subroutine): List<Int> {
     return order
 }
 
-internal fun asmsub6502ArgsHaveRegisterClobberRisk(args: List<Expression>,
+fun asmsub6502ArgsHaveRegisterClobberRisk(args: List<Expression>,
                                                    paramRegisters: List<RegisterOrStatusflag>): Boolean {
     fun isClobberRisk(expr: Expression): Boolean {
         when (expr) {
@@ -44,10 +46,10 @@ internal fun asmsub6502ArgsHaveRegisterClobberRisk(args: List<Expression>,
                     it.registerOrPair in listOf(RegisterOrPair.Y, RegisterOrPair.AY, RegisterOrPair.XY)
                 }
             }
-            is FunctionCall -> {
-                if (expr.target.nameInSource == listOf("lsb") || expr.target.nameInSource == listOf("msb"))
+            is BuiltinFunctionCall -> {
+                if (expr.name == "lsb" || expr.name == "msb")
                     return isClobberRisk(expr.args[0])
-                if (expr.target.nameInSource == listOf("mkword"))
+                if (expr.name == "mkword")
                     return isClobberRisk(expr.args[0]) && isClobberRisk(expr.args[1])
                 return !expr.isSimple
             }

codeGenCpu6502/src/prog8/codegen/cpu6502/AssemblyProgram.kt

@@ -0,0 +1,147 @@
+package prog8.codegen.cpu6502
+
+import com.github.michaelbull.result.Ok
+import com.github.michaelbull.result.Result
+import com.github.michaelbull.result.mapError
+import prog8.ast.generatedLabelPrefix
+import prog8.code.core.*
+import java.io.File
+import java.nio.file.Path
+import kotlin.io.path.Path
+import kotlin.io.path.isRegularFile
+
+
+internal class AssemblyProgram(
+        override val name: String,
+        outputDir: Path,
+        private val compTarget: ICompilationTarget) : IAssemblyProgram {
+
+    private val assemblyFile = outputDir.resolve("$name.asm")
+    private val prgFile = outputDir.resolve("$name.prg")        // CBM prg executable program
+    private val xexFile = outputDir.resolve("$name.xex")        // Atari xex executable program
+    private val binFile = outputDir.resolve("$name.bin")
+    private val viceMonListFile = outputDir.resolve(viceMonListName(name))
+    private val listFile = outputDir.resolve("$name.list")
+
+    override fun assemble(options: CompilationOptions): Boolean {
+
+        val assemblerCommand: List<String>
+
+        when (compTarget.name) {
+            in setOf("c64", "c128", "cx16") -> {
+                // CBM machines .prg generation.
+
+                // add "-Wlong-branch"  to see warnings about conversion of branch instructions to jumps (default = do this silently)
+                val command = mutableListOf("64tass", "--ascii", "--case-sensitive", "--long-branch",
+                    "-Wall", "-Wno-strict-bool", "-Wno-shadow", // "-Werror",
+                    "--dump-labels", "--vice-labels", "--labels=$viceMonListFile", "--no-monitor"
+                )
+
+                if(options.asmQuiet)
+                    command.add("--quiet")
+
+                if(options.asmListfile)
+                    command.add("--list=$listFile")
+
+                val outFile = when (options.output) {
+                    OutputType.PRG -> {
+                        command.add("--cbm-prg")
+                        println("\nCreating prg for target ${compTarget.name}.")
+                        prgFile
+                    }
+                    OutputType.RAW -> {
+                        command.add("--nostart")
+                        println("\nCreating raw binary for target ${compTarget.name}.")
+                        binFile
+                    }
+                    else -> throw AssemblyError("invalid output type")
+                }
+                command.addAll(listOf("--output", outFile.toString(), assemblyFile.toString()))
+                assemblerCommand = command
+
+            }
+            "atari" -> {
+                // Atari800XL .xex generation.
+
+                // TODO are these options okay?
+                val command = mutableListOf("64tass", "--ascii", "--case-sensitive", "--long-branch",
+                    "-Wall", "-Wno-strict-bool", "-Wno-shadow", // "-Werror",
+                    "--no-monitor"
+                )
+
+                if(options.asmQuiet)
+                    command.add("--quiet")
+
+                if(options.asmListfile)
+                    command.add("--list=$listFile")
+
+                val outFile = when (options.output) {
+                    OutputType.XEX -> {
+                        command.add("--atari-xex")
+                        println("\nCreating xex for target ${compTarget.name}.")
+                        xexFile
+                    }
+                    OutputType.RAW -> {
+                        command.add("--nostart")
+                        println("\nCreating raw binary for target ${compTarget.name}.")
+                        binFile
+                    }
+                    else -> throw AssemblyError("invalid output type")
+                }
+                command.addAll(listOf("--output", outFile.toString(), assemblyFile.toString()))
+                assemblerCommand = command
+            }
+            else -> throw AssemblyError("invalid compilation target")
+        }
+
+        val proc = ProcessBuilder(assemblerCommand).inheritIO().start()
+        val result = proc.waitFor()
+        if (result == 0 && compTarget.name!="atari") {
+            removeGeneratedLabelsFromMonlist()
+            generateBreakpointList()
+        }
+        return result==0
+    }
+
+    private fun removeGeneratedLabelsFromMonlist() {
+        val pattern = Regex("""al (\w+) \S+${generatedLabelPrefix}.+?""")
+        val lines = viceMonListFile.toFile().readLines()
+        viceMonListFile.toFile().outputStream().bufferedWriter().use {
+            for (line in lines) {
+                if(pattern.matchEntire(line)==null)
+                    it.write(line+"\n")
+            }
+        }
+    }
+
+    private fun generateBreakpointList() {
+        // builds list of breakpoints, appends to monitor list file
+        val breakpoints = mutableListOf<String>()
+        val pattern = Regex("""al (\w+) \S+_prog8_breakpoint_\d+.?""")      // gather breakpoints by the source label that's generated for them
+        for (line in viceMonListFile.toFile().readLines()) {
+            val match = pattern.matchEntire(line)
+            if (match != null)
+                breakpoints.add("break \$" + match.groupValues[1])
+        }
+        val num = breakpoints.size
+        breakpoints.add(0, "; vice monitor breakpoint list now follows")
+        breakpoints.add(1, "; $num breakpoints have been defined")
+        breakpoints.add(2, "del")
+        viceMonListFile.toFile().appendText(breakpoints.joinToString("\n") + "\n")
+    }
+}
+
+
+internal fun loadAsmIncludeFile(filename: String, source: SourceCode): Result<String, NoSuchFileException> {
+    return if (filename.startsWith(SourceCode.libraryFilePrefix)) {
+        return com.github.michaelbull.result.runCatching {
+            SourceCode.Resource("/prog8lib/${filename.substring(SourceCode.libraryFilePrefix.length)}").text
+        }.mapError { NoSuchFileException(File(filename)) }
+    } else {
+        val sib = Path(source.origin).resolveSibling(filename)
+        if (sib.isRegularFile())
+            Ok(SourceCode.File(sib).text)
+        else
+            Ok(SourceCode.File(Path(filename)).text)
+    }
+}

codeGenCpu6502/src/prog8/codegen/cpu6502/ExpressionsAsmGen.kt

@@ -1,17 +1,13 @@
-package prog8.compiler.target.cpu6502.codegen
+package prog8.codegen.cpu6502
 
 import prog8.ast.Program
-import prog8.ast.base.*
 import prog8.ast.expressions.*
-import prog8.ast.statements.BuiltinFunctionStatementPlaceholder
-import prog8.ast.statements.Subroutine
-import prog8.ast.toHex
-import prog8.compiler.target.AssemblyError
-import prog8.compilerinterface.BuiltinFunctions
-import prog8.compilerinterface.CpuType
+import prog8.code.core.*
 import kotlin.math.absoluteValue
 
-internal class ExpressionsAsmGen(private val program: Program, private val asmgen: AsmGen) {
+internal class ExpressionsAsmGen(private val program: Program,
+                                 private val asmgen: AsmGen,
+                                 private val allocator: VariableAllocator) {
 
     @Deprecated("avoid calling this as it generates slow evalstack based code")
     internal fun translateExpression(expression:Expression) {
@@ -34,108 +30,105 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
             is TypecastExpression -> translateExpression(expression)
             is AddressOf -> translateExpression(expression)
             is DirectMemoryRead -> asmgen.translateDirectMemReadExpressionToRegAorStack(expression, true)
-            is NumericLiteralValue -> translateExpression(expression)
+            is NumericLiteral -> translateExpression(expression)
             is IdentifierReference -> translateExpression(expression)
-            is FunctionCall -> translateFunctionCallResultOntoStack(expression)
-            is ArrayLiteralValue, is StringLiteralValue -> throw AssemblyError("no asm gen for string/array literal value assignment - should have been replaced by a variable")
-            is RangeExpr -> throw AssemblyError("range expression should have been changed into array values")
+            is FunctionCallExpression -> translateFunctionCallResultOntoStack(expression)
+            is BuiltinFunctionCall -> asmgen.translateBuiltinFunctionCallExpression(expression, true, null)
+            is ContainmentCheck -> throw AssemblyError("containment check as complex expression value is not supported")
+            is ArrayLiteral, is StringLiteral -> throw AssemblyError("no asm gen for string/array literal value assignment - should have been replaced by a variable")
+            is RangeExpression -> throw AssemblyError("range expression should have been changed into array values")
             is CharLiteral -> throw AssemblyError("charliteral should have been replaced by ubyte using certain encoding")
+            else -> TODO("missing expression asmgen for $expression")
         }
     }
 
-    private fun translateFunctionCallResultOntoStack(call: FunctionCall) {
+    private fun translateFunctionCallResultOntoStack(call: FunctionCallExpression) {
         // only for use in nested expression evaluation
 
-        val sub = call.target.targetStatement(program)
-        if(sub is BuiltinFunctionStatementPlaceholder) {
-            val builtinFunc = BuiltinFunctions.getValue(sub.name)
-            asmgen.translateBuiltinFunctionCallExpression(call, builtinFunc, true, null)
-        } else {
-            sub as Subroutine
-            asmgen.saveXbeforeCall(call)
-            asmgen.translateFunctionCall(call, true)
-            if(sub.regXasResult()) {
-                // store the return value in X somewhere that we can acces again below
-                asmgen.out("  stx  P8ZP_SCRATCH_REG")
-            }
-            asmgen.restoreXafterCall(call)
+        val sub = call.target.targetSubroutine(program)!!
+        asmgen.saveXbeforeCall(call)
+        asmgen.translateFunctionCall(call, true)
+        if(sub.regXasResult()) {
+            // store the return value in X somewhere that we can access again below
+            asmgen.out("  stx  P8ZP_SCRATCH_REG")
+        }
+        asmgen.restoreXafterCall(call)
 
-            val returns = sub.returntypes.zip(sub.asmReturnvaluesRegisters)
-            for ((_, reg) in returns) {
-                // result value is in cpu or status registers, put it on the stack instead (as we're evaluating an expression tree)
-                if (reg.registerOrPair != null) {
-                    when (reg.registerOrPair!!) {
-                        RegisterOrPair.A -> asmgen.out("  sta  P8ESTACK_LO,x |  dex")
-                        RegisterOrPair.Y -> asmgen.out("  tya |  sta  P8ESTACK_LO,x |  dex")
-                        RegisterOrPair.AY -> asmgen.out("  sta  P8ESTACK_LO,x |  tya |  sta  P8ESTACK_HI,x |  dex")
-                        RegisterOrPair.X -> asmgen.out("  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_LO,x |  dex")
-                        RegisterOrPair.AX -> asmgen.out("  sta  P8ESTACK_LO,x |  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_HI,x |  dex")
-                        RegisterOrPair.XY -> asmgen.out("  tya |  sta  P8ESTACK_HI,x |  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_LO,x |  dex")
-                        RegisterOrPair.FAC1 -> asmgen.out("  jsr  floats.push_fac1")
-                        RegisterOrPair.FAC2 -> asmgen.out("  jsr  floats.push_fac2")
-                        RegisterOrPair.R0,
-                        RegisterOrPair.R1,
-                        RegisterOrPair.R2,
-                        RegisterOrPair.R3,
-                        RegisterOrPair.R4,
-                        RegisterOrPair.R5,
-                        RegisterOrPair.R6,
-                        RegisterOrPair.R7,
-                        RegisterOrPair.R8,
-                        RegisterOrPair.R9,
-                        RegisterOrPair.R10,
-                        RegisterOrPair.R11,
-                        RegisterOrPair.R12,
-                        RegisterOrPair.R13,
-                        RegisterOrPair.R14,
-                        RegisterOrPair.R15 -> {
-                            asmgen.out(
-                                """
-                                lda  cx16.${reg.registerOrPair.toString().lowercase()}
-                                sta  P8ESTACK_LO,x
-                                lda  cx16.${reg.registerOrPair.toString().lowercase()}+1
-                                sta  P8ESTACK_HI,x
-                                dex
-                            """)
-                        }
-                    }
-                } else when(reg.statusflag) {
-                    Statusflag.Pc -> {
-                        asmgen.out("""
-                            lda  #0
-                            rol  a
+        val returns = sub.returntypes.zip(sub.asmReturnvaluesRegisters)
+        for ((_, reg) in returns) {
+            // result value is in cpu or status registers, put it on the stack instead (as we're evaluating an expression tree)
+            if (reg.registerOrPair != null) {
+                when (reg.registerOrPair!!) {
+                    RegisterOrPair.A -> asmgen.out("  sta  P8ESTACK_LO,x |  dex")
+                    RegisterOrPair.Y -> asmgen.out("  tya |  sta  P8ESTACK_LO,x |  dex")
+                    RegisterOrPair.AY -> asmgen.out("  sta  P8ESTACK_LO,x |  tya |  sta  P8ESTACK_HI,x |  dex")
+                    RegisterOrPair.X -> asmgen.out("  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_LO,x |  dex")
+                    RegisterOrPair.AX -> asmgen.out("  sta  P8ESTACK_LO,x |  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_HI,x |  dex")
+                    RegisterOrPair.XY -> asmgen.out("  tya |  sta  P8ESTACK_HI,x |  lda  P8ZP_SCRATCH_REG |  sta  P8ESTACK_LO,x |  dex")
+                    RegisterOrPair.FAC1 -> asmgen.out("  jsr  floats.push_fac1")
+                    RegisterOrPair.FAC2 -> asmgen.out("  jsr  floats.push_fac2")
+                    RegisterOrPair.R0,
+                    RegisterOrPair.R1,
+                    RegisterOrPair.R2,
+                    RegisterOrPair.R3,
+                    RegisterOrPair.R4,
+                    RegisterOrPair.R5,
+                    RegisterOrPair.R6,
+                    RegisterOrPair.R7,
+                    RegisterOrPair.R8,
+                    RegisterOrPair.R9,
+                    RegisterOrPair.R10,
+                    RegisterOrPair.R11,
+                    RegisterOrPair.R12,
+                    RegisterOrPair.R13,
+                    RegisterOrPair.R14,
+                    RegisterOrPair.R15 -> {
+                        asmgen.out(
+                            """
+                            lda  cx16.${reg.registerOrPair.toString().lowercase()}
                             sta  P8ESTACK_LO,x
-                            dex""")
+                            lda  cx16.${reg.registerOrPair.toString().lowercase()}+1
+                            sta  P8ESTACK_HI,x
+                            dex
+                        """)
                     }
-                    Statusflag.Pz -> {
-                        asmgen.out("""
-                            beq  +
-                            lda  #0
-                            beq  ++
-+                           lda  #1
-+                           sta  P8ESTACK_LO,x
-                            dex""")
-                    }
-                    Statusflag.Pv -> {
-                        asmgen.out("""
-                            bvs  +
-                            lda  #0
-                            beq  ++
-+                           lda  #1
-+                           sta  P8ESTACK_LO,x
-                            dex""")
-                    }
-                    Statusflag.Pn -> {
-                        asmgen.out("""
-                            bmi  +
-                            lda  #0
-                            beq  ++
-+                           lda  #1
-+                           sta  P8ESTACK_LO,x
-                            dex""")
-                    }
-                    null -> {}
                 }
+            } else when(reg.statusflag) {
+                Statusflag.Pc -> {
+                    asmgen.out("""
+                        lda  #0
+                        rol  a
+                        sta  P8ESTACK_LO,x
+                        dex""")
+                }
+                Statusflag.Pz -> {
+                    asmgen.out("""
+                        beq  +
+                        lda  #0
+                        beq  ++
++                           lda  #1
++                           sta  P8ESTACK_LO,x
+                        dex""")
+                }
+                Statusflag.Pv -> {
+                    asmgen.out("""
+                        bvs  +
+                        lda  #0
+                        beq  ++
++                           lda  #1
++                           sta  P8ESTACK_LO,x
+                        dex""")
+                }
+                Statusflag.Pn -> {
+                    asmgen.out("""
+                        bmi  +
+                        lda  #0
+                        beq  ++
++                           lda  #1
++                           sta  P8ESTACK_LO,x
+                        dex""")
+                }
+                null -> {}
             }
         }
     }
@@ -143,7 +136,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
     private fun translateExpression(typecast: TypecastExpression) {
         translateExpressionInternal(typecast.expression)
         when(typecast.expression.inferType(program).getOr(DataType.UNDEFINED)) {
-            DataType.UBYTE -> {
+            DataType.UBYTE, DataType.BOOL -> {
                 when(typecast.type) {
                     DataType.UBYTE, DataType.BYTE -> {}
                     DataType.UWORD, DataType.WORD -> {
@@ -209,7 +202,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
         asmgen.out("  lda  #<$name |  sta  P8ESTACK_LO,x |  lda  #>$name  |  sta  P8ESTACK_HI,x  | dex")
     }
 
-    private fun translateExpression(expr: NumericLiteralValue) {
+    private fun translateExpression(expr: NumericLiteral) {
         when(expr.type) {
             DataType.UBYTE, DataType.BYTE -> asmgen.out(" lda  #${expr.number.toHex()}  | sta  P8ESTACK_LO,x  | dex")
             DataType.UWORD, DataType.WORD -> asmgen.out("""
@@ -220,7 +213,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
                 dex
             """)
             DataType.FLOAT -> {
-                val floatConst = asmgen.getFloatAsmConst(expr.number)
+                val floatConst = allocator.getFloatAsmConst(expr.number)
                 asmgen.out(" lda  #<$floatConst |  ldy  #>$floatConst |  jsr  floats.push_float")
             }
             else -> throw AssemblyError("weird type")
@@ -526,24 +519,56 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
                     val rightVal = expr.right.constValue(program)?.number?.toInt()
                     if(rightVal!=null && rightVal==2) {
                         translateExpressionInternal(expr.left)
-                        when(leftDt) {
-                            DataType.UBYTE -> asmgen.out("  lsr  P8ESTACK_LO+1,x")
-                            DataType.BYTE -> asmgen.out("  lda  P8ESTACK_LO+1,x |  asl  a |  ror  P8ESTACK_LO+1,x")
-                            DataType.UWORD -> asmgen.out("  lsr  P8ESTACK_HI+1,x |  ror  P8ESTACK_LO+1,x")
-                            DataType.WORD -> asmgen.out("  lda  P8ESTACK_HI+1,x |  asl  a |  ror  P8ESTACK_HI+1,x |  ror  P8ESTACK_LO+1,x")
-                            else -> throw AssemblyError("wrong dt")
+                        when (leftDt) {
+                            DataType.UBYTE -> {
+                                asmgen.out("  lsr  P8ESTACK_LO+1,x")
+                            }
+                            DataType.UWORD -> {
+                                asmgen.out("  lsr  P8ESTACK_HI+1,x |  ror  P8ESTACK_LO+1,x")
+                            }
+                            DataType.BYTE -> {
+                                // signed divide using shift needs adjusting of negative value to get correct rounding towards zero
+                                asmgen.out("""
+                                    lda  P8ESTACK_LO+1,x
+                                    bpl  +
+                                    inc  P8ESTACK_LO+1,x
+                                    lda  P8ESTACK_LO+1,x
++                                   asl  a
+                                    ror  P8ESTACK_LO+1,x""")
+                            }
+                            DataType.WORD -> {
+                                // signed divide using shift needs adjusting of negative value to get correct rounding towards zero
+                                asmgen.out("""
+                                    lda  P8ESTACK_HI+1,x
+                                    bpl  ++
+                                    inc  P8ESTACK_LO+1,x
+                                    bne  +
+                                    inc  P8ESTACK_HI+1,x
++                                   lda  P8ESTACK_HI+1,x
++                                   asl  a
+                                    ror  P8ESTACK_HI+1,x
+                                    ror  P8ESTACK_LO+1,x""")
+                            }
+                            else -> throw AssemblyError("weird dt")
                         }
                         return
                     }
                 }
             }
+            in ComparisonOperators -> {
+                if(leftDt in NumericDatatypes && rightDt in NumericDatatypes) {
+                    val rightVal = expr.right.constValue(program)?.number
+                    if(rightVal==0.0)
+                        return translateComparisonWithZero(expr.left, leftDt, expr.operator)
+                }
+            }
         }
 
         if((leftDt in ByteDatatypes && rightDt !in ByteDatatypes)
                 || (leftDt in WordDatatypes && rightDt !in WordDatatypes))
             throw AssemblyError("binary operator ${expr.operator} left/right dt not identical")
 
-        if(leftDt==DataType.STR && rightDt==DataType.STR && expr.operator in comparisonOperators) {
+        if(leftDt==DataType.STR && rightDt==DataType.STR && expr.operator in ComparisonOperators) {
             translateCompareStrings(expr.left, expr.operator, expr.right)
         }
         else {
@@ -559,6 +584,105 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
         }
     }
 
+    private fun translateComparisonWithZero(expr: Expression, dt: DataType, operator: String) {
+        if(expr.isSimple) {
+            if(operator=="!=") {
+                when (dt) {
+                    in ByteDatatypes -> {
+                        asmgen.assignExpressionToRegister(expr, RegisterOrPair.A, dt == DataType.BYTE)
+                        asmgen.out("""
+                            beq  +
+                            lda  #1
++                           sta  P8ESTACK_LO,x
+                            dex""")
+                        return
+                    }
+                    in WordDatatypes -> {
+                        asmgen.assignExpressionToRegister(expr, RegisterOrPair.AY, dt == DataType.WORD)
+                        asmgen.out("""
+                            sty  P8ZP_SCRATCH_B1 
+                            ora  P8ZP_SCRATCH_B1
+                            beq  +
+                            lda  #1
++                           sta  P8ESTACK_LO,x
+                            dex""")
+                        return
+                    }
+                    DataType.FLOAT -> {
+                        asmgen.assignExpressionToRegister(expr, RegisterOrPair.FAC1, true)
+                        asmgen.out("""
+                            jsr  floats.SIGN
+                            sta  P8ESTACK_LO,x
+                            dex""")
+                        return
+                    }
+                    else -> {}
+                }
+            }
+            /* operator == is not worth it to special case, the code is mostly larger */
+        }
+        translateExpressionInternal(expr)
+        when(operator) {
+            "==" -> {
+                when(dt) {
+                    DataType.UBYTE, DataType.BYTE -> asmgen.out("  jsr  prog8_lib.equalzero_b")
+                    DataType.UWORD, DataType.WORD -> asmgen.out("  jsr  prog8_lib.equalzero_w")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.equal_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            "!=" -> {
+                when(dt) {
+                    DataType.UBYTE, DataType.BYTE -> asmgen.out("  jsr  prog8_lib.notequalzero_b")
+                    DataType.UWORD, DataType.WORD -> asmgen.out("  jsr  prog8_lib.notequalzero_w")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.notequal_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            "<" -> {
+                if(dt==DataType.UBYTE || dt==DataType.UWORD)
+                    return translateExpressionInternal(NumericLiteral.fromBoolean(false, expr.position))
+                when(dt) {
+                    DataType.BYTE -> asmgen.out("  jsr  prog8_lib.lesszero_b")
+                    DataType.WORD -> asmgen.out("  jsr  prog8_lib.lesszero_w")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.less_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            ">" -> {
+                when(dt) {
+                    DataType.UBYTE -> asmgen.out("  jsr  prog8_lib.greaterzero_ub")
+                    DataType.BYTE -> asmgen.out("  jsr  prog8_lib.greaterzero_sb")
+                    DataType.UWORD -> asmgen.out("  jsr  prog8_lib.greaterzero_uw")
+                    DataType.WORD -> asmgen.out("  jsr  prog8_lib.greaterzero_sw")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.greater_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            "<=" -> {
+                when(dt) {
+                    DataType.UBYTE -> asmgen.out("  jsr  prog8_lib.equalzero_b")
+                    DataType.BYTE -> asmgen.out("  jsr  prog8_lib.lessequalzeros_b")
+                    DataType.UWORD -> asmgen.out("  jsr  prog8_lib.equalzero_w")
+                    DataType.WORD -> asmgen.out("  jsr  prog8_lib.lessequalzero_sw")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.lessequal_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            ">=" -> {
+                if(dt==DataType.UBYTE || dt==DataType.UWORD)
+                    return translateExpressionInternal(NumericLiteral.fromBoolean(true, expr.position))
+                when(dt) {
+                    DataType.BYTE -> asmgen.out("  jsr  prog8_lib.greaterequalzero_sb")
+                    DataType.WORD -> asmgen.out("  jsr  prog8_lib.greaterequalzero_sw")
+                    DataType.FLOAT -> asmgen.out("  jsr  floats.greaterequal_zero")
+                    else -> throw AssemblyError("wrong dt")
+                }
+            }
+            else -> throw AssemblyError("invalid comparison operator")
+        }
+    }
+
     private fun translateSquared(variable: IdentifierReference, dt: DataType) {
         val asmVar = asmgen.asmVariableName(variable)
         when(dt) {
@@ -601,13 +725,6 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
                     else -> throw AssemblyError("weird type")
                 }
             }
-            "not" -> {
-                when(type) {
-                    in ByteDatatypes -> asmgen.out("  jsr  prog8_lib.not_byte")
-                    in WordDatatypes -> asmgen.out("  jsr  prog8_lib.not_word")
-                    else -> throw AssemblyError("weird type")
-                }
-            }
             else -> throw AssemblyError("invalid prefix operator ${expr.operator}")
         }
     }
@@ -618,6 +735,25 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
             throw AssemblyError("unknown dt")
         val elementDt = elementIDt.getOr(DataType.UNDEFINED)
         val arrayVarName = asmgen.asmVariableName(arrayExpr.arrayvar)
+
+        val arrayVarDecl = arrayExpr.arrayvar.targetVarDecl(program)!!
+        if(arrayVarDecl.datatype==DataType.UWORD) {
+            // indexing a pointer var instead of a real array or string
+            if(elementDt !in ByteDatatypes)
+                throw AssemblyError("non-array var indexing requires bytes dt")
+            if(arrayExpr.inferType(program) isnot DataType.UBYTE)
+                throw AssemblyError("non-array var indexing requires bytes index")
+            asmgen.loadScaledArrayIndexIntoRegister(arrayExpr, elementDt, CpuRegister.Y)
+            if(asmgen.isZpVar(arrayExpr.arrayvar)) {
+                asmgen.out("  lda  ($arrayVarName),y")
+            } else {
+                asmgen.out("  lda  $arrayVarName |  sta  P8ZP_SCRATCH_W1 |  lda  $arrayVarName+1 |  sta  P8ZP_SCRATCH_W1+1")
+                asmgen.out("  lda  (P8ZP_SCRATCH_W1),y")
+            }
+            asmgen.out("  sta  P8ESTACK_LO,x |  dex")
+            return
+        }
+
         val constIndexNum = arrayExpr.indexer.constIndex()
         if(constIndexNum!=null) {
             val indexValue = constIndexNum * program.memsizer.memorySize(elementDt)
@@ -629,7 +765,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
                     asmgen.out("  lda  $arrayVarName+$indexValue |  sta  P8ESTACK_LO,x |  lda  $arrayVarName+$indexValue+1 |  sta  P8ESTACK_HI,x |  dex")
                 }
                 DataType.FLOAT -> {
-                    asmgen.out("  lda  #<$arrayVarName+$indexValue |  ldy  #>$arrayVarName+$indexValue |  jsr  floats.push_float")
+                    asmgen.out("  lda  #<($arrayVarName+$indexValue) |  ldy  #>($arrayVarName+$indexValue) |  jsr  floats.push_float")
                 }
                 else -> throw AssemblyError("weird element type")
             }
@@ -661,7 +797,6 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
 
     private fun translateBinaryOperatorBytes(operator: String, types: DataType) {
         when(operator) {
-            "**" -> throw AssemblyError("** operator requires floats")
             "*" -> asmgen.out("  jsr  prog8_lib.mul_byte")  //  the optimized routines should have been checked earlier
             "/" -> asmgen.out(if(types==DataType.UBYTE) "  jsr  prog8_lib.idiv_ub" else "  jsr  prog8_lib.idiv_b")
             "%" -> {
@@ -694,16 +829,12 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
             "&" -> asmgen.out("  jsr  prog8_lib.bitand_b")
             "^" -> asmgen.out("  jsr  prog8_lib.bitxor_b")
             "|" -> asmgen.out("  jsr  prog8_lib.bitor_b")
-            "and" -> asmgen.out("  jsr  prog8_lib.and_b")
-            "or" -> asmgen.out("  jsr  prog8_lib.or_b")
-            "xor" -> asmgen.out("  jsr  prog8_lib.xor_b")
             else -> throw AssemblyError("invalid operator $operator")
         }
     }
 
     private fun translateBinaryOperatorWords(operator: String, dt: DataType) {
         when(operator) {
-            "**" -> throw AssemblyError("** operator requires floats")
             "*" -> asmgen.out("  jsr  prog8_lib.mul_word")
             "/" -> asmgen.out(if(dt==DataType.UWORD) "  jsr  prog8_lib.idiv_uw" else "  jsr  prog8_lib.idiv_w")
             "%" -> {
@@ -725,19 +856,16 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
             "<=" -> asmgen.out(if(dt==DataType.UWORD) "  jsr  prog8_lib.lesseq_uw" else "  jsr  prog8_lib.lesseq_w")
             ">=" -> asmgen.out(if(dt==DataType.UWORD) "  jsr  prog8_lib.greatereq_uw" else "  jsr  prog8_lib.greatereq_w")
             "==" -> asmgen.out("  jsr  prog8_lib.equal_w")
-            "!=" -> asmgen.out("  jsr  prog8_lib.notequal_w")            "&" -> asmgen.out("  jsr  prog8_lib.bitand_w")
+            "!=" -> asmgen.out("  jsr  prog8_lib.notequal_w")
+            "&" -> asmgen.out("  jsr  prog8_lib.bitand_w")
             "^" -> asmgen.out("  jsr  prog8_lib.bitxor_w")
             "|" -> asmgen.out("  jsr  prog8_lib.bitor_w")
-            "and" -> asmgen.out("  jsr  prog8_lib.and_w")
-            "or" -> asmgen.out("  jsr  prog8_lib.or_w")
-            "xor" -> asmgen.out("  jsr  prog8_lib.xor_w")
             else -> throw AssemblyError("invalid operator $operator")
         }
     }
 
     private fun translateBinaryOperatorFloats(operator: String) {
         when(operator) {
-            "**" -> asmgen.out(" jsr  floats.pow_f")
             "*" -> asmgen.out("  jsr  floats.mul_f")
             "/" -> asmgen.out("  jsr  floats.div_f")
             "+" -> asmgen.out("  jsr  floats.add_f")
@@ -748,7 +876,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge
             ">=" -> asmgen.out("  jsr  floats.greatereq_f")
             "==" -> asmgen.out("  jsr  floats.equal_f")
             "!=" -> asmgen.out("  jsr  floats.notequal_f")
-            "%", "<<", ">>", "&", "^", "|", "and", "or", "xor" -> throw AssemblyError("requires integer datatype")
+            "%", "<<", ">>", "&", "^", "|" -> throw AssemblyError("requires integer datatype")
             else -> throw AssemblyError("invalid operator $operator")
         }
     }

codeGenCpu6502/src/prog8/codegen/cpu6502/ForLoopsAsmGen.kt

@@ -1,28 +1,24 @@
-package prog8.compiler.target.cpu6502.codegen
+package prog8.codegen.cpu6502
 
+import com.github.michaelbull.result.fold
 import prog8.ast.Program
-import prog8.ast.base.ArrayToElementTypes
-import prog8.ast.base.DataType
-import prog8.ast.base.RegisterOrPair
 import prog8.ast.expressions.IdentifierReference
-import prog8.ast.expressions.RangeExpr
+import prog8.ast.expressions.RangeExpression
 import prog8.ast.statements.ForLoop
-import prog8.ast.toHex
-import prog8.compiler.target.AssemblyError
-import prog8.compilerinterface.toConstantIntegerRange
+import prog8.code.core.*
 import kotlin.math.absoluteValue
 
-internal class ForLoopsAsmGen(private val program: Program, private val asmgen: AsmGen) {
+internal class ForLoopsAsmGen(private val program: Program, private val asmgen: AsmGen, private val zeropage: Zeropage) {
 
     internal fun translate(stmt: ForLoop) {
         val iterableDt = stmt.iterable.inferType(program)
         if(!iterableDt.isKnown)
             throw AssemblyError("unknown dt")
         when(stmt.iterable) {
-            is RangeExpr -> {
-                val range = (stmt.iterable as RangeExpr).toConstantIntegerRange()
+            is RangeExpression -> {
+                val range = (stmt.iterable as RangeExpression).toConstantIntegerRange()
                 if(range==null) {
-                    translateForOverNonconstRange(stmt, iterableDt.getOrElse { throw AssemblyError("unknown dt") }, stmt.iterable as RangeExpr)
+                    translateForOverNonconstRange(stmt, iterableDt.getOrElse { throw AssemblyError("unknown dt") }, stmt.iterable as RangeExpression)
                 } else {
                     translateForOverConstRange(stmt, iterableDt.getOrElse { throw AssemblyError("unknown dt") }, range)
                 }
@@ -34,11 +30,11 @@ internal class ForLoopsAsmGen(private val program: Program, private val asmgen:
         }
     }
 
-    private fun translateForOverNonconstRange(stmt: ForLoop, iterableDt: DataType, range: RangeExpr) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
-        val modifiedLabel = asmgen.makeLabel("for_modified")
-        val modifiedLabel2 = asmgen.makeLabel("for_modifiedb")
+    private fun translateForOverNonconstRange(stmt: ForLoop, iterableDt: DataType, range: RangeExpression) {
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
+        val modifiedLabel = program.makeLabel("for_modified")
+        val modifiedLabel2 = program.makeLabel("for_modifiedb")
         asmgen.loopEndLabels.push(endLabel)
         val stepsize=range.step.constValue(program)!!.number.toInt()
 
@@ -242,8 +238,8 @@ $endLabel""")
     }
 
     private fun translateForOverIterableVar(stmt: ForLoop, iterableDt: DataType, ident: IdentifierReference) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         val iterableName = asmgen.asmVariableName(ident)
         val decl = ident.targetVarDecl(program)!!
@@ -267,7 +263,7 @@ $endLabel""")
             }
             DataType.ARRAY_UB, DataType.ARRAY_B -> {
                 val length = decl.arraysize!!.constIndex()!!
-                val indexVar = asmgen.makeLabel("for_index")
+                val indexVar = program.makeLabel("for_index")
                 asmgen.out("""
                     ldy  #0
 $loopLabel          sty  $indexVar
@@ -289,19 +285,21 @@ $loopLabel          sty  $indexVar
                         bne  $loopLabel
                         beq  $endLabel""")
                 }
-                if(length>=16 && asmgen.zeropage.hasByteAvailable()) {
-                    // allocate index var on ZP
-                    val zpAddr = asmgen.zeropage.allocate(indexVar, DataType.UBYTE, stmt.position, asmgen.errors)
-                    asmgen.out("""$indexVar = $zpAddr  ; auto zp UBYTE""")
+                if(length>=16) {
+                    // allocate index var on ZP if possible
+                    val result = zeropage.allocate(listOf(indexVar), DataType.UBYTE, null, stmt.position, asmgen.errors)
+                    result.fold(
+                        success = { (address,_)-> asmgen.out("""$indexVar = $address  ; auto zp UBYTE""") },
+                        failure = { asmgen.out("$indexVar    .byte  0") }
+                    )
                 } else {
-                    asmgen.out("""
-$indexVar           .byte  0""")
+                    asmgen.out("$indexVar    .byte  0")
                 }
                 asmgen.out(endLabel)
             }
             DataType.ARRAY_W, DataType.ARRAY_UW -> {
                 val length = decl.arraysize!!.constIndex()!! * 2
-                val indexVar = asmgen.makeLabel("for_index")
+                val indexVar = program.makeLabel("for_index")
                 val loopvarName = asmgen.asmVariableName(stmt.loopVar)
                 asmgen.out("""
                     ldy  #0
@@ -328,13 +326,15 @@ $loopLabel          sty  $indexVar
                         bne  $loopLabel
                         beq  $endLabel""")
                 }
-                if(length>=16 && asmgen.zeropage.hasByteAvailable()) {
-                    // allocate index var on ZP
-                    val zpAddr = asmgen.zeropage.allocate(indexVar, DataType.UBYTE, stmt.position, asmgen.errors)
-                    asmgen.out("""$indexVar = $zpAddr  ; auto zp UBYTE""")
+                if(length>=16) {
+                    // allocate index var on ZP if possible
+                    val result = zeropage.allocate(listOf(indexVar), DataType.UBYTE, null, stmt.position, asmgen.errors)
+                    result.fold(
+                        success = { (address,_)-> asmgen.out("""$indexVar = $address  ; auto zp UBYTE""") },
+                        failure = { asmgen.out("$indexVar    .byte  0") }
+                    )
                 } else {
-                    asmgen.out("""
-$indexVar           .byte  0""")
+                    asmgen.out("$indexVar    .byte  0")
                 }
                 asmgen.out(endLabel)
             }
@@ -359,8 +359,8 @@ $indexVar           .byte  0""")
         }
 
         // not one of the easy cases, generate more complex code...
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         when(iterableDt) {
             DataType.ARRAY_B, DataType.ARRAY_UB -> {
@@ -471,8 +471,8 @@ $loopLabel""")
     }
 
     private fun translateForSimpleByteRangeAsc(stmt: ForLoop, range: IntProgression) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         val varname = asmgen.asmVariableName(stmt.loopVar)
         asmgen.out("""
@@ -497,8 +497,8 @@ $endLabel""")
     }
 
     private fun translateForSimpleByteRangeDesc(stmt: ForLoop, range: IntProgression) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         val varname = asmgen.asmVariableName(stmt.loopVar)
         asmgen.out("""
@@ -534,8 +534,8 @@ $endLabel""")
     }
 
     private fun translateForSimpleWordRangeAsc(stmt: ForLoop, range: IntProgression) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         val varname = asmgen.asmVariableName(stmt.loopVar)
         asmgen.out("""
@@ -561,8 +561,8 @@ $loopLabel""")
     }
 
     private fun translateForSimpleWordRangeDesc(stmt: ForLoop, range: IntProgression) {
-        val loopLabel = asmgen.makeLabel("for_loop")
-        val endLabel = asmgen.makeLabel("for_end")
+        val loopLabel = program.makeLabel("for_loop")
+        val endLabel = program.makeLabel("for_end")
         asmgen.loopEndLabels.push(endLabel)
         val varname = asmgen.asmVariableName(stmt.loopVar)
         asmgen.out("""
@@ -588,7 +588,7 @@ $loopLabel""")
         asmgen.loopEndLabels.pop()
     }
 
-    private fun assignLoopvar(stmt: ForLoop, range: RangeExpr) =
+    private fun assignLoopvar(stmt: ForLoop, range: RangeExpression) =
         asmgen.assignExpressionToVariable(
             range.from,
             asmgen.asmVariableName(stmt.loopVar),

codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt

@@ -0,0 +1,250 @@
+package prog8.codegen.cpu6502
+
+import prog8.ast.IFunctionCall
+import prog8.ast.Node
+import prog8.ast.Program
+import prog8.ast.expressions.AddressOf
+import prog8.ast.expressions.Expression
+import prog8.ast.expressions.IdentifierReference
+import prog8.ast.expressions.NumericLiteral
+import prog8.ast.statements.FunctionCallStatement
+import prog8.ast.statements.InlineAssembly
+import prog8.ast.statements.Subroutine
+import prog8.ast.statements.SubroutineParameter
+import prog8.code.core.*
+import prog8.codegen.cpu6502.assignment.AsmAssignSource
+import prog8.codegen.cpu6502.assignment.AsmAssignTarget
+import prog8.codegen.cpu6502.assignment.AsmAssignment
+import prog8.codegen.cpu6502.assignment.TargetStorageKind
+
+
+internal class FunctionCallAsmGen(private val program: Program, private val asmgen: AsmGen) {
+
+    internal fun translateFunctionCallStatement(stmt: FunctionCallStatement) {
+        saveXbeforeCall(stmt)
+        translateFunctionCall(stmt, false)
+        restoreXafterCall(stmt)
+        // just ignore any result values from the function call.
+    }
+
+    internal fun saveXbeforeCall(stmt: IFunctionCall) {
+        val sub = stmt.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${stmt.target}")
+        if(sub.shouldSaveX()) {
+            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
+            if(regSaveOnStack)
+                asmgen.saveRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnEntry)
+            else
+                asmgen.saveRegisterLocal(CpuRegister.X, (stmt as Node).definingSubroutine!!)
+        }
+    }
+
+    internal fun restoreXafterCall(stmt: IFunctionCall) {
+        val sub = stmt.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${stmt.target}")
+        if(sub.shouldSaveX()) {
+            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
+            if(regSaveOnStack)
+                asmgen.restoreRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnReturn)
+            else
+                asmgen.restoreRegisterLocal(CpuRegister.X)
+        }
+    }
+
+    internal fun optimizeIntArgsViaRegisters(sub: Subroutine) =
+        (sub.parameters.size==1 && sub.parameters[0].type in IntegerDatatypes)
+                || (sub.parameters.size==2 && sub.parameters[0].type in ByteDatatypes && sub.parameters[1].type in ByteDatatypes)
+
+    internal fun translateFunctionCall(call: IFunctionCall, isExpression: Boolean) {            // TODO remove isExpression unused parameter
+        // Output only the code to set up the parameters and perform the actual call
+        // NOTE: does NOT output the code to deal with the result values!
+        // NOTE: does NOT output code to save/restore the X register for this call! Every caller should deal with this in their own way!!
+        //       (you can use subroutine.shouldSaveX() and saveX()/restoreX() routines as a help for this)
+
+        val sub = call.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${call.target}")
+        val subAsmName = asmgen.asmSymbolName(call.target)
+
+        if(sub.isAsmSubroutine) {
+            argumentsViaRegisters(sub, call)
+            if (sub.inline && asmgen.options.optimize) {
+                // inline the subroutine.
+                // we do this by copying the subroutine's statements at the call site.
+                // NOTE: *if* there is a return statement, it will be the only one, and the very last statement of the subroutine
+                // (this condition has been enforced by an ast check earlier)
+                asmgen.out("  \t; inlined routine follows: ${sub.name}")
+                sub.statements.forEach { asmgen.translate(it as InlineAssembly) }
+                asmgen.out("  \t; inlined routine end: ${sub.name}")
+            } else {
+                asmgen.out("  jsr  $subAsmName")
+            }
+        }
+        else {
+            if(sub.inline)
+                throw AssemblyError("can only reliably inline asmsub routines at this time")
+
+            if(optimizeIntArgsViaRegisters(sub)) {
+                if(sub.parameters.size==1) {
+                    val register = if (sub.parameters[0].type in ByteDatatypes) RegisterOrPair.A else RegisterOrPair.AY
+                    argumentViaRegister(sub, IndexedValue(0, sub.parameters[0]), call.args[0], register)
+                } else {
+                    // 2 byte params, second in Y, first in A
+                    argumentViaRegister(sub, IndexedValue(0, sub.parameters[0]), call.args[0], RegisterOrPair.A)
+                    if(asmgen.needAsaveForExpr(call.args[1]))
+                        asmgen.out("  pha")
+                    argumentViaRegister(sub, IndexedValue(1, sub.parameters[1]), call.args[1], RegisterOrPair.Y)
+                    if(asmgen.needAsaveForExpr(call.args[1]))
+                        asmgen.out("  pla")
+                }
+            } else {
+                // arguments via variables
+                for(arg in sub.parameters.withIndex().zip(call.args))
+                    argumentViaVariable(sub, arg.first.value, arg.second)
+            }
+            asmgen.out("  jsr  $subAsmName")
+        }
+
+        // remember: dealing with the X register and/or dealing with return values is the responsibility of the caller
+    }
+
+    private fun argumentsViaRegisters(sub: Subroutine, call: IFunctionCall) {
+        if(sub.parameters.size==1) {
+            argumentViaRegister(sub, IndexedValue(0, sub.parameters.single()), call.args[0])
+        } else {
+            if(asmsub6502ArgsHaveRegisterClobberRisk(call.args, sub.asmParameterRegisters)) {
+                registerArgsViaCpuStackEvaluation(call, sub)
+            } else {
+                asmsub6502ArgsEvalOrder(sub).forEach {
+                    val param = sub.parameters[it]
+                    val arg = call.args[it]
+                    argumentViaRegister(sub, IndexedValue(it, param), arg)
+                }
+            }
+        }
+    }
+
+    private fun registerArgsViaCpuStackEvaluation(call: IFunctionCall, callee: Subroutine) {
+        // this is called when one or more of the arguments are 'complex' and
+        // cannot be assigned to a register easily or risk clobbering other registers.
+
+        require(callee.isAsmSubroutine)
+        if(callee.parameters.isEmpty())
+            return
+
+        // use the cpu hardware stack as intermediate storage for the arguments.
+        val argOrder = asmsub6502ArgsEvalOrder(callee)
+        argOrder.reversed().forEach {
+            asmgen.pushCpuStack(callee.parameters[it].type, call.args[it])
+        }
+        argOrder.forEach {
+            val param = callee.parameters[it]
+            val targetVar = callee.searchParameter(param.name)!!
+            asmgen.popCpuStack(param.type, targetVar, (call as Node).definingSubroutine)
+        }
+    }
+
+    private fun argumentViaVariable(sub: Subroutine, parameter: SubroutineParameter, value: Expression) {
+        // pass parameter via a regular variable (not via registers)
+        val valueIDt = value.inferType(program)
+        val valueDt = valueIDt.getOrElse { throw AssemblyError("unknown dt") }
+        if(!isArgumentTypeCompatible(valueDt, parameter.type))
+            throw AssemblyError("argument type incompatible")
+
+        val varName = asmgen.asmVariableName(sub.scopedName + parameter.name)
+        asmgen.assignExpressionToVariable(value, varName, parameter.type, sub)
+    }
+
+    private fun argumentViaRegister(sub: Subroutine, parameter: IndexedValue<SubroutineParameter>, value: Expression, registerOverride: RegisterOrPair? = null) {
+        // pass argument via a register parameter
+        val valueIDt = value.inferType(program)
+        val valueDt = valueIDt.getOrElse { throw AssemblyError("unknown dt") }
+        if(!isArgumentTypeCompatible(valueDt, parameter.value.type))
+            throw AssemblyError("argument type incompatible")
+
+        val paramRegister = if(registerOverride==null) sub.asmParameterRegisters[parameter.index] else RegisterOrStatusflag(registerOverride, null)
+        val statusflag = paramRegister.statusflag
+        val register = paramRegister.registerOrPair
+        val requiredDt = parameter.value.type
+        if(requiredDt!=valueDt) {
+            if(valueDt largerThan requiredDt)
+                throw AssemblyError("can only convert byte values to word param types")
+        }
+        if (statusflag!=null) {
+            if(requiredDt!=valueDt)
+                throw AssemblyError("for statusflag, byte value is required")
+            if (statusflag == Statusflag.Pc) {
+                // this param needs to be set last, right before the jsr
+                // for now, this is already enforced on the subroutine definition by the Ast Checker
+                when(value) {
+                    is NumericLiteral -> {
+                        val carrySet = value.number.toInt() != 0
+                        asmgen.out(if(carrySet) "  sec" else "  clc")
+                    }
+                    is IdentifierReference -> {
+                        val sourceName = asmgen.asmVariableName(value)
+                        asmgen.out("""
+                            pha
+                            clc
+                            lda  $sourceName
+                            beq  +
+                            sec  
++                           pla""")
+                    }
+                    else -> {
+                        asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
+                        asmgen.out("""
+                            beq  +
+                            sec
+                            bcs  ++
++                           clc
++""")
+                    }
+                }
+            } else throw AssemblyError("can only use Carry as status flag parameter")
+        }
+        else {
+            // via register or register pair
+            register!!
+            if(requiredDt largerThan valueDt) {
+                // we need to sign extend the source, do this via temporary word variable
+                asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_W1", DataType.UBYTE, sub)
+                asmgen.signExtendVariableLsb("P8ZP_SCRATCH_W1", valueDt)
+                asmgen.assignVariableToRegister("P8ZP_SCRATCH_W1", register)
+            } else {
+                val target: AsmAssignTarget =
+                    if(parameter.value.type in ByteDatatypes && (register==RegisterOrPair.AX || register == RegisterOrPair.AY || register==RegisterOrPair.XY || register in Cx16VirtualRegisters))
+                        AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, parameter.value.type, sub, register = register)
+                    else {
+                        val signed = parameter.value.type == DataType.BYTE || parameter.value.type == DataType.WORD
+                        AsmAssignTarget.fromRegisters(register, signed, sub, asmgen)
+                    }
+                val src = if(valueDt in PassByReferenceDatatypes) {
+                    if(value is IdentifierReference) {
+                        val addr = AddressOf(value, Position.DUMMY)
+                        AsmAssignSource.fromAstSource(addr, program, asmgen).adjustSignedUnsigned(target)
+                    } else {
+                        AsmAssignSource.fromAstSource(value, program, asmgen).adjustSignedUnsigned(target)
+                    }
+                } else {
+                    AsmAssignSource.fromAstSource(value, program, asmgen).adjustSignedUnsigned(target)
+                }
+                asmgen.translateNormalAssignment(AsmAssignment(src, target, false, program.memsizer, Position.DUMMY))
+            }
+        }
+    }
+
+    private fun isArgumentTypeCompatible(argType: DataType, paramType: DataType): Boolean {
+        if(argType isAssignableTo paramType)
+            return true
+        if(argType in ByteDatatypes && paramType in ByteDatatypes)
+            return true
+        if(argType in WordDatatypes && paramType in WordDatatypes)
+            return true
+
+        // we have a special rule for some types.
+        // strings are assignable to UWORD, for example, and vice versa
+        if(argType==DataType.STR && paramType==DataType.UWORD)
+            return true
+        if(argType==DataType.UWORD && paramType == DataType.STR)
+            return true
+
+        return false
+    }
+}

codeGenCpu6502/src/prog8/codegen/cpu6502/PostIncrDecrAsmGen.kt

@@ -1,12 +1,10 @@
-package prog8.compiler.target.cpu6502.codegen
+package prog8.codegen.cpu6502
 
 import prog8.ast.Program
-import prog8.ast.base.*
 import prog8.ast.expressions.IdentifierReference
-import prog8.ast.expressions.NumericLiteralValue
+import prog8.ast.expressions.NumericLiteral
 import prog8.ast.statements.PostIncrDecr
-import prog8.ast.toHex
-import prog8.compiler.target.AssemblyError
+import prog8.code.core.*
 
 
 internal class PostIncrDecrAsmGen(private val program: Program, private val asmgen: AsmGen) {
@@ -41,7 +39,7 @@ internal class PostIncrDecrAsmGen(private val program: Program, private val asmg
             }
             targetMemory!=null -> {
                 when (val addressExpr = targetMemory.addressExpression) {
-                    is NumericLiteralValue -> {
+                    is NumericLiteral -> {
                         val what = addressExpr.number.toHex()
                         asmgen.out(if(incr) "  inc  $what" else "  dec  $what")
                     }
@@ -83,7 +81,7 @@ internal class PostIncrDecrAsmGen(private val program: Program, private val asmg
 """)
                         }
                         DataType.FLOAT -> {
-                            asmgen.out("  lda  #<$asmArrayvarname+$indexValue |  ldy  #>$asmArrayvarname+$indexValue")
+                            asmgen.out("  lda  #<($asmArrayvarname+$indexValue) |  ldy  #>($asmArrayvarname+$indexValue)")
                             asmgen.out(if(incr) "  jsr  floats.inc_var_f" else "  jsr  floats.dec_var_f")
                         }
                         else -> throw AssemblyError("need numeric type")

codeGenCpu6502/src/prog8/codegen/cpu6502/ProgramAndVarsGen.kt

@@ -0,0 +1,673 @@
+package prog8.codegen.cpu6502
+
+import prog8.ast.Program
+import prog8.ast.statements.*
+import prog8.code.*
+import prog8.code.core.*
+import prog8.codegen.cpu6502.assignment.AsmAssignTarget
+import prog8.codegen.cpu6502.assignment.TargetStorageKind
+import prog8.compiler.CallGraph
+import java.time.LocalDate
+import java.time.LocalDateTime
+import kotlin.math.absoluteValue
+
+/**
+ * Generates the main parts of the program:
+ *  - entry/exit code
+ *  - initialization routines
+ *  - blocks
+ *  - subroutines
+ *  - all variables (note: VarDecl ast nodes are *NOT* used anymore for this! now uses IVariablesAndConsts data tables!)
+ */
+internal class ProgramAndVarsGen(
+    val program: Program,
+    val options: CompilationOptions,
+    val errors: IErrorReporter,
+    private val symboltable: SymbolTable,
+    private val functioncallAsmGen: FunctionCallAsmGen,
+    private val asmgen: AsmGen,
+    private val allocator: VariableAllocator,
+    private val zeropage: Zeropage
+) {
+    private val compTarget = options.compTarget
+    private val callGraph = CallGraph(program, true)
+    private val blockVariableInitializers = program.allBlocks.associateWith { it.statements.filterIsInstance<Assignment>() }
+
+    internal fun generate() {
+        val allInitializers = blockVariableInitializers.asSequence().flatMap { it.value }
+        require(allInitializers.all { it.origin==AssignmentOrigin.VARINIT }) {"all block-level assignments must be a variable initializer"}
+
+        header()
+        val allBlocks = program.allBlocks
+        if(allBlocks.first().name != "main")
+            throw AssemblyError("first block should be 'main'")
+
+        if(errors.noErrors())  {
+            program.allBlocks.forEach { block2asm(it) }
+
+            // the global list of all floating point constants for the whole program
+            asmgen.out("; global float constants")
+            for (flt in allocator.globalFloatConsts) {
+                val floatFill = compTarget.machine.getFloatAsmBytes(flt.key)
+                val floatvalue = flt.key
+                asmgen.out("${flt.value}\t.byte  $floatFill  ; float $floatvalue")
+            }
+
+            memorySlabs()
+            footer()
+        }
+    }
+
+    private fun header() {
+        val ourName = this.javaClass.name
+        val cpu = when(compTarget.machine.cpu) {
+            CpuType.CPU6502 -> "6502"
+            CpuType.CPU65c02 -> "w65c02"
+            else -> "unsupported"
+        }
+
+        asmgen.out("; $cpu assembly code for '${program.name}'")
+        asmgen.out("; generated by $ourName on ${LocalDateTime.now().withNano(0)}")
+        asmgen.out("; assembler syntax is for the 64tasm cross-assembler")
+        asmgen.out("; output options: output=${options.output} launcher=${options.launcher} zp=${options.zeropage}")
+        asmgen.out("")
+        asmgen.out(".cpu  '$cpu'\n.enc  'none'\n")
+
+        // the global prog8 variables needed
+        val zp = zeropage
+        asmgen.out("P8ZP_SCRATCH_B1 = ${zp.SCRATCH_B1}")
+        asmgen.out("P8ZP_SCRATCH_REG = ${zp.SCRATCH_REG}")
+        asmgen.out("P8ZP_SCRATCH_W1 = ${zp.SCRATCH_W1}    ; word")
+        asmgen.out("P8ZP_SCRATCH_W2 = ${zp.SCRATCH_W2}    ; word")
+        asmgen.out(".weak")   // hack to allow user to override the following two with command line redefinition (however, just use '-esa' command line option instead!)
+        asmgen.out("P8ESTACK_LO = ${compTarget.machine.ESTACK_LO.toHex()}")
+        asmgen.out("P8ESTACK_HI = ${compTarget.machine.ESTACK_HI.toHex()}")
+        asmgen.out(".endweak")
+
+        if(options.symbolDefs.isNotEmpty()) {
+            asmgen.out("; -- user supplied symbols on the command line")
+            for((name, value) in options.symbolDefs) {
+                asmgen.out("$name = $value")
+            }
+        }
+
+        when(options.output) {
+            OutputType.RAW -> {
+                asmgen.out("; ---- raw assembler program ----")
+                asmgen.out("* = ${options.loadAddress.toHex()}\n")
+            }
+            OutputType.PRG -> {
+                when(options.launcher) {
+                    CbmPrgLauncherType.BASIC -> {
+                        if (options.loadAddress != options.compTarget.machine.PROGRAM_LOAD_ADDRESS) {
+                            errors.err("BASIC output must have load address ${options.compTarget.machine.PROGRAM_LOAD_ADDRESS.toHex()}", program.toplevelModule.position)
+                        }
+                        asmgen.out("; ---- basic program with sys call ----")
+                        asmgen.out("* = ${options.loadAddress.toHex()}")
+                        val year = LocalDate.now().year
+                        asmgen.out("  .word  (+), $year")
+                        asmgen.out("  .null  $9e, format(' %d ', prog8_entrypoint), $3a, $8f, ' prog8'")
+                        asmgen.out("+\t.word  0")
+                        asmgen.out("prog8_entrypoint\t; assembly code starts here\n")
+                        if(!options.noSysInit)
+                            asmgen.out("  jsr  ${compTarget.name}.init_system")
+                        asmgen.out("  jsr  ${compTarget.name}.init_system_phase2")
+                    }
+                    CbmPrgLauncherType.NONE -> {
+                        asmgen.out("; ---- program without basic sys call ----")
+                        asmgen.out("* = ${options.loadAddress.toHex()}\n")
+                        if(!options.noSysInit)
+                            asmgen.out("  jsr  ${compTarget.name}.init_system")
+                        asmgen.out("  jsr  ${compTarget.name}.init_system_phase2")
+                    }
+                }
+            }
+            OutputType.XEX -> {
+                asmgen.out("; ---- atari xex program ----")
+                asmgen.out("* = ${options.loadAddress.toHex()}\n")
+                if(!options.noSysInit)
+                    asmgen.out("  jsr  ${compTarget.name}.init_system")
+                asmgen.out("  jsr  ${compTarget.name}.init_system_phase2")
+            }
+        }
+
+        if(options.zeropage !in arrayOf(ZeropageType.BASICSAFE, ZeropageType.DONTUSE)) {
+            asmgen.out("""
+                ; zeropage is clobbered so we need to reset the machine at exit
+                lda  #>sys.reset_system
+                pha
+                lda  #<sys.reset_system
+                pha""")
+        }
+
+        // make sure that on the cx16 and c64, basic rom is banked in again when we exit the program
+        when(compTarget.name) {
+            "cx16" -> {
+                if(options.floats)
+                    asmgen.out("  lda  #4 |  sta  $01")    // to use floats, make sure Basic rom is banked in
+                asmgen.out("  jsr  main.start")
+                asmgen.out("  jmp  ${compTarget.name}.cleanup_at_exit")
+            }
+            "c64" -> {
+                asmgen.out("  jsr  main.start |  lda  #31 |  sta  $01")
+                if(!options.noSysInit)
+                    asmgen.out("  jmp  ${compTarget.name}.cleanup_at_exit")
+                else
+                    asmgen.out("  rts")
+            }
+            "c128" -> {
+                asmgen.out("  jsr  main.start")
+                // TODO c128: how to bank basic+kernal back in?
+                if(!options.noSysInit)
+                    asmgen.out("  jmp  ${compTarget.name}.cleanup_at_exit")
+                else
+                    asmgen.out("  rts")
+            }
+            else -> asmgen.jmp("main.start")
+        }
+    }
+
+    private fun memorySlabs() {
+        asmgen.out("; memory slabs")
+        asmgen.out("prog8_slabs\t.block")
+        for(slab in symboltable.allMemorySlabs) {
+            if(slab.align>1u)
+                asmgen.out("\t.align  ${slab.align.toHex()}")
+            asmgen.out("${slab.name}\t.fill  ${slab.size}")
+        }
+        asmgen.out("\t.bend")
+    }
+
+    private fun footer() {
+        // program end
+        asmgen.out("prog8_program_end\t; end of program label for progend()")
+    }
+
+    private fun block2asm(block: Block) {
+        asmgen.out("")
+        asmgen.out("; ---- block: '${block.name}' ----")
+        if(block.address!=null)
+            asmgen.out("* = ${block.address!!.toHex()}")
+        else {
+            if("align_word" in block.options())
+                asmgen.out("\t.align 2")
+            else if("align_page" in block.options())
+                asmgen.out("\t.align $100")
+        }
+
+        asmgen.out("${block.name}\t" + (if("force_output" in block.options()) ".block\n" else ".proc\n"))
+        asmgen.outputSourceLine(block)
+
+        createBlockVariables(block)
+        asmsubs2asm(block.statements)
+
+        asmgen.out("")
+        asmgen.out("; subroutines in this block")
+
+        // First translate regular statements, and then put the subroutines at the end.
+        // (regular statements = everything except the initialization assignments;
+        // these will be part of the prog8_init_vars init routine generated below)
+        val initializers = blockVariableInitializers.getValue(block)
+        val statements = block.statements.filterNot { it in initializers }
+        val (subroutine, stmts) = statements.partition { it is Subroutine }
+        stmts.forEach { asmgen.translate(it) }
+        subroutine.forEach { asmgen.translate(it) }
+
+        if(!options.dontReinitGlobals) {
+            // generate subroutine to initialize block-level (global) variables
+            if (initializers.isNotEmpty()) {
+                asmgen.out("prog8_init_vars\t.block\n")
+                initializers.forEach { assign -> asmgen.translate(assign) }
+                asmgen.out("  rts\n  .bend")
+            }
+        }
+
+        asmgen.out(if("force_output" in block.options()) "\n\t.bend\n" else "\n\t.pend\n")
+    }
+
+    private fun getVars(scope: StNode): Map<String, StNode> =
+        scope.children.filter { it.value.type in arrayOf(StNodeType.STATICVAR, StNodeType.CONSTANT, StNodeType.MEMVAR) }
+
+    private fun createBlockVariables(block: Block) {
+        val scope = symboltable.lookupOrElse(block.name) { throw AssemblyError("lookup") }
+        require(scope.type==StNodeType.BLOCK)
+        val varsInBlock = getVars(scope)
+
+        // Zeropage Variables
+        val varnames = varsInBlock.filter { it.value.type==StNodeType.STATICVAR }.map { it.value.scopedName }.toSet()
+        zeropagevars2asm(varnames)
+
+        // MemDefs and Consts
+        val mvs = varsInBlock
+            .filter { it.value.type==StNodeType.MEMVAR }
+            .map { it.value as StMemVar }
+        val consts = varsInBlock
+            .filter { it.value.type==StNodeType.CONSTANT }
+            .map { it.value as StConstant }
+        memdefsAndConsts2asm(mvs, consts)
+
+        // normal statically allocated variables
+        val variables = varsInBlock
+            .filter { it.value.type==StNodeType.STATICVAR && !allocator.isZpVar(it.value.scopedName) }
+            .map { it.value as StStaticVariable }
+        nonZpVariables2asm(variables)
+    }
+
+    internal fun translateSubroutine(sub: Subroutine) {
+        var onlyVariables = false
+
+        if(sub.inline) {
+            if(options.optimize) {
+                if(sub.isAsmSubroutine || callGraph.unused(sub))
+                    return
+
+                // from an inlined subroutine only the local variables are generated,
+                // all other code statements are omitted in the subroutine itself
+                // (they've been inlined at the call site, remember?)
+                onlyVariables = true
+            }
+        }
+
+        asmgen.out("")
+
+        val asmStartScope: String
+        val asmEndScope: String
+        if(sub.definingBlock.options().contains("force_output")) {
+            asmStartScope = ".block"
+            asmEndScope = ".bend"
+        } else {
+            asmStartScope = ".proc"
+            asmEndScope = ".pend"
+        }
+
+        if(sub.isAsmSubroutine) {
+            if(sub.asmAddress!=null)
+                return  // already done at the memvars section
+
+            // asmsub with most likely just an inline asm in it
+            asmgen.out("${sub.name}\t$asmStartScope")
+            sub.statements.forEach { asmgen.translate(it) }
+            asmgen.out("  $asmEndScope\n")
+        } else {
+            // regular subroutine
+            asmgen.out("${sub.name}\t$asmStartScope")
+
+            val scope = symboltable.lookupOrElse(sub.scopedName) { throw AssemblyError("lookup") }
+            require(scope.type==StNodeType.SUBROUTINE)
+            val varsInSubroutine = getVars(scope)
+
+            // Zeropage Variables
+            val varnames = varsInSubroutine.filter { it.value.type==StNodeType.STATICVAR }.map { it.value.scopedName }.toSet()
+            zeropagevars2asm(varnames)
+
+            // MemDefs and Consts
+            val mvs = varsInSubroutine
+                .filter { it.value.type==StNodeType.MEMVAR }
+                .map { it.value as StMemVar }
+            val consts = varsInSubroutine
+                .filter { it.value.type==StNodeType.CONSTANT }
+                .map { it.value as StConstant }
+            memdefsAndConsts2asm(mvs, consts)
+
+            asmsubs2asm(sub.statements)
+
+            // the main.start subroutine is the program's entrypoint and should perform some initialization logic
+            if(sub.name=="start" && sub.definingBlock.name=="main")
+                entrypointInitialization()
+
+            if(functioncallAsmGen.optimizeIntArgsViaRegisters(sub)) {
+                asmgen.out("; simple int arg(s) passed via register(s)")
+                if(sub.parameters.size==1) {
+                    val dt = sub.parameters[0].type
+                    val target = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, dt, sub, variableAsmName = sub.parameters[0].name)
+                    if(dt in ByteDatatypes)
+                        asmgen.assignRegister(RegisterOrPair.A, target)
+                    else
+                        asmgen.assignRegister(RegisterOrPair.AY, target)
+                } else {
+                    require(sub.parameters.size==2)
+                    // 2 simple byte args, first in A, second in Y
+                    val target1 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[0].type, sub, variableAsmName = sub.parameters[0].name)
+                    val target2 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[1].type, sub, variableAsmName = sub.parameters[1].name)
+                    asmgen.assignRegister(RegisterOrPair.A, target1)
+                    asmgen.assignRegister(RegisterOrPair.Y, target2)
+                }
+            }
+
+            if(!onlyVariables) {
+                asmgen.out("; statements")
+                sub.statements.forEach { asmgen.translate(it) }
+            }
+
+            asmgen.out("; variables")
+            val asmGenInfo = asmgen.subroutineExtra(sub)
+            for((dt, name, addr) in asmGenInfo.extraVars) {
+                if(addr!=null)
+                    asmgen.out("$name = $addr")
+                else when(dt) {
+                    DataType.UBYTE -> asmgen.out("$name    .byte  0")
+                    DataType.UWORD -> asmgen.out("$name    .word  0")
+                    else -> throw AssemblyError("weird dt")
+                }
+            }
+            if(asmGenInfo.usedRegsaveA)      // will probably never occur
+                asmgen.out("prog8_regsaveA     .byte  0")
+            if(asmGenInfo.usedRegsaveX)
+                asmgen.out("prog8_regsaveX     .byte  0")
+            if(asmGenInfo.usedRegsaveY)
+                asmgen.out("prog8_regsaveY     .byte  0")
+            if(asmGenInfo.usedFloatEvalResultVar1)
+                asmgen.out("$subroutineFloatEvalResultVar1    .byte  0,0,0,0,0")
+            if(asmGenInfo.usedFloatEvalResultVar2)
+                asmgen.out("$subroutineFloatEvalResultVar2    .byte  0,0,0,0,0")
+
+            // normal statically allocated variables
+            val variables = varsInSubroutine
+                .filter { it.value.type==StNodeType.STATICVAR && !allocator.isZpVar(it.value.scopedName) }
+                .map { it.value as StStaticVariable }
+            nonZpVariables2asm(variables)
+
+            asmgen.out("  $asmEndScope\n")
+        }
+    }
+
+    private fun entrypointInitialization() {
+        asmgen.out("; program startup initialization")
+        asmgen.out("  cld")
+        if(!options.dontReinitGlobals) {
+            blockVariableInitializers.forEach {
+                if (it.value.isNotEmpty())
+                    asmgen.out("  jsr  ${it.key.name}.prog8_init_vars")
+            }
+        }
+
+        // string and array variables in zeropage that have initializer value, should be initialized
+        val stringVarsWithInitInZp = getZpStringVarsWithInitvalue()
+        val arrayVarsWithInitInZp = getZpArrayVarsWithInitvalue()
+        if(stringVarsWithInitInZp.isNotEmpty() || arrayVarsWithInitInZp.isNotEmpty()) {
+            asmgen.out("; zp str and array initializations")
+            stringVarsWithInitInZp.forEach {
+                val name = asmgen.asmVariableName(it.name)
+                asmgen.out("""
+                    lda  #<${name}
+                    ldy  #>${name}
+                    sta  P8ZP_SCRATCH_W1
+                    sty  P8ZP_SCRATCH_W1+1
+                    lda  #<${name}_init_value
+                    ldy  #>${name}_init_value
+                    jsr  prog8_lib.strcpy""")
+            }
+            arrayVarsWithInitInZp.forEach {
+                val size = it.alloc.size
+                val name = asmgen.asmVariableName(it.name)
+                asmgen.out("""
+                    lda  #<${name}_init_value
+                    ldy  #>${name}_init_value
+                    sta  cx16.r0L
+                    sty  cx16.r0H
+                    lda  #<${name}
+                    ldy  #>${name}
+                    sta  cx16.r1L
+                    sty  cx16.r1H
+                    lda  #<$size
+                    ldy  #>$size
+                    jsr  sys.memcopy""")
+            }
+            asmgen.out("  jmp  +")
+        }
+
+        stringVarsWithInitInZp.forEach {
+            val varname = asmgen.asmVariableName(it.name)+"_init_value"
+            outputStringvar(varname, it.value.second, it.value.first)
+        }
+
+        arrayVarsWithInitInZp.forEach {
+            val varname = asmgen.asmVariableName(it.name)+"_init_value"
+            arrayVariable2asm(varname, it.alloc.dt, it.value, null)
+        }
+
+        asmgen.out("""+       tsx
+                    stx  prog8_lib.orig_stackpointer    ; required for sys.exit()                    
+                    ldx  #255       ; init estack ptr
+                    clv
+                    clc""")
+    }
+
+    private class ZpStringWithInitial(
+        val name: List<String>,
+        val alloc: Zeropage.ZpAllocation,
+        val value: Pair<String, Encoding>
+    )
+
+    private class ZpArrayWithInitial(
+        val name: List<String>,
+        val alloc: Zeropage.ZpAllocation,
+        val value: StArray
+    )
+
+    private fun getZpStringVarsWithInitvalue(): Collection<ZpStringWithInitial> {
+        val result = mutableListOf<ZpStringWithInitial>()
+        val vars = allocator.zeropageVars.filter { it.value.dt==DataType.STR }
+        for (variable in vars) {
+            val svar = symboltable.flat.getValue(variable.key) as StStaticVariable
+            if(svar.onetimeInitializationStringValue!=null)
+                result.add(ZpStringWithInitial(variable.key, variable.value, svar.onetimeInitializationStringValue!!))
+        }
+        return result
+    }
+
+    private fun getZpArrayVarsWithInitvalue(): Collection<ZpArrayWithInitial> {
+        val result = mutableListOf<ZpArrayWithInitial>()
+        val vars = allocator.zeropageVars.filter { it.value.dt in ArrayDatatypes }
+        for (variable in vars) {
+            val svar = symboltable.flat.getValue(variable.key) as StStaticVariable
+            if(svar.onetimeInitializationArrayValue!=null)
+                result.add(ZpArrayWithInitial(variable.key, variable.value, svar.onetimeInitializationArrayValue!!))
+        }
+        return result
+    }
+
+    private fun zeropagevars2asm(varNames: Set<List<String>>) {
+        val zpVariables = allocator.zeropageVars.filter { it.key in varNames }
+        for ((scopedName, zpvar) in zpVariables) {
+            if (scopedName.size == 2 && scopedName[0] == "cx16" && scopedName[1][0] == 'r' && scopedName[1][1].isDigit())
+                continue        // The 16 virtual registers of the cx16 are not actual variables in zp, they're memory mapped
+            asmgen.out("${scopedName.last()} \t= ${zpvar.address} \t; zp ${zpvar.dt}")
+        }
+    }
+
+    private fun nonZpVariables2asm(variables: List<StStaticVariable>) {
+        asmgen.out("")
+        asmgen.out("; non-zeropage variables")
+        val (stringvars, othervars) = variables.partition { it.dt==DataType.STR }
+        stringvars.forEach {
+            outputStringvar(it.name, it.onetimeInitializationStringValue!!.second, it.onetimeInitializationStringValue!!.first)
+        }
+        othervars.sortedBy { it.type }.forEach {
+            staticVariable2asm(it)
+        }
+    }
+
+    private fun staticVariable2asm(variable: StStaticVariable) {
+        val name = variable.name
+        val initialValue: Number =
+            if(variable.onetimeInitializationNumericValue!=null) {
+                if(variable.dt== DataType.FLOAT)
+                    variable.onetimeInitializationNumericValue!!
+                else
+                    variable.onetimeInitializationNumericValue!!.toInt()
+            } else 0
+
+        when (variable.dt) {
+            DataType.UBYTE -> asmgen.out("$name\t.byte  ${initialValue.toHex()}")
+            DataType.BYTE -> asmgen.out("$name\t.char  $initialValue")
+            DataType.UWORD -> asmgen.out("$name\t.word  ${initialValue.toHex()}")
+            DataType.WORD -> asmgen.out("$name\t.sint  $initialValue")
+            DataType.FLOAT -> {
+                if(initialValue==0) {
+                    asmgen.out("$name\t.byte  0,0,0,0,0  ; float")
+                } else {
+                    val floatFill = compTarget.machine.getFloatAsmBytes(initialValue)
+                    asmgen.out("$name\t.byte  $floatFill  ; float $initialValue")
+                }
+            }
+            DataType.STR -> {
+                throw AssemblyError("all string vars should have been interned into prog")
+            }
+            in ArrayDatatypes -> arrayVariable2asm(name, variable.dt, variable.onetimeInitializationArrayValue, variable.length)
+            else -> {
+                throw AssemblyError("weird dt")
+            }
+        }
+    }
+
+    private fun arrayVariable2asm(varname: String, dt: DataType, value: StArray?, orNumberOfZeros: Int?) {
+        when(dt) {
+            DataType.ARRAY_UB -> {
+                val data = makeArrayFillDataUnsigned(dt, value, orNumberOfZeros)
+                if (data.size <= 16)
+                    asmgen.out("$varname\t.byte  ${data.joinToString()}")
+                else {
+                    asmgen.out(varname)
+                    for (chunk in data.chunked(16))
+                        asmgen.out("  .byte  " + chunk.joinToString())
+                }
+            }
+            DataType.ARRAY_B -> {
+                val data = makeArrayFillDataSigned(dt, value, orNumberOfZeros)
+                if (data.size <= 16)
+                    asmgen.out("$varname\t.char  ${data.joinToString()}")
+                else {
+                    asmgen.out(varname)
+                    for (chunk in data.chunked(16))
+                        asmgen.out("  .char  " + chunk.joinToString())
+                }
+            }
+            DataType.ARRAY_UW -> {
+                val data = makeArrayFillDataUnsigned(dt, value, orNumberOfZeros)
+                if (data.size <= 16)
+                    asmgen.out("$varname\t.word  ${data.joinToString()}")
+                else {
+                    asmgen.out(varname)
+                    for (chunk in data.chunked(16))
+                        asmgen.out("  .word  " + chunk.joinToString())
+                }
+            }
+            DataType.ARRAY_W -> {
+                val data = makeArrayFillDataSigned(dt, value, orNumberOfZeros)
+                if (data.size <= 16)
+                    asmgen.out("$varname\t.sint  ${data.joinToString()}")
+                else {
+                    asmgen.out(varname)
+                    for (chunk in data.chunked(16))
+                        asmgen.out("  .sint  " + chunk.joinToString())
+                }
+            }
+            DataType.ARRAY_F -> {
+                val array = value ?: zeroFilledArray(orNumberOfZeros!!)
+                val floatFills = array.map {
+                    compTarget.machine.getFloatAsmBytes(it.number!!)
+                }
+                asmgen.out(varname)
+                for (f in array.zip(floatFills))
+                    asmgen.out("  .byte  ${f.second}  ; float ${f.first}")
+            }
+            else -> throw AssemblyError("require array dt")
+        }
+    }
+
+    private fun zeroFilledArray(numElts: Int): StArray {
+        val values = mutableListOf<StArrayElement>()
+        repeat(numElts) {
+            values.add(StArrayElement(0.0, null))
+        }
+        return values
+    }
+
+    private fun memdefsAndConsts2asm(memvars: Collection<StMemVar>, consts: Collection<StConstant>) {
+        memvars.forEach {
+            asmgen.out("  ${it.name} = ${it.address.toHex()}")
+        }
+        consts.forEach {
+            if(it.dt==DataType.FLOAT)
+                asmgen.out("  ${it.name} = ${it.value}")
+            else
+                asmgen.out("  ${it.name} = ${it.value.toHex()}")
+        }
+    }
+
+    private fun asmsubs2asm(statements: List<Statement>) {
+        statements
+            .filter { it is Subroutine && it.isAsmSubroutine && it.asmAddress!=null }
+            .forEach { asmsub ->
+                asmsub as Subroutine
+                asmgen.out("  ${asmsub.name} = ${asmsub.asmAddress!!.toHex()}")
+            }
+    }
+
+    private fun outputStringvar(varname: String, encoding: Encoding, value: String) {
+        asmgen.out("$varname\t; $encoding:\"${value.escape().replace("\u0000", "<NULL>")}\"", false)
+        val bytes = compTarget.encodeString(value, encoding).plus(0.toUByte())
+        val outputBytes = bytes.map { "$" + it.toString(16).padStart(2, '0') }
+        for (chunk in outputBytes.chunked(16))
+            asmgen.out("  .byte  " + chunk.joinToString())
+    }
+
+    private fun makeArrayFillDataUnsigned(dt: DataType, value: StArray?, orNumberOfZeros: Int?): List<String> {
+        val array = value ?: zeroFilledArray(orNumberOfZeros!!)
+        return when (dt) {
+            DataType.ARRAY_UB ->
+                // byte array can never contain pointer-to types, so treat values as all integers
+                array.map {
+                    val number = it.number!!.toInt()
+                    "$"+number.toString(16).padStart(2, '0')
+                }
+            DataType.ARRAY_UW -> array.map {
+                if(it.number!=null) {
+                    "$" + it.number!!.toInt().toString(16).padStart(4, '0')
+                }
+                else if(it.addressOf!=null) {
+                    asmgen.asmSymbolName(it.addressOf!!)
+                }
+                else
+                    throw AssemblyError("weird array elt")
+            }
+            else -> throw AssemblyError("invalid dt")
+        }
+    }
+
+    private fun makeArrayFillDataSigned(dt: DataType, value: StArray?, orNumberOfZeros: Int?): List<String> {
+        val array = value ?: zeroFilledArray(orNumberOfZeros!!)
+        return when (dt) {
+            // byte array can never contain pointer-to types, so treat values as all integers
+            DataType.ARRAY_UB ->
+                array.map {
+                    val number = it.number!!.toInt()
+                    "$"+number.toString(16).padStart(2, '0')
+                }
+            DataType.ARRAY_B ->
+                array.map {
+                    val number = it.number!!.toInt()
+                    val hexnum = number.absoluteValue.toString(16).padStart(2, '0')
+                    if(number>=0)
+                        "$$hexnum"
+                    else
+                        "-$$hexnum"
+                }
+            DataType.ARRAY_UW -> array.map {
+                val number = it.number!!.toInt()
+                "$" + number.toString(16).padStart(4, '0')
+            }
+            DataType.ARRAY_W -> array.map {
+                val number = it.number!!.toInt()
+                val hexnum = number.absoluteValue.toString(16).padStart(4, '0')
+                if(number>=0)
+                    "$$hexnum"
+                else
+                    "-$$hexnum"
+            }
+            else -> throw AssemblyError("invalid dt")
+        }
+    }
+
+}

codeGenCpu6502/src/prog8/codegen/cpu6502/VariableAllocator.kt

@@ -0,0 +1,129 @@
+package prog8.codegen.cpu6502
+
+import com.github.michaelbull.result.fold
+import com.github.michaelbull.result.onSuccess
+import prog8.code.StNode
+import prog8.code.StNodeType
+import prog8.code.StStaticVariable
+import prog8.code.SymbolTable
+import prog8.code.core.*
+
+
+internal class VariableAllocator(private val symboltable: SymbolTable,
+                                 private val options: CompilationOptions,
+                                 private val errors: IErrorReporter
+) {
+
+    private val zeropage = options.compTarget.machine.zeropage
+    internal val globalFloatConsts = mutableMapOf<Double, String>()     // all float values in the entire program (value -> varname)
+    internal val zeropageVars: Map<List<String>, Zeropage.ZpAllocation> = zeropage.allocatedVariables
+
+    init {
+        allocateZeropageVariables()
+    }
+
+    internal fun isZpVar(scopedName: List<String>) = scopedName in zeropage.allocatedVariables
+
+    internal fun getFloatAsmConst(number: Double): String {
+        val asmName = globalFloatConsts[number]
+        if(asmName!=null)
+            return asmName
+
+        val newName = "prog8_float_const_${globalFloatConsts.size}"
+        globalFloatConsts[number] = newName
+        return newName
+    }
+
+    /**
+     * Allocate variables into the Zeropage.
+     * The result should be retrieved from the current machine's zeropage object!
+     */
+    private fun allocateZeropageVariables() {
+        if(options.zeropage== ZeropageType.DONTUSE)
+            return
+
+        val allVariables = collectAllVariables(symboltable)
+
+        val numberOfAllocatableVariables = allVariables.size
+        val varsRequiringZp = allVariables.filter { it.zpwish == ZeropageWish.REQUIRE_ZEROPAGE }
+        val varsPreferringZp = allVariables.filter { it.zpwish == ZeropageWish.PREFER_ZEROPAGE }
+        val varsDontCare = allVariables.filter { it.zpwish == ZeropageWish.DONTCARE }
+        val numberOfExplicitNonZpVariables = allVariables.count { it.zpwish == ZeropageWish.NOT_IN_ZEROPAGE }
+        require(varsDontCare.size + varsRequiringZp.size + varsPreferringZp.size + numberOfExplicitNonZpVariables == numberOfAllocatableVariables)
+
+        var numVariablesAllocatedInZP = 0
+        var numberOfNonIntegerVariables = 0
+
+        varsRequiringZp.forEach { variable ->
+            val result = zeropage.allocate(
+                variable.scopedName,
+                variable.dt,
+                variable.length,
+                variable.position,
+                errors
+            )
+            result.fold(
+                success = {
+                    numVariablesAllocatedInZP++
+                },
+                failure = {
+                    errors.err(it.message!!, variable.position)
+                }
+            )
+        }
+
+        if(errors.noErrors()) {
+            varsPreferringZp.forEach { variable ->
+                val result = zeropage.allocate(
+                    variable.scopedName,
+                    variable.dt,
+                    variable.length,
+                    variable.position,
+                    errors
+                )
+                result.onSuccess { numVariablesAllocatedInZP++ }
+                //  no need to check for allocation error, if there is one, just allocate in normal system ram.
+            }
+
+            // try to allocate any other interger variables into the zeropage until it is full.
+            // TODO some form of intelligent priorization? most often used variables first? loopcounter vars first? ...?
+            if(errors.noErrors()) {
+                for (variable in varsDontCare.sortedBy { it.scopedName.size }) {
+                    if(variable.dt in IntegerDatatypes) {
+                        if(zeropage.free.isEmpty()) {
+                            break
+                        } else {
+                            val result = zeropage.allocate(
+                                variable.scopedName,
+                                variable.dt,
+                                variable.length,
+                                variable.position,
+                                errors
+                            )
+                            result.onSuccess { numVariablesAllocatedInZP++ }
+                        }
+                    } else
+                        numberOfNonIntegerVariables++
+                }
+            }
+        }
+
+//        println("  number of allocated vars: $numberOfAllocatableVariables")
+//        println("  put into zeropage: $numVariablesAllocatedInZP,  non-zp allocatable: ${numberOfNonIntegerVariables+numberOfExplicitNonZpVariables}")
+//        println("  zeropage free space: ${zeropage.free.size} bytes")
+    }
+
+    private fun collectAllVariables(st: SymbolTable): Collection<StStaticVariable> {
+        val vars = mutableListOf<StStaticVariable>()
+        fun collect(node: StNode) {
+            for(child in node.children) {
+                if(child.value.type == StNodeType.STATICVAR)
+                    vars.add(child.value as StStaticVariable)
+                else
+                    collect(child.value)
+            }
+        }
+        collect(st)
+        return vars
+    }
+}

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AsmAssignment.kt

@@ -1,12 +1,13 @@
-package prog8.compiler.target.cpu6502.codegen.assignment
+package prog8.codegen.cpu6502.assignment
 
 import prog8.ast.Program
-import prog8.ast.base.*
 import prog8.ast.expressions.*
-import prog8.ast.statements.*
-import prog8.compilerinterface.IMemSizer
-import prog8.compiler.target.AssemblyError
-import prog8.compiler.target.cpu6502.codegen.AsmGen
+import prog8.ast.statements.AssignTarget
+import prog8.ast.statements.Assignment
+import prog8.ast.statements.DirectMemoryWrite
+import prog8.ast.statements.Subroutine
+import prog8.code.core.*
+import prog8.codegen.cpu6502.AsmGen
 
 
 internal enum class TargetStorageKind {
@@ -28,7 +29,6 @@ internal enum class SourceStorageKind {
 }
 
 internal class AsmAssignTarget(val kind: TargetStorageKind,
-                               private val program: Program,
                                private val asmgen: AsmGen,
                                val datatype: DataType,
                                val scope: Subroutine?,
@@ -39,7 +39,6 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
                                val origAstTarget: AssignTarget? = null
                                )
 {
-    val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toUInt() ?: 0u}
     val constArrayIndexValue by lazy { array?.indexer?.constIndex()?.toUInt() }
     val asmVarname: String by lazy {
         if (array == null)
@@ -70,28 +69,28 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
                                 if(reg.statusflag!=null)
                                     throw AssemblyError("can't assign value to processor statusflag directly")
                                 else
-                                    return AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, dt, assign.definingSubroutine, register=reg.registerOrPair, origAstTarget = this)
+                                    return AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, dt, assign.definingSubroutine, register=reg.registerOrPair, origAstTarget = this)
                             }
                         }
-                        return AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget =  this)
+                        return AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget =  this)
                     }
-                    arrayindexed != null -> return AsmAssignTarget(TargetStorageKind.ARRAY, program, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget =  this)
-                    memoryAddress != null -> return AsmAssignTarget(TargetStorageKind.MEMORY, program, asmgen, dt, assign.definingSubroutine, memory =  memoryAddress, origAstTarget =  this)
+                    arrayindexed != null -> return AsmAssignTarget(TargetStorageKind.ARRAY, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget =  this)
+                    memoryAddress != null -> return AsmAssignTarget(TargetStorageKind.MEMORY, asmgen, dt, assign.definingSubroutine, memory =  memoryAddress, origAstTarget =  this)
                     else -> throw AssemblyError("weird target")
                 }
             }
         }
 
-        fun fromRegisters(registers: RegisterOrPair, signed: Boolean, scope: Subroutine?, program: Program, asmgen: AsmGen): AsmAssignTarget =
+        fun fromRegisters(registers: RegisterOrPair, signed: Boolean, scope: Subroutine?, asmgen: AsmGen): AsmAssignTarget =
                 when(registers) {
                     RegisterOrPair.A,
                     RegisterOrPair.X,
-                    RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.BYTE else DataType.UBYTE, scope, register = registers)
+                    RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, if(signed) DataType.BYTE else DataType.UBYTE, scope, register = registers)
                     RegisterOrPair.AX,
                     RegisterOrPair.AY,
-                    RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
+                    RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
                     RegisterOrPair.FAC1,
-                    RegisterOrPair.FAC2 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.FLOAT, scope, register = registers)
+                    RegisterOrPair.FAC2 -> AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, DataType.FLOAT, scope, register = registers)
                     RegisterOrPair.R0,
                     RegisterOrPair.R1,
                     RegisterOrPair.R2,
@@ -107,7 +106,7 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
                     RegisterOrPair.R12,
                     RegisterOrPair.R13,
                     RegisterOrPair.R14,
-                    RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
+                    RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers)
                 }
     }
 }
@@ -120,13 +119,10 @@ internal class AsmAssignSource(val kind: SourceStorageKind,
                                val array: ArrayIndexedExpression? = null,
                                val memory: DirectMemoryRead? = null,
                                val register: RegisterOrPair? = null,
-                               val number: NumericLiteralValue? = null,
+                               val number: NumericLiteral? = null,
                                val expression: Expression? = null
 )
 {
-    val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toUInt() ?: 0u}
-    val constArrayIndexValue by lazy { array?.indexer?.constIndex()?.toUInt() }
-
     val asmVarname: String
         get() = if(array==null)
             variableAsmName!!
@@ -134,17 +130,15 @@ internal class AsmAssignSource(val kind: SourceStorageKind,
             asmgen.asmVariableName(array.arrayvar)
 
     companion object {
-        fun fromAstSource(indexer: ArrayIndex, program: Program, asmgen: AsmGen): AsmAssignSource = fromAstSource(indexer.indexExpr, program, asmgen)
-
         fun fromAstSource(value: Expression, program: Program, asmgen: AsmGen): AsmAssignSource {
             val cv = value.constValue(program)
             if(cv!=null)
                 return AsmAssignSource(SourceStorageKind.LITERALNUMBER, program, asmgen, cv.type, number = cv)
 
             return when(value) {
-                is NumericLiteralValue -> throw AssemblyError("should have been constant value")
-                is StringLiteralValue -> throw AssemblyError("string literal value should not occur anymore for asm generation")
-                is ArrayLiteralValue -> throw AssemblyError("array literal value should not occur anymore for asm generation")
+                is NumericLiteral -> throw AssemblyError("should have been constant value")
+                is StringLiteral -> throw AssemblyError("string literal value should not occur anymore for asm generation")
+                is ArrayLiteral -> throw AssemblyError("array literal value should not occur anymore for asm generation")
                 is IdentifierReference -> {
                     val parameter = value.targetVarDecl(program)?.subroutineParameter
                     if(parameter!=null && parameter.definingSubroutine!!.isAsmSubroutine)
@@ -167,26 +161,20 @@ internal class AsmAssignSource(val kind: SourceStorageKind,
                     val dt = value.inferType(program).getOrElse { throw AssemblyError("unknown dt") }
                     AsmAssignSource(SourceStorageKind.ARRAY, program, asmgen, dt, array = value)
                 }
-                is FunctionCall -> {
-                    when (val sub = value.target.targetStatement(program)) {
-                        is Subroutine -> {
-                            val returnType = sub.returntypes.zip(sub.asmReturnvaluesRegisters).firstOrNull { rr -> rr.second.registerOrPair != null || rr.second.statusflag!=null }?.first
-                                    ?: throw AssemblyError("can't translate zero return values in assignment")
+                is BuiltinFunctionCall -> {
+                    val returnType = value.inferType(program)
+                    AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, returnType.getOrElse { throw AssemblyError("unknown dt") }, expression = value)
+                }
+                is FunctionCallExpression -> {
+                    val sub = value.target.targetSubroutine(program)!!
+                    val returnType = sub.returntypes.zip(sub.asmReturnvaluesRegisters).firstOrNull { rr -> rr.second.registerOrPair != null || rr.second.statusflag!=null }?.first
+                            ?: throw AssemblyError("can't translate zero return values in assignment")
 
-                            AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, returnType, expression = value)
-                        }
-                        is BuiltinFunctionStatementPlaceholder -> {
-                            val returnType = value.inferType(program)
-                            AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, returnType.getOrElse { throw AssemblyError("unknown dt") }, expression = value)
-                        }
-                        else -> {
-                            throw AssemblyError("weird call")
-                        }
-                    }
+                    AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, returnType, expression = value)
                 }
                 else -> {
-                    val dt = value.inferType(program)
-                    AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, dt.getOrElse { throw AssemblyError("unknown dt") }, expression = value)
+                    val returnType = value.inferType(program)
+                    AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, returnType.getOrElse { throw AssemblyError("unknown dt") }, expression = value)
                 }
             }
         }

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt

@@ -1,18 +1,18 @@
-package prog8.compiler.target.cpu6502.codegen.assignment
+package prog8.codegen.cpu6502.assignment
 
 import prog8.ast.Program
-import prog8.ast.base.*
+import prog8.ast.base.FatalAstException
 import prog8.ast.expressions.*
 import prog8.ast.statements.Subroutine
-import prog8.ast.toHex
-import prog8.compiler.target.AssemblyError
-import prog8.compiler.target.cpu6502.codegen.AsmGen
-import prog8.compilerinterface.CpuType
+import prog8.code.core.*
+import prog8.codegen.cpu6502.AsmGen
+import prog8.codegen.cpu6502.VariableAllocator
 
 
 internal class AugmentableAssignmentAsmGen(private val program: Program,
                                            private val assignmentAsmGen: AssignmentAsmGen,
-                                           private val asmgen: AsmGen
+                                           private val asmgen: AsmGen,
+                                           private val allocator: VariableAllocator
 ) {
     fun translate(assign: AsmAssignment) {
         require(assign.isAugmentable)
@@ -21,14 +21,10 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         when (val value = assign.source.expression!!) {
             is PrefixExpression -> {
                 // A = -A , A = +A, A = ~A, A = not A
-                val target = assignmentAsmGen.virtualRegsToVariables(assign.target)
-                val itype = value.inferType(program)
-                val type = itype.getOrElse { throw AssemblyError("unknown dt") }
                 when (value.operator) {
                     "+" -> {}
-                    "-" -> inplaceNegate(target, type)
-                    "~" -> inplaceInvert(target, type)
-                    "not" -> inplaceBooleanNot(target, type)
+                    "-" -> inplaceNegate(assign)
+                    "~" -> inplaceInvert(assign)
                     else -> throw AssemblyError("invalid prefix operator")
                 }
             }
@@ -45,7 +41,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             return inplaceModification(target, binExpr.operator, binExpr.right)
         }
 
-        if (binExpr.operator in associativeOperators) {
+        if (binExpr.operator in AssociativeOperators) {
             if (binExpr.right isSameAs astTarget) {
                 // A = 5 <operator> A
                 return inplaceModification(target, binExpr.operator, binExpr.left)
@@ -111,7 +107,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             }
             if(leftBinExpr.right isSameAs astTarget) {
                 // X = (Left <oper> X) <oper> Something
-                if(leftBinExpr.operator in associativeOperators) {
+                if(leftBinExpr.operator in AssociativeOperators) {
                     inplaceModification(target, leftBinExpr.operator, leftBinExpr.left)
                     inplaceModification(target, binExpr.operator, binExpr.right)
                     return
@@ -123,7 +119,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         if(leftBinExpr==null && rightBinExpr!=null) {
             if(rightBinExpr.left isSameAs astTarget) {
                 // X = Something <oper> (X <oper> Right)
-                if(binExpr.operator in associativeOperators) {
+                if(binExpr.operator in AssociativeOperators) {
                     inplaceModification(target, rightBinExpr.operator, rightBinExpr.right)
                     inplaceModification(target, binExpr.operator, binExpr.left)
                     return
@@ -133,7 +129,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             }
             if(rightBinExpr.right isSameAs astTarget) {
                 // X = Something <oper> (Left <oper> X)
-                if(binExpr.operator in associativeOperators && rightBinExpr.operator in associativeOperators) {
+                if(binExpr.operator in AssociativeOperators && rightBinExpr.operator in AssociativeOperators) {
                     inplaceModification(target, rightBinExpr.operator, rightBinExpr.left)
                     inplaceModification(target, binExpr.operator, binExpr.left)
                     return
@@ -160,7 +156,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             origValue
         }
 
-        val valueLv = (value as? NumericLiteralValue)?.number
+        val valueLv = (value as? NumericLiteral)?.number
         val ident = value as? IdentifierReference
         val memread = value as? DirectMemoryRead
 
@@ -173,7 +169,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             ident != null -> inplaceModification_byte_variable_to_variable(target.asmVarname, target.datatype, operator, ident)
                             memread != null -> inplaceModification_byte_memread_to_variable(target.asmVarname, target.datatype, operator, memread)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                 inplaceModification_byte_value_to_variable(target.asmVarname, target.datatype, operator, value)
                             }
                             else -> inplaceModification_byte_value_to_variable(target.asmVarname, target.datatype, operator, value)
@@ -185,7 +181,8 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             ident != null -> inplaceModification_word_variable_to_variable(target.asmVarname, target.datatype, operator, ident)
                             memread != null -> inplaceModification_word_memread_to_variable(target.asmVarname, target.datatype, operator, memread)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator))
+                                    return
                                 inplaceModification_word_value_to_variable(target.asmVarname, target.datatype, operator, value)
                             }
                             else -> inplaceModification_word_value_to_variable(target.asmVarname, target.datatype, operator, value)
@@ -196,7 +193,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             valueLv != null -> inplaceModification_float_litval_to_variable(target.asmVarname, operator, valueLv.toDouble(), target.scope!!)
                             ident != null -> inplaceModification_float_variable_to_variable(target.asmVarname, operator, ident, target.scope!!)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                 inplaceModification_float_value_to_variable(target.asmVarname, operator, value, target.scope!!)
                             }
                             else -> inplaceModification_float_value_to_variable(target.asmVarname, operator, value, target.scope!!)
@@ -208,15 +205,15 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             TargetStorageKind.MEMORY -> {
                 val memory = target.memory!!
                 when (memory.addressExpression) {
-                    is NumericLiteralValue -> {
-                        val addr = (memory.addressExpression as NumericLiteralValue).number.toInt()
+                    is NumericLiteral -> {
+                        val addr = (memory.addressExpression as NumericLiteral).number.toInt()
                         // re-use code to assign a variable, instead this time, use a direct memory address
                         when {
                             valueLv != null -> inplaceModification_byte_litval_to_variable(addr.toHex(), DataType.UBYTE, operator, valueLv.toInt())
                             ident != null -> inplaceModification_byte_variable_to_variable(addr.toHex(), DataType.UBYTE, operator, ident)
                             memread != null -> inplaceModification_byte_memread_to_variable(addr.toHex(), DataType.UBYTE, operator, value)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                 inplaceModification_byte_value_to_variable(addr.toHex(), DataType.UBYTE, operator, value)
                             }
                             else -> inplaceModification_byte_value_to_variable(addr.toHex(), DataType.UBYTE, operator, value)
@@ -228,7 +225,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             valueLv != null -> inplaceModification_byte_litval_to_pointer(pointer, operator, valueLv.toInt())
                             ident != null -> inplaceModification_byte_variable_to_pointer(pointer, operator, ident)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                 inplaceModification_byte_value_to_pointer(pointer, operator, value)
                             }
                             else -> inplaceModification_byte_value_to_pointer(pointer, operator, value)
@@ -236,14 +233,14 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     }
                     else -> {
                         // TODO use some other evaluation here; don't use the estack to transfer the address to read/write from
-                        asmgen.assignExpressionTo(memory.addressExpression, AsmAssignTarget(TargetStorageKind.STACK, program, asmgen, DataType.UWORD, memory.definingSubroutine))
+                        asmgen.assignExpressionTo(memory.addressExpression, AsmAssignTarget(TargetStorageKind.STACK, asmgen, DataType.UWORD, memory.definingSubroutine))
                         asmgen.out("  jsr  prog8_lib.read_byte_from_address_on_stack |  sta  P8ZP_SCRATCH_B1")
                         when {
                             valueLv != null -> inplaceModification_byte_litval_to_variable("P8ZP_SCRATCH_B1", DataType.UBYTE, operator, valueLv.toInt())
                             ident != null -> inplaceModification_byte_variable_to_variable("P8ZP_SCRATCH_B1", DataType.UBYTE, operator, ident)
                             memread != null -> inplaceModification_byte_memread_to_variable("P8ZP_SCRATCH_B1", DataType.UBYTE, operator, memread)
                             value is TypecastExpression -> {
-                                if (tryRemoveRedundantCast(value, target, operator)) return
+                                if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                 inplaceModification_byte_value_to_variable("P8ZP_SCRATCH_B1", DataType.UBYTE, operator, value)
                             }
                             else -> inplaceModification_byte_value_to_variable("P8ZP_SCRATCH_B1", DataType.UBYTE, operator, value)
@@ -254,7 +251,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
             }
             TargetStorageKind.ARRAY -> {
                 with(target.array!!.indexer) {
-                    val indexNum = indexExpr as? NumericLiteralValue
+                    val indexNum = indexExpr as? NumericLiteral
                     val indexVar = indexExpr as? IdentifierReference
                     when {
                         indexNum!=null -> {
@@ -266,7 +263,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         ident != null -> inplaceModification_byte_variable_to_variable(targetVarName, target.datatype, operator, ident)
                                         memread != null -> inplaceModification_byte_memread_to_variable(targetVarName, target.datatype, operator, memread)
                                         value is TypecastExpression -> {
-                                            if (tryRemoveRedundantCast(value, target, operator)) return
+                                            if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                             inplaceModification_byte_value_to_variable(targetVarName, target.datatype, operator, value)
                                         }
                                         else -> inplaceModification_byte_value_to_variable(targetVarName, target.datatype, operator, value)
@@ -278,7 +275,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         ident != null -> inplaceModification_word_variable_to_variable(targetVarName, target.datatype, operator, ident)
                                         memread != null -> inplaceModification_word_memread_to_variable(targetVarName, target.datatype, operator, memread)
                                         value is TypecastExpression -> {
-                                            if (tryRemoveRedundantCast(value, target, operator)) return
+                                            if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                             inplaceModification_word_value_to_variable(targetVarName, target.datatype, operator, value)
                                         }
                                         else -> inplaceModification_word_value_to_variable(targetVarName, target.datatype, operator, value)
@@ -289,7 +286,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         valueLv != null -> inplaceModification_float_litval_to_variable(targetVarName, operator, valueLv.toDouble(), target.scope!!)
                                         ident != null -> inplaceModification_float_variable_to_variable(targetVarName, operator, ident, target.scope!!)
                                         value is TypecastExpression -> {
-                                            if (tryRemoveRedundantCast(value, target, operator)) return
+                                            if (tryInplaceModifyWithRemovedRedundantCast(value, target, operator)) return
                                             inplaceModification_float_value_to_variable(targetVarName, operator, value, target.scope!!)
                                         }
                                         else -> inplaceModification_float_value_to_variable(targetVarName, operator, value, target.scope!!)
@@ -305,7 +302,6 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         AsmAssignTarget.fromRegisters(
                                             RegisterOrPair.A,
                                             target.datatype == DataType.BYTE, null,
-                                            program,
                                             asmgen
                                         )
                                     val assign = AsmAssignment(target.origAssign.source, tgt, false, program.memsizer, value.position)
@@ -317,7 +313,6 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         AsmAssignTarget.fromRegisters(
                                             RegisterOrPair.AY,
                                             target.datatype == DataType.WORD, null,
-                                            program,
                                             asmgen
                                         )
                                     val assign = AsmAssignment(target.origAssign.source, tgt, false, program.memsizer, value.position)
@@ -329,7 +324,6 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                         AsmAssignTarget.fromRegisters(
                                             RegisterOrPair.FAC1,
                                             true, null,
-                                            program,
                                             asmgen
                                         )
                                     val assign = AsmAssignment(target.origAssign.source, tgt, false, program.memsizer, value.position)
@@ -348,7 +342,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         }
     }
 
-    private fun tryRemoveRedundantCast(value: TypecastExpression, target: AsmAssignTarget, operator: String): Boolean {
+    private fun tryInplaceModifyWithRemovedRedundantCast(value: TypecastExpression, target: AsmAssignTarget, operator: String): Boolean {
         if (target.datatype == value.type) {
             val childIDt = value.expression.inferType(program)
             val childDt = childIDt.getOrElse { throw AssemblyError("unknown dt") }
@@ -390,9 +384,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     bne  -
 +""")
             }
-            "&", "and" -> asmgen.out(" and  P8ZP_SCRATCH_B1")
-            "|", "or" -> asmgen.out(" ora  P8ZP_SCRATCH_B1")
-            "^", "xor" -> asmgen.out(" eor  P8ZP_SCRATCH_B1")
+            "&" -> asmgen.out(" and  P8ZP_SCRATCH_B1")
+            "|" -> asmgen.out(" ora  P8ZP_SCRATCH_B1")
+            "^" -> asmgen.out(" eor  P8ZP_SCRATCH_B1")
             else -> throw AssemblyError("invalid operator for in-place modification $operator")
         }
         asmgen.storeAIntoZpPointerVar(sourceName)
@@ -427,9 +421,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         bne  -
 +""")
             }
-            "&", "and" -> asmgen.out(" and  $otherName")
-            "|", "or" -> asmgen.out(" ora  $otherName")
-            "^", "xor" -> asmgen.out(" eor  $otherName")
+            "&" -> asmgen.out(" and  $otherName")
+            "|" -> asmgen.out(" ora  $otherName")
+            "^" -> asmgen.out(" eor  $otherName")
             else -> throw AssemblyError("invalid operator for in-place modification $operator")
         }
         asmgen.storeAIntoZpPointerVar(sourceName)
@@ -484,17 +478,17 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     asmgen.storeAIntoZpPointerVar(sourceName)
                 }
             }
-            "&", "and" -> {
+            "&" -> {
                 val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
                 asmgen.out("  and  #$value")
                 asmgen.storeAIntoZpPointerVar(sourceName)
             }
-            "|", "or" -> {
+            "|"-> {
                 val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
                 asmgen.out("  ora  #$value")
                 asmgen.storeAIntoZpPointerVar(sourceName)
             }
-            "^", "xor" -> {
+            "^" -> {
                 val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
                 asmgen.out("  eor  #$value")
                 asmgen.storeAIntoZpPointerVar(sourceName)
@@ -562,18 +556,38 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
 +""")
                 }
             }
-            "&", "and" -> {
+            "&" -> {
                 asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                 asmgen.out("  and  $name |  sta  $name")
             }
-            "|", "or" -> {
+            "|" -> {
                 asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                 asmgen.out("  ora  $name |  sta  $name")
             }
-            "^", "xor" -> {
+            "^" -> {
                 asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                 asmgen.out("  eor  $name |  sta  $name")
             }
+            "==" -> {
+                asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
+                asmgen.out("""
+                    cmp  $name
+                    beq  +
+                    lda  #0
+                    beq  ++
++                   lda  #1
++                   sta  $name""")
+            }
+            "!=" -> {
+                asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
+                asmgen.out("""
+                    cmp  $name
+                    beq  +
+                    lda  #1
+                    bne  ++
++                   lda  #0
++                   sta  $name""")
+            }
             else -> throw AssemblyError("invalid operator for in-place modification $operator")
         }
     }
@@ -628,9 +642,29 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
 +""")
                 }
             }
-            "&", "and" -> asmgen.out(" lda  $name |  and  $otherName |  sta  $name")
-            "|", "or" -> asmgen.out(" lda  $name |  ora  $otherName |  sta  $name")
-            "^", "xor" -> asmgen.out(" lda  $name |  eor  $otherName |  sta  $name")
+            "&" -> asmgen.out(" lda  $name |  and  $otherName |  sta  $name")
+            "|" -> asmgen.out(" lda  $name |  ora  $otherName |  sta  $name")
+            "^" -> asmgen.out(" lda  $name |  eor  $otherName |  sta  $name")
+            "==" -> {
+                asmgen.out("""
+                    lda  $otherName
+                    cmp  $name
+                    beq  +
+                    lda  #0
+                    bne  ++
++                   lda  #1
++                   sta  $name""")
+            }
+            "!=" -> {
+                asmgen.out("""
+                    lda  $otherName
+                    cmp  $name
+                    beq  +
+                    lda  #1
+                    bne  ++
++                   lda  #0
++                   sta  $name""")
+            }
             else -> throw AssemblyError("invalid operator for in-place modification $operator")
         }
     }
@@ -699,9 +733,29 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     }
                 }
             }
-            "&", "and" -> asmgen.out(" lda  $name |  and  #$value |  sta  $name")
-            "|", "or" -> asmgen.out(" lda  $name |  ora  #$value |  sta  $name")
-            "^", "xor" -> asmgen.out(" lda  $name |  eor  #$value |  sta  $name")
+            "&" -> asmgen.out(" lda  $name |  and  #$value |  sta  $name")
+            "|" -> asmgen.out(" lda  $name |  ora  #$value |  sta  $name")
+            "^" -> asmgen.out(" lda  $name |  eor  #$value |  sta  $name")
+            "==" -> {
+                asmgen.out("""
+                    lda  $name
+                    cmp  #$value
+                    beq  +
+                    lda  #0
+                    beq  ++
++                   lda  #1
++                   sta  $name""")
+            }
+            "!=" -> {
+                asmgen.out("""
+                    lda  $name
+                    cmp  #$value
+                    beq  +
+                    lda  #1
+                    bne  ++
++                   lda  #0
++                   sta  $name""")
+            }
             else -> throw AssemblyError("invalid operator for in-place modification $operator")
         }
     }
@@ -724,15 +778,15 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     sbc  P8ZP_SCRATCH_B1
                     sta  $name""")
             }
-            "|", "or" -> {
+            "|" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  ora  $name  |  sta  $name")
             }
-            "&", "and" -> {
+            "&" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  and  $name  |  sta  $name")
             }
-            "^", "xor" -> {
+            "^" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  eor  $name  |  sta  $name")
             }
@@ -767,11 +821,11 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     dec  $name+1
 +""")
             }
-            "|", "or" -> {
+            "|" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  ora  $name  |  sta  $name")
             }
-            "&", "and" -> {
+            "&" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  and  $name  |  sta  $name")
                 if(dt in WordDatatypes) {
@@ -781,7 +835,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         asmgen.out("  lda  #0 |  sta  $name+1")
                 }
             }
-            "^", "xor" -> {
+            "^" -> {
                 asmgen.translateDirectMemReadExpressionToRegAorStack(memread, false)
                 asmgen.out("  eor  $name  |  sta  $name")
             }
@@ -998,7 +1052,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     }
                 }
             }
-            "&", "and" -> {
+            "&" -> {
                 when {
                     value == 0 -> {
                         if(asmgen.isTargetCpu(CpuType.CPU65c02))
@@ -1006,6 +1060,18 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         else
                             asmgen.out("  lda  #0 |  sta  $name |  sta  $name+1")
                     }
+                    value == 0x00ff -> {
+                        if(asmgen.isTargetCpu(CpuType.CPU65c02))
+                            asmgen.out("  stz  $name+1")
+                        else
+                            asmgen.out("  lda  #0 |  sta  $name+1")
+                    }
+                    value == 0xff00 -> {
+                        if(asmgen.isTargetCpu(CpuType.CPU65c02))
+                            asmgen.out("  stz  $name")
+                        else
+                            asmgen.out("  lda  #0 |  sta  $name")
+                    }
                     value and 255 == 0 -> {
                         if(asmgen.isTargetCpu(CpuType.CPU65c02))
                             asmgen.out("  stz  $name")
@@ -1023,7 +1089,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     else -> asmgen.out("  lda  $name |  and  #<$value |  sta  $name |  lda  $name+1 |  and  #>$value |  sta  $name+1")
                 }
             }
-            "|", "or" -> {
+            "|" -> {
                 when {
                     value == 0 -> {}
                     value and 255 == 0 -> asmgen.out("  lda  $name+1 |  ora  #>$value |  sta  $name+1")
@@ -1031,7 +1097,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     else -> asmgen.out("  lda  $name |  ora  #<$value |  sta  $name |  lda  $name+1 |  ora  #>$value |  sta  $name+1")
                 }
             }
-            "^", "xor" -> {
+            "^" -> {
                 when {
                     value == 0 -> {}
                     value and 255 == 0 -> asmgen.out("  lda  $name+1 |  eor  #>$value |  sta  $name+1")
@@ -1085,33 +1151,38 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
 +""")
                         else
                             asmgen.out("""
-                                ldy  #0
+                                ldy  #255
                                 lda  $otherName
                                 bpl  +
-                                dey     ; sign extend
-+                               sty  P8ZP_SCRATCH_B1
-                                lda  $name
+                                iny     ; sign extend
++                               eor  #255
                                 sec
-                                sbc  $otherName
+                                adc  $name
                                 sta  $name
-                                lda  $name+1
-                                sbc  P8ZP_SCRATCH_B1
+                                tya
+                                adc  $name+1
                                 sta  $name+1""")
                     }
                     "*" -> {
-                        asmgen.out("  lda  $otherName |  sta  P8ZP_SCRATCH_W1")
-                        if(asmgen.isTargetCpu(CpuType.CPU65c02))
-                            asmgen.out("  stz  P8ZP_SCRATCH_W1+1")
-                        else
-                            asmgen.out("  lda  #0 |  sta  P8ZP_SCRATCH_W1+1")
+                        if(valueDt==DataType.UBYTE) {
+                            asmgen.out("  lda  $otherName |  sta  P8ZP_SCRATCH_W1")
+                            if(asmgen.isTargetCpu(CpuType.CPU65c02))
+                                asmgen.out("  stz  P8ZP_SCRATCH_W1+1")
+                            else
+                                asmgen.out("  lda  #0 |  sta  P8ZP_SCRATCH_W1+1")
+                        } else {
+                            asmgen.out("  lda  $otherName")
+                            asmgen.signExtendAYlsb(valueDt)
+                            asmgen.out("  sta  P8ZP_SCRATCH_W1 |  sty  P8ZP_SCRATCH_W1+1")
+                        }
                         asmgen.out("""
-                            lda  $name
-                            ldy  $name+1
-                            jsr  math.multiply_words
-                            lda  math.multiply_words.result
-                            sta  $name
-                            lda  math.multiply_words.result+1
-                            sta  $name+1""")
+                                lda  $name
+                                ldy  $name+1
+                                jsr  math.multiply_words
+                                lda  math.multiply_words.result
+                                sta  $name
+                                lda  math.multiply_words.result+1
+                                sta  $name+1""")
                     }
                     "/" -> {
                         if(dt==DataType.UWORD) {
@@ -1190,7 +1261,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
 +""")
                         }
                     }
-                    "&", "and" -> {
+                    "&" -> {
                         asmgen.out("  lda  $otherName |  and  $name |  sta  $name")
                         if(dt in WordDatatypes) {
                             if(asmgen.isTargetCpu(CpuType.CPU65c02))
@@ -1199,8 +1270,8 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                 asmgen.out("  lda  #0 |  sta  $name+1")
                         }
                     }
-                    "|", "or" -> asmgen.out("  lda  $otherName |  ora  $name |  sta  $name")
-                    "^", "xor" -> asmgen.out("  lda  $otherName |  eor  $name |  sta  $name")
+                    "|" -> asmgen.out("  lda  $otherName |  ora  $name |  sta  $name")
+                    "^" -> asmgen.out("  lda  $otherName |  eor  $name |  sta  $name")
                     else -> throw AssemblyError("invalid operator for in-place modification $operator")
                 }
             }
@@ -1271,9 +1342,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         """)
                     }
                     "<<", ">>" -> throw AssemblyError("shift by a word value not supported, max is a byte")
-                    "&", "and" -> asmgen.out(" lda  $name |  and  $otherName |  sta  $name |  lda  $name+1 |  and  $otherName+1 |  sta  $name+1")
-                    "|", "or" -> asmgen.out(" lda  $name |  ora  $otherName |  sta  $name |  lda  $name+1 |  ora  $otherName+1 |  sta  $name+1")
-                    "^", "xor" -> asmgen.out(" lda  $name |  eor  $otherName |  sta  $name |  lda  $name+1 |  eor  $otherName+1 |  sta  $name+1")
+                    "&" -> asmgen.out(" lda  $name |  and  $otherName |  sta  $name |  lda  $name+1 |  and  $otherName+1 |  sta  $name+1")
+                    "|" -> asmgen.out(" lda  $name |  ora  $otherName |  sta  $name |  lda  $name+1 |  ora  $otherName+1 |  sta  $name+1")
+                    "^" -> asmgen.out(" lda  $name |  eor  $otherName |  sta  $name |  lda  $name+1 |  eor  $otherName+1 |  sta  $name+1")
                     else -> throw AssemblyError("invalid operator for in-place modification $operator")
                 }
             }
@@ -1367,29 +1438,28 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                 sta  $name+1""")
                     }
                     "-" -> {
-                        asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_REG", valueDt, null)
+                        asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_B1", valueDt, null)
                         if(valueDt==DataType.UBYTE)
                             asmgen.out("""
                                 lda  $name
                                 sec
-                                sbc  P8ZP_SCRATCH_REG
+                                sbc  P8ZP_SCRATCH_B1
                                 sta  $name
                                 bcs  +
                                 dec  $name+1
 +""")
                         else
                             asmgen.out("""
-                                ldy  #0
-                                lda  P8ZP_SCRATCH_REG
+                                ldy  #255
+                                lda  P8ZP_SCRATCH_B1
                                 bpl  +
-                                dey         ; sign extend
-+                               sty  P8ZP_SCRATCH_B1
-                                lda  $name
+                                iny         ; sign extend
++                               eor  #255
                                 sec
-                                sbc  P8ZP_SCRATCH_REG
+                                adc  $name
                                 sta  $name
-                                lda  $name+1
-                                sbc  P8ZP_SCRATCH_B1
+                                tya
+                                adc  $name+1
                                 sta  $name+1""")
                     }
                     "*" -> {
@@ -1444,7 +1514,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             bne  -
 +""")
                     }
-                    "&", "and" -> {
+                    "&" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                         asmgen.out("  and  $name |  sta  $name")
                         if(dt in WordDatatypes) {
@@ -1454,11 +1524,11 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                                 asmgen.out("  lda  #0 |  sta  $name+1")
                         }
                     }
-                    "|", "or" -> {
+                    "|" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                         asmgen.out("  ora  $name |  sta  $name")
                     }
-                    "^", "xor" -> {
+                    "^" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
                         asmgen.out("  eor  $name |  sta  $name")
                     }
@@ -1490,15 +1560,15 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         remainderVarByWordInAY()
                     }
                     "<<", ">>" -> throw AssemblyError("shift by a word value not supported, max is a byte")
-                    "&", "and" -> {
+                    "&" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.AY)
                         asmgen.out("  and  $name |  sta  $name |  tya |  and  $name+1 |  sta  $name+1")
                     }
-                    "|", "or" -> {
+                    "|" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.AY)
                         asmgen.out("  ora  $name |  sta  $name |  tya |  ora  $name+1 |  sta  $name+1")
                     }
-                    "^", "xor" -> {
+                    "^" -> {
                         asmgen.assignExpressionToRegister(value, RegisterOrPair.AY)
                         asmgen.out("  eor  $name |  sta  $name |  tya |  eor  $name+1 |  sta  $name+1")
                     }
@@ -1513,14 +1583,6 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         asmgen.assignExpressionToRegister(value, RegisterOrPair.FAC1)
         asmgen.saveRegisterLocal(CpuRegister.X, scope)
         when (operator) {
-            "**" -> {
-                asmgen.out("""
-                    lda  #<$name
-                    ldy  #>$name
-                    jsr  floats.CONUPK
-                    jsr  floats.FPWRT
-                """)
-            }
             "+" -> {
                 asmgen.out("""
                     lda  #<$name
@@ -1567,28 +1629,6 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         val otherName = asmgen.asmVariableName(ident)
         asmgen.saveRegisterLocal(CpuRegister.X, scope)
         when (operator) {
-            "**" -> {
-                if(asmgen.haveFPWR()) {
-                    asmgen.out("""
-                        lda  #<$name
-                        ldy  #>$name
-                        jsr  floats.CONUPK
-                        lda  #<$otherName
-                        ldy  #>$otherName
-                        jsr  floats.FPWR
-                    """)
-                } else
-                    // cx16 doesn't have FPWR() only FPWRT()
-                    asmgen.out("""
-                        lda  #<$name
-                        ldy  #>$name
-                        jsr  floats.CONUPK
-                        lda  #<$otherName
-                        ldy  #>$otherName
-                        jsr  floats.MOVFM
-                        jsr  floats.FPWRT
-                    """)
-            }
             "+" -> {
                 asmgen.out("""
                     lda  #<$name
@@ -1641,31 +1681,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
     }
 
     private fun inplaceModification_float_litval_to_variable(name: String, operator: String, value: Double, scope: Subroutine) {
-        val constValueName = asmgen.getFloatAsmConst(value)
+        val constValueName = allocator.getFloatAsmConst(value)
         asmgen.saveRegisterLocal(CpuRegister.X, scope)
         when (operator) {
-            "**" -> {
-                if(asmgen.haveFPWR()) {
-                    asmgen.out("""
-                        lda  #<$name
-                        ldy  #>$name
-                        jsr  floats.CONUPK
-                        lda  #<$constValueName
-                        ldy  #>$constValueName
-                        jsr  floats.FPWR
-                    """)
-                } else
-                    // cx16 doesn't have FPWR() only FPWRT()
-                    asmgen.out("""
-                        lda  #<$name
-                        ldy  #>$name
-                        jsr  floats.CONUPK
-                        lda  #<$constValueName
-                        ldy  #>$constValueName
-                        jsr  floats.MOVFM
-                        jsr  floats.FPWRT
-                    """)
-            }
             "+" -> {
                 if (value == 0.0)
                     return
@@ -1775,138 +1793,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         }
     }
 
-    internal fun inplaceBooleanNot(target: AsmAssignTarget, dt: DataType) {
-        when (dt) {
-            DataType.UBYTE -> {
-                when (target.kind) {
-                    TargetStorageKind.VARIABLE -> {
-                        asmgen.out("""
-                            lda  ${target.asmVarname}
-                            beq  +
-                            lda  #1
-+                           eor  #1
-                            sta  ${target.asmVarname}""")
-                    }
-                    TargetStorageKind.MEMORY -> {
-                        val mem = target.memory!!
-                        when (mem.addressExpression) {
-                            is NumericLiteralValue -> {
-                                val addr = (mem.addressExpression as NumericLiteralValue).number.toHex()
-                                asmgen.out("""
-                                    lda  $addr
-                                    beq  +
-                                    lda  #1
-+                                   eor  #1
-                                    sta  $addr""")
-                            }
-                            is IdentifierReference -> {
-                                val sourceName = asmgen.loadByteFromPointerIntoA(mem.addressExpression as IdentifierReference)
-                                asmgen.out("""
-                                    beq  +
-                                    lda  #1
-+                                   eor  #1""")
-                                asmgen.storeAIntoZpPointerVar(sourceName)
-                            }
-                            else -> {
-                                asmgen.assignExpressionToVariable(mem.addressExpression, "P8ZP_SCRATCH_W2", DataType.UWORD, target.scope)
-                                asmgen.loadAFromZpPointerVar("P8ZP_SCRATCH_W2")
-                                asmgen.out("""
-                                    beq  +
-                                    lda  #1
-+                                   eor  #1""")
-                                asmgen.storeAIntoZpPointerVar("P8ZP_SCRATCH_W2")
-                            }
-                        }
-                    }
-                    TargetStorageKind.REGISTER -> {
-                        when(target.register!!) {
-                            RegisterOrPair.A -> asmgen.out("""
-                                cmp  #0
-                                beq  +
-                                lda  #1
-    +                           eor  #1""")
-                            RegisterOrPair.X -> asmgen.out("""
-                                txa
-                                beq  +
-                                lda  #1
-    +                           eor  #1
-                                tax""")
-                            RegisterOrPair.Y -> asmgen.out("""
-                                tya
-                                beq  +
-                                lda  #1
-    +                           eor  #1
-                                tay""")
-                            else -> throw AssemblyError("invalid reg dt for byte not")
-                        }
-                    }
-                    TargetStorageKind.STACK -> TODO("no asm gen for byte stack not")
-                    else -> throw AssemblyError("no asm gen for in-place not of ubyte ${target.kind}")
-                }
-            }
-            DataType.UWORD -> {
-                when (target.kind) {
-                    TargetStorageKind.VARIABLE -> {
-                        asmgen.out("""
-                            lda  ${target.asmVarname}
-                            ora  ${target.asmVarname}+1
-                            beq  +
-                            lda  #1
-+                           eor  #1
-                            sta  ${target.asmVarname}
-                            lsr  a
-                            sta  ${target.asmVarname}+1""")
-                    }
-                    TargetStorageKind.REGISTER -> {
-                        when(target.register!!) {
-                            RegisterOrPair.AX -> {
-                                asmgen.out("""
-                                    stx  P8ZP_SCRATCH_REG
-                                    ora  P8ZP_SCRATCH_REG
-                                    beq  +
-                                    lda  #0
-                                    tax
-                                    beq  ++
-        +                           lda  #1
-        +""")
-                            }
-                            RegisterOrPair.AY -> {
-                                asmgen.out("""
-                                    sty  P8ZP_SCRATCH_REG
-                                    ora  P8ZP_SCRATCH_REG
-                                    beq  +
-                                    lda  #0
-                                    tay
-                                    beq  ++
-        +                           lda  #1
-        +""")
-                            }
-                            RegisterOrPair.XY -> {
-                                asmgen.out("""
-                                    stx  P8ZP_SCRATCH_REG
-                                    tya
-                                    ora  P8ZP_SCRATCH_REG
-                                    beq  +
-                                    ldy  #0
-                                    ldx  #0
-                                    beq  ++
-        +                           ldx  #1
-        +""")
-                            }
-                            in Cx16VirtualRegisters -> throw AssemblyError("cx16 virtual regs should be variables, not real registers")
-                            else -> throw AssemblyError("invalid reg dt for word not")
-                        }
-                    }
-                    TargetStorageKind.STACK -> TODO("no asm gen for word stack not")
-                    else -> throw AssemblyError("no asm gen for in-place not of uword for ${target.kind}")
-                }
-            }
-            else -> throw AssemblyError("boolean-not of invalid type")
-        }
-    }
-
-    internal fun inplaceInvert(target: AsmAssignTarget, dt: DataType) {
-        when (dt) {
+    internal fun inplaceInvert(assign: AsmAssignment) {
+        val target = assign.target
+        when (assign.target.datatype) {
             DataType.UBYTE -> {
                 when (target.kind) {
                     TargetStorageKind.VARIABLE -> {
@@ -1918,8 +1807,8 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                     TargetStorageKind.MEMORY -> {
                         val memory = target.memory!!
                         when (memory.addressExpression) {
-                            is NumericLiteralValue -> {
-                                val addr = (memory.addressExpression as NumericLiteralValue).number.toHex()
+                            is NumericLiteral -> {
+                                val addr = (memory.addressExpression as NumericLiteral).number.toHex()
                                 asmgen.out("""
                                     lda  $addr
                                     eor  #255
@@ -1949,7 +1838,8 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         }
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for byte stack invert")
-                    else -> throw AssemblyError("no asm gen for in-place invert ubyte for ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.UWORD -> {
@@ -1973,15 +1863,17 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         }
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for word stack invert")
-                    else -> throw AssemblyError("no asm gen for in-place invert uword for ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             else -> throw AssemblyError("invert of invalid type")
         }
     }
 
-    internal fun inplaceNegate(target: AsmAssignTarget, dt: DataType) {
-        when (dt) {
+    internal fun inplaceNegate(assign: AsmAssignment) {
+        val target = assign.target
+        when (assign.target.datatype) {
             DataType.BYTE -> {
                 when (target.kind) {
                     TargetStorageKind.VARIABLE -> {
@@ -2005,9 +1897,10 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             else -> throw AssemblyError("invalid reg dt for byte negate")
                         }
                     }
-                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't in-place negate")
+                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't negate that")
                     TargetStorageKind.STACK -> TODO("no asm gen for byte stack negate")
-                    else -> throw AssemblyError("no asm gen for in-place negate byte")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.WORD -> {
@@ -2026,52 +1919,59 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         when(target.register!!) { //P8ZP_SCRATCH_REG
                             RegisterOrPair.AX -> {
                                 asmgen.out("""
-                                    sta  P8ZP_SCRATCH_REG
-                                    stx  P8ZP_SCRATCH_REG+1
-                                    lda  #0
                                     sec
-                                    sbc  P8ZP_SCRATCH_REG
+                                    eor  #255
+                                    adc  #0
                                     pha
-                                    lda  #0
-                                    sbc  P8ZP_SCRATCH_REG+1
+                                    txa
+                                    eor  #255
+                                    adc  #0
                                     tax
                                     pla""")
                             }
                             RegisterOrPair.AY -> {
                                 asmgen.out("""
-                                    sta  P8ZP_SCRATCH_REG
-                                    sty  P8ZP_SCRATCH_REG+1
-                                    lda  #0
                                     sec
-                                    sbc  P8ZP_SCRATCH_REG
+                                    eor  #255
+                                    adc  #0
                                     pha
-                                    lda  #0
-                                    sbc  P8ZP_SCRATCH_REG+1
+                                    tya
+                                    eor  #255
+                                    adc  #0
                                     tay
                                     pla""")
                             }
                             RegisterOrPair.XY -> {
                                 asmgen.out("""
-                                    stx  P8ZP_SCRATCH_REG
-                                    sty  P8ZP_SCRATCH_REG+1
-                                    lda  #0
                                     sec
-                                    sbc  P8ZP_SCRATCH_REG
+                                    txa
+                                    eor  #255
+                                    adc  #0
                                     tax
-                                    lda  #0
-                                    sbc  P8ZP_SCRATCH_REG+1
+                                    tya
+                                    eor  #255
+                                    adc  #0
                                     tay""")
                             }
                             in Cx16VirtualRegisters -> throw AssemblyError("cx16 virtual regs should be variables, not real registers")
                             else -> throw AssemblyError("invalid reg dt for word neg")
                         }
                     }
+                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't negate that")
                     TargetStorageKind.STACK -> TODO("no asm gen for word stack negate")
-                    else -> throw AssemblyError("no asm gen for in-place negate word")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.FLOAT -> {
                 when (target.kind) {
+                    TargetStorageKind.REGISTER -> {
+                        when(target.register!!) {
+                            RegisterOrPair.FAC1 -> asmgen.out("  jsr  floats.NEGOP")
+                            RegisterOrPair.FAC2 -> asmgen.out("  jsr  floats.MOVFA |  jsr floats.NEGOP |  jsr  floats.MOVEF")
+                            else -> throw AssemblyError("invalid float register")
+                        }
+                    }
                     TargetStorageKind.VARIABLE -> {
                         // simply flip the sign bit in the float
                         asmgen.out("""
@@ -2081,10 +1981,11 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         """)
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for float stack negate")
-                    else -> throw AssemblyError("weird target kind for inplace negate float ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target for in-place float negation")
                 }
             }
-            else -> throw AssemblyError("negate of invalid type $dt")
+            else -> throw AssemblyError("negate of invalid type")
         }
     }
 

codeGenExperimental/build.gradle

@@ -0,0 +1,47 @@
+
+plugins {
+    id 'java'
+    id 'application'
+    id "org.jetbrains.kotlin.jvm"
+}
+
+java {
+    toolchain {
+        languageVersion = JavaLanguageVersion.of(javaVersion)
+    }
+}
+
+compileKotlin {
+    kotlinOptions {
+        jvmTarget = javaVersion
+    }
+}
+
+compileTestKotlin {
+    kotlinOptions {
+        jvmTarget = javaVersion
+    }
+}
+
+dependencies {
+    implementation project(':codeCore')
+    implementation project(':intermediate')
+    implementation project(':codeGenIntermediate')
+    implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
+    // implementation "org.jetbrains.kotlin:kotlin-reflect"
+    implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"
+
+}
+
+sourceSets {
+    main {
+        java {
+            srcDirs = ["${project.projectDir}/src"]
+        }
+        resources {
+            srcDirs = ["${project.projectDir}/res"]
+        }
+    }
+}
+
+// note: there are no unit tests in this module!

codeGenExperimental/codeGenExperimental.iml

@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<module type="JAVA_MODULE" version="4">
+  <component name="NewModuleRootManager" inherit-compiler-output="true">
+    <exclude-output />
+    <content url="file://$MODULE_DIR$">
+      <sourceFolder url="file://$MODULE_DIR$/src" isTestSource="false" />
+      <excludeFolder url="file://$MODULE_DIR$/build" />
+    </content>
+    <orderEntry type="inheritedJdk" />
+    <orderEntry type="sourceFolder" forTests="false" />
+    <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
+    <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
+    <orderEntry type="module" module-name="codeGenIntermediate" />
+    <orderEntry type="module" module-name="intermediate" />
+    <orderEntry type="module" module-name="codeCore" />
+  </component>
+</module>

codeGenExperimental/src/prog8/codegen/experimental/CodeGen.kt

@@ -0,0 +1,30 @@
+package prog8.codegen.experimental
+
+import prog8.code.SymbolTable
+import prog8.code.ast.PtProgram
+import prog8.code.core.CompilationOptions
+import prog8.code.core.IAssemblyGenerator
+import prog8.code.core.IAssemblyProgram
+import prog8.code.core.IErrorReporter
+import prog8.codegen.intermediate.IRCodeGen
+import prog8.intermediate.IRFileWriter
+
+class CodeGen(private val program: PtProgram,
+              private val symbolTable: SymbolTable,
+              private val options: CompilationOptions,
+              private val errors: IErrorReporter
+): IAssemblyGenerator {
+    override fun compileToAssembly(): IAssemblyProgram? {
+
+        // you could write a code generator directly on the PtProgram AST,
+        // but you can also use the Intermediate Representation to build a codegen on:
+        val irCodeGen = IRCodeGen(program, symbolTable, options, errors)
+        val irProgram = irCodeGen.generate()
+
+        // this stub only writes the IR program to disk but doesn't generate anything else.
+        IRFileWriter(irProgram, null).write()
+
+        println("** experimental codegen stub: no assembly generated **")
+        return null
+    }
+}

codeGenIntermediate/build.gradle

@@ -0,0 +1,63 @@
+
+plugins {
+    id 'java'
+    id 'application'
+    id "org.jetbrains.kotlin.jvm"
+}
+
+java {
+    toolchain {
+        languageVersion = JavaLanguageVersion.of(javaVersion)
+    }
+}
+
+compileKotlin {
+    kotlinOptions {
+        jvmTarget = javaVersion
+    }
+}
+
+compileTestKotlin {
+    kotlinOptions {
+        jvmTarget = javaVersion
+    }
+}
+
+dependencies {
+    implementation project(':codeCore')
+    implementation project(':intermediate')
+    implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
+    // implementation "org.jetbrains.kotlin:kotlin-reflect"
+    implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"
+
+    testImplementation 'io.kotest:kotest-runner-junit5-jvm:5.3.2'
+}
+
+sourceSets {
+    main {
+        java {
+            srcDirs = ["${project.projectDir}/src"]
+        }
+        resources {
+            srcDirs = ["${project.projectDir}/res"]
+        }
+    }
+    test {
+        java {
+            srcDir "${project.projectDir}/test"
+        }
+    }
+}
+
+test {
+    // Enable JUnit 5 (Gradle 4.6+).
+    useJUnitPlatform()
+
+    // Always run tests, even when nothing changed.
+    dependsOn 'cleanTest'
+
+    // Show test results.
+    testLogging {
+        events "skipped", "failed"
+    }
+}

codeGenIntermediate/codeGenIntermediate.iml

@@ -0,0 +1,18 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<module type="JAVA_MODULE" version="4">
+  <component name="NewModuleRootManager" inherit-compiler-output="true">
+    <exclude-output />
+    <content url="file://$MODULE_DIR$">
+      <sourceFolder url="file://$MODULE_DIR$/src" isTestSource="false" />
+      <sourceFolder url="file://$MODULE_DIR$/test" isTestSource="true" />
+      <excludeFolder url="file://$MODULE_DIR$/build" />
+    </content>
+    <orderEntry type="inheritedJdk" />
+    <orderEntry type="sourceFolder" forTests="false" />
+    <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
+    <orderEntry type="module" module-name="codeCore" />
+    <orderEntry type="module" module-name="intermediate" />
+    <orderEntry type="library" name="io.kotest.assertions.core.jvm" level="project" />
+    <orderEntry type="library" name="io.kotest.runner.junit5.jvm" level="project" />
+  </component>
+</module>

codeGenIntermediate/src/prog8/codegen/intermediate/AssignmentGen.kt

@@ -0,0 +1,298 @@
+package prog8.codegen.intermediate
+
+import prog8.code.ast.*
+import prog8.code.core.AssemblyError
+import prog8.code.core.DataType
+import prog8.code.core.SignedDatatypes
+import prog8.intermediate.*
+
+internal class AssignmentGen(private val codeGen: IRCodeGen, private val expressionEval: ExpressionGen) {
+
+    internal fun translate(assignment: PtAssignment): IRCodeChunks {
+        if(assignment.target.children.single() is PtMachineRegister)
+            throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
+
+        return if (assignment.isInplaceAssign)
+            translateInplaceAssign(assignment)
+        else
+            translateRegularAssign(assignment)
+    }
+
+    private fun translateInplaceAssign(assignment: PtAssignment): IRCodeChunks {
+        val ident = assignment.target.identifier
+        val memory = assignment.target.memory
+        val array = assignment.target.array
+
+        return if(ident!=null) {
+            assignSelfInMemory(ident.targetName.joinToString("."), assignment.value, assignment)
+        } else if(memory != null) {
+            if(memory.address is PtNumber)
+                assignSelfInMemoryKnownAddress((memory.address as PtNumber).number.toInt(), assignment.value, assignment)
+            else
+                fallbackAssign(assignment)
+        } else if(array!=null) {
+            // NOTE: naive fallback assignment here will sometimes generate code that loads the index value multiple times
+            // in a register. It's way too much work to optimize that here - instead, we trust that the generated IL assembly
+            // will be optimized later and have the double assignments removed.
+            fallbackAssign(assignment)
+        } else {
+            fallbackAssign(assignment)
+        }
+    }
+
+    private fun assignSelfInMemoryKnownAddress(
+        address: Int,
+        value: PtExpression,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        val vmDt = codeGen.irType(value.type)
+        when(value) {
+            is PtIdentifier -> return emptyList() // do nothing, x=x null assignment.
+            is PtMachineRegister -> return emptyList() // do nothing, reg=reg null assignment
+            is PtPrefix -> return inplacePrefix(value.operator, vmDt, address, null)
+            is PtBinaryExpression -> return inplaceBinexpr(value.operator, value.right, vmDt, value.type in SignedDatatypes, address, null, origAssign)
+            is PtMemoryByte -> {
+                return if (!codeGen.options.compTarget.machine.isIOAddress(address.toUInt()))
+                    emptyList() // do nothing, mem=mem null assignment.
+                else {
+                    // read and write a (i/o) memory location to itself.
+                    val tempReg = codeGen.registers.nextFree()
+                    val code = IRCodeChunk(null, null)
+                    code += IRInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, value = address)
+                    code += IRInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, value = address)
+                    listOf(code)
+                }
+            }
+            else -> return fallbackAssign(origAssign)
+        }
+    }
+
+    private fun assignSelfInMemory(
+        symbol: String,
+        value: PtExpression,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        val vmDt = codeGen.irType(value.type)
+        return when(value) {
+            is PtIdentifier -> emptyList() // do nothing, x=x null assignment.
+            is PtMachineRegister -> emptyList() // do nothing, reg=reg null assignment
+            is PtPrefix -> inplacePrefix(value.operator, vmDt, null, symbol)
+            is PtBinaryExpression -> inplaceBinexpr(value.operator, value.right, vmDt, value.type in SignedDatatypes, null, symbol, origAssign)
+            is PtMemoryByte -> {
+                val code = IRCodeChunk(null, null)
+                val tempReg = codeGen.registers.nextFree()
+                code += IRInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, labelSymbol = symbol)
+                code += IRInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, labelSymbol = symbol)
+                listOf(code)
+            }
+
+            else -> fallbackAssign(origAssign)
+        }
+    }
+
+    private fun fallbackAssign(origAssign: PtAssignment): IRCodeChunks {
+        if (codeGen.options.slowCodegenWarnings)
+            codeGen.errors.warn("indirect code for in-place assignment", origAssign.position)
+        return translateRegularAssign(origAssign)
+    }
+
+    private fun inplaceBinexpr(
+        operator: String,
+        operand: PtExpression,
+        vmDt: IRDataType,
+        signed: Boolean,
+        knownAddress: Int?,
+        symbol: String?,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        if(knownAddress!=null) {
+            when (operator) {
+                "+" -> return expressionEval.operatorPlusInplace(knownAddress, null, vmDt, operand)
+                "-" -> return expressionEval.operatorMinusInplace(knownAddress, null, vmDt, operand)
+                "*" -> return expressionEval.operatorMultiplyInplace(knownAddress, null, vmDt, operand)
+                "/" -> return expressionEval.operatorDivideInplace(knownAddress, null, vmDt, signed, operand)
+                "|" -> return expressionEval.operatorOrInplace(knownAddress, null, vmDt, operand)
+                "&" -> return expressionEval.operatorAndInplace(knownAddress, null, vmDt, operand)
+                "^" -> return expressionEval.operatorXorInplace(knownAddress, null, vmDt, operand)
+                "<<" -> return expressionEval.operatorShiftLeftInplace(knownAddress, null, vmDt, operand)
+                ">>" -> return expressionEval.operatorShiftRightInplace(knownAddress, null, vmDt, signed, operand)
+                else -> {}
+            }
+        } else {
+            symbol!!
+            when (operator) {
+                "+" -> return expressionEval.operatorPlusInplace(null, symbol, vmDt, operand)
+                "-" -> return expressionEval.operatorMinusInplace(null, symbol, vmDt, operand)
+                "*" -> return expressionEval.operatorMultiplyInplace(null, symbol, vmDt, operand)
+                "/" -> return expressionEval.operatorDivideInplace(null, symbol, vmDt, signed, operand)
+                "|" -> return expressionEval.operatorOrInplace(null, symbol, vmDt, operand)
+                "&" -> return expressionEval.operatorAndInplace(null, symbol, vmDt, operand)
+                "^" -> return expressionEval.operatorXorInplace(null, symbol, vmDt, operand)
+                "<<" -> return expressionEval.operatorShiftLeftInplace(null, symbol, vmDt, operand)
+                ">>" -> return expressionEval.operatorShiftRightInplace(null, symbol, vmDt, signed, operand)
+                else -> {}
+            }
+        }
+        return fallbackAssign(origAssign)
+    }
+
+    private fun inplacePrefix(operator: String, vmDt: IRDataType, knownAddress: Int?, addressSymbol: String?): IRCodeChunks {
+        val code= IRCodeChunk(null, null)
+        when(operator) {
+            "+" -> { }
+            "-" -> {
+                code += if(knownAddress!=null)
+                    IRInstruction(Opcode.NEGM, vmDt, value = knownAddress)
+                else
+                    IRInstruction(Opcode.NEGM, vmDt, labelSymbol = addressSymbol)
+            }
+            "~" -> {
+                val regMask = codeGen.registers.nextFree()
+                val mask = if(vmDt==IRDataType.BYTE) 0x00ff else 0xffff
+                code += IRInstruction(Opcode.LOAD, vmDt, reg1=regMask, value = mask)
+                code += if(knownAddress!=null)
+                    IRInstruction(Opcode.XORM, vmDt, reg1=regMask, value = knownAddress)
+                else
+                    IRInstruction(Opcode.XORM, vmDt, reg1=regMask, labelSymbol = addressSymbol)
+            }
+            else -> throw AssemblyError("weird prefix operator")
+        }
+        return listOf(code)
+    }
+
+    private fun translateRegularAssign(assignment: PtAssignment): IRCodeChunks {
+        // note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
+        val ident = assignment.target.identifier
+        val memory = assignment.target.memory
+        val array = assignment.target.array
+        val vmDt = codeGen.irType(assignment.value.type)
+        val result = mutableListOf<IRCodeChunkBase>()
+        var resultRegister = -1
+        var resultFpRegister = -1
+        val zero = codeGen.isZero(assignment.value)
+        if(!zero) {
+            // calculate the assignment value
+            if (vmDt == IRDataType.FLOAT) {
+                resultFpRegister = codeGen.registers.nextFreeFloat()
+                result += expressionEval.translateExpression(assignment.value, -1, resultFpRegister)
+            } else {
+                resultRegister = if (assignment.value is PtMachineRegister) {
+                    (assignment.value as PtMachineRegister).register
+                } else {
+                    val reg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(assignment.value, reg, -1)
+                    reg
+                }
+            }
+        }
+        if(ident!=null) {
+            val symbol = ident.targetName.joinToString(".")
+            val instruction = if(zero) {
+                IRInstruction(Opcode.STOREZM, vmDt, labelSymbol = symbol)
+            } else {
+                if (vmDt == IRDataType.FLOAT)
+                    IRInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, labelSymbol = symbol)
+                else
+                    IRInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, labelSymbol = symbol)
+            }
+            result += IRCodeChunk(null, null).also { it += instruction }
+            return result
+        }
+        else if(array!=null) {
+            val variable = array.variable.targetName.joinToString(".")
+            val itemsize = codeGen.program.memsizer.memorySize(array.type)
+
+            if(array.variable.type==DataType.UWORD) {
+                // indexing a pointer var instead of a real array or string
+                if(itemsize!=1)
+                    throw AssemblyError("non-array var indexing requires bytes dt")
+                if(array.index.type!=DataType.UBYTE)
+                    throw AssemblyError("non-array var indexing requires bytes index")
+                val idxReg = codeGen.registers.nextFree()
+                result += expressionEval.translateExpression(array.index, idxReg, -1)
+                val code = IRCodeChunk(null, null)
+                if(zero) {
+                    // there's no STOREZIX instruction
+                    resultRegister = codeGen.registers.nextFree()
+                    code += IRInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, value=0)
+                }
+                code += IRInstruction(Opcode.STOREIX, vmDt, reg1=resultRegister, reg2=idxReg, labelSymbol = variable)
+                result += code
+                return result
+            }
+
+            val fixedIndex = constIntValue(array.index)
+            if(zero) {
+                if(fixedIndex!=null) {
+                    val offset = fixedIndex*itemsize
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZM, vmDt, labelSymbol = "$variable+$offset") }
+                    result += chunk
+                } else {
+                    val indexReg = codeGen.registers.nextFree()
+                    result += loadIndexReg(array, itemsize, indexReg)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZX, vmDt, reg1=indexReg, labelSymbol = variable) }
+                }
+            } else {
+                if(vmDt== IRDataType.FLOAT) {
+                    if(fixedIndex!=null) {
+                        val offset = fixedIndex*itemsize
+                        val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, labelSymbol = "$variable+$offset") }
+                        result += chunk
+                    } else {
+                        val indexReg = codeGen.registers.nextFree()
+                        result += loadIndexReg(array, itemsize, indexReg)
+                        result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREX, vmDt, reg1 = indexReg, fpReg1 = resultFpRegister, labelSymbol = variable) }
+                    }
+                } else {
+                    if(fixedIndex!=null) {
+                        val offset = fixedIndex*itemsize
+                        val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, labelSymbol = "$variable+$offset") }
+                        result += chunk
+                    } else {
+                        val indexReg = codeGen.registers.nextFree()
+                        result += loadIndexReg(array, itemsize, indexReg)
+                        result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, labelSymbol = variable) }
+                    }
+                }
+            }
+            return result
+        }
+        else if(memory!=null) {
+            require(vmDt== IRDataType.BYTE)
+            if(zero) {
+                if(memory.address is PtNumber) {
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZM, vmDt, value=(memory.address as PtNumber).number.toInt()) }
+                    result += chunk
+                } else {
+                    val addressReg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(memory.address, addressReg, -1)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZI, vmDt, reg1=addressReg) }
+                }
+            } else {
+                if(memory.address is PtNumber) {
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, reg1=resultRegister, value=(memory.address as PtNumber).number.toInt()) }
+                    result += chunk
+                } else {
+                    val addressReg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(memory.address, addressReg, -1)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREI, vmDt, reg1=resultRegister, reg2=addressReg) }
+                }
+            }
+
+            return result
+        }
+        else
+            throw AssemblyError("weird assigntarget")
+    }
+
+    private fun loadIndexReg(array: PtArrayIndexer, itemsize: Int, indexReg: Int): IRCodeChunks {
+        return if(itemsize==1) {
+            expressionEval.translateExpression(array.index, indexReg, -1)
+        } else {
+            val mult = PtBinaryExpression("*", DataType.UBYTE, array.position)
+            mult.children += array.index
+            mult.children += PtNumber(DataType.UBYTE, itemsize.toDouble(), array.position)
+            expressionEval.translateExpression(mult, indexReg, -1)
+        }
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/BuiltinFuncGen.kt

@@ -0,0 +1,404 @@
+package prog8.codegen.intermediate
+
+import prog8.code.StStaticVariable
+import prog8.code.ast.*
+import prog8.code.core.AssemblyError
+import prog8.code.core.DataType
+import prog8.intermediate.*
+
+
+internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGen: ExpressionGen) {
+
+    fun translate(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        return when(call.name) {
+            "any" -> funcAny(call, resultRegister)
+            "all" -> funcAll(call, resultRegister)
+            "abs" -> funcAbs(call, resultRegister)
+            "cmp" -> funcCmp(call)
+            "sgn" -> funcSgn(call, resultRegister)
+            "sqrt16" -> funcSqrt16(call, resultRegister)
+            "pop" -> funcPop(call)
+            "popw" -> funcPopw(call)
+            "push" -> funcPush(call)
+            "pushw" -> funcPushw(call)
+            "rsave",
+            "rsavex",
+            "rrestore",
+            "rrestorex" -> emptyList()  // vm doesn't have registers to save/restore
+            "callfar" -> throw AssemblyError("callfar() is for cx16 target only")
+            "callrom" -> throw AssemblyError("callrom() is for cx16 target only")
+            "msb" -> funcMsb(call, resultRegister)
+            "lsb" -> funcLsb(call, resultRegister)
+            "memory" -> funcMemory(call, resultRegister)
+            "peek" -> funcPeek(call, resultRegister)
+            "peekw" -> funcPeekW(call, resultRegister)
+            "poke" -> funcPoke(call)
+            "pokew" -> funcPokeW(call)
+            "pokemon" -> emptyList()
+            "mkword" -> funcMkword(call, resultRegister)
+            "sort" -> funcSort(call)
+            "reverse" -> funcReverse(call)
+            "rol" -> funcRolRor(Opcode.ROXL, call, resultRegister)
+            "ror" -> funcRolRor(Opcode.ROXR, call, resultRegister)
+            "rol2" -> funcRolRor(Opcode.ROL, call, resultRegister)
+            "ror2" -> funcRolRor(Opcode.ROR, call, resultRegister)
+            else -> throw AssemblyError("missing builtinfunc for ${call.name}")
+        }
+    }
+
+    private fun funcCmp(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val leftRegister = codeGen.registers.nextFree()
+        val rightRegister = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], leftRegister, -1)
+        result += exprGen.translateExpression(call.args[1], rightRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.CMP, codeGen.irType(call.args[0].type), reg1=leftRegister, reg2=rightRegister)
+        }
+        return result
+    }
+
+    private fun funcAny(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when (array.dt) {
+                DataType.ARRAY_UB,
+                DataType.ARRAY_B -> IMSyscall.ANY_BYTE
+                DataType.ARRAY_UW,
+                DataType.ARRAY_W -> IMSyscall.ANY_WORD
+                DataType.ARRAY_F -> IMSyscall.ANY_FLOAT
+                else -> throw IllegalArgumentException("weird type")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+            if(resultRegister!=0)
+                it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
+        }
+        return result
+    }
+
+    private fun funcAll(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB,
+                DataType.ARRAY_B -> IMSyscall.ALL_BYTE
+                DataType.ARRAY_UW,
+                DataType.ARRAY_W -> IMSyscall.ALL_WORD
+                DataType.ARRAY_F -> IMSyscall.ALL_FLOAT
+                else -> throw IllegalArgumentException("weird type")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+            if(resultRegister!=0)
+                it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
+        }
+        return result
+    }
+
+    private fun funcAbs(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val sourceDt = call.args.single().type
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(sourceDt!=DataType.UWORD) {
+            result += exprGen.translateExpression(call.args[0], resultRegister, -1)
+            when (sourceDt) {
+                DataType.UBYTE -> {
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1 = resultRegister)
+                    }
+                }
+                DataType.BYTE -> {
+                    val notNegativeLabel = codeGen.createLabelName()
+                    val compareReg = codeGen.registers.nextFree()
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=compareReg, reg2=resultRegister)
+                        it += IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=compareReg, value=0x80)
+                        it += IRInstruction(Opcode.BZ, IRDataType.BYTE, reg1=compareReg, labelSymbol = notNegativeLabel)
+                        it += IRInstruction(Opcode.NEG, IRDataType.BYTE, reg1=resultRegister)
+                        it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1=resultRegister)
+                    }
+                    result += IRCodeChunk(notNegativeLabel, null)
+                }
+                DataType.WORD -> {
+                    val notNegativeLabel = codeGen.createLabelName()
+                    val compareReg = codeGen.registers.nextFree()
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.LOADR, IRDataType.WORD, reg1=compareReg, reg2=resultRegister)
+                        it += IRInstruction(Opcode.AND, IRDataType.WORD, reg1=compareReg, value=0x8000)
+                        it += IRInstruction(Opcode.BZ, IRDataType.WORD, reg1=compareReg, labelSymbol = notNegativeLabel)
+                        it += IRInstruction(Opcode.NEG, IRDataType.WORD, reg1=resultRegister)
+                    }
+                    result += IRCodeChunk(notNegativeLabel, null)
+                }
+                else -> throw AssemblyError("weird type")
+            }
+        }
+        return result
+    }
+
+    private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val reg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.SGN, codeGen.irType(call.type), reg1 = resultRegister, reg2 = reg)
+        }
+        return result
+    }
+
+    private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val reg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.SQRT, IRDataType.WORD, reg1=resultRegister, reg2=reg)
+        }
+        return result
+    }
+
+    private fun funcPop(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val code = IRCodeChunk(null, null)
+        val reg = codeGen.registers.nextFree()
+        code += IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=reg)
+        val result = mutableListOf<IRCodeChunkBase>(code)
+        result += assignRegisterTo(call.args.single(), reg)
+        return result
+    }
+
+    private fun funcPopw(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val code = IRCodeChunk(null, null)
+        val reg = codeGen.registers.nextFree()
+        code += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=reg)
+        val result = mutableListOf<IRCodeChunkBase>(code)
+        result += assignRegisterTo(call.args.single(), reg)
+        return result
+    }
+
+    private fun funcPush(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        val reg = codeGen.registers.nextFree()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=reg)
+        }
+        return result
+    }
+
+    private fun funcPushw(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        val reg = codeGen.registers.nextFree()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1 = reg)
+        }
+        return result
+    }
+
+    private fun funcReverse(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB, DataType.ARRAY_B, DataType.STR -> IMSyscall.REVERSE_BYTES
+                DataType.ARRAY_UW, DataType.ARRAY_W -> IMSyscall.REVERSE_WORDS
+                DataType.ARRAY_F -> IMSyscall.REVERSE_FLOATS
+                else -> throw IllegalArgumentException("weird type to reverse")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+        }
+        return result
+    }
+
+    private fun funcSort(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB -> IMSyscall.SORT_UBYTE
+                DataType.ARRAY_B -> IMSyscall.SORT_BYTE
+                DataType.ARRAY_UW -> IMSyscall.SORT_UWORD
+                DataType.ARRAY_W -> IMSyscall.SORT_WORD
+                DataType.STR -> IMSyscall.SORT_UBYTE
+                DataType.ARRAY_F -> throw IllegalArgumentException("sorting a floating point array is not supported")
+                else -> throw IllegalArgumentException("weird type to sort")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+        }
+        return result
+    }
+
+    private fun funcMkword(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val msbReg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], msbReg, -1)
+        result += exprGen.translateExpression(call.args[1], resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.CONCAT, IRDataType.BYTE, reg1 = resultRegister, reg2 = msbReg)
+        }
+        return result
+    }
+
+    private fun funcPokeW(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(codeGen.isZero(call.args[1])) {
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZM, IRDataType.WORD, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZI, IRDataType.WORD, reg2 = addressReg)
+                }
+            }
+        } else {
+            val valueReg = codeGen.registers.nextFree()
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREM, IRDataType.WORD, reg1 = valueReg, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREI, IRDataType.WORD, reg1 = valueReg, reg2 = addressReg)
+                }
+            }
+        }
+        return result
+    }
+
+    private fun funcPoke(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(codeGen.isZero(call.args[1])) {
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZM, IRDataType.BYTE, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZI, IRDataType.BYTE, reg2 = addressReg)
+                }
+            }
+        } else {
+            val valueReg = codeGen.registers.nextFree()
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREM, IRDataType.BYTE, reg1 = valueReg, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREI, IRDataType.BYTE, reg1 = valueReg, reg2 = addressReg)
+                }
+            }
+        }
+        return result
+    }
+
+    private fun funcPeekW(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(call.args[0] is PtNumber) {
+            val address = (call.args[0] as PtNumber).number.toInt()
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADM, IRDataType.WORD, reg1 = resultRegister, value = address)
+            }
+        } else {
+            val addressReg = codeGen.registers.nextFree()
+            result += exprGen.translateExpression(call.args.single(), addressReg, -1)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADI, IRDataType.WORD, reg1 = resultRegister, reg2 = addressReg)
+            }
+        }
+        return result
+    }
+
+    private fun funcPeek(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(call.args[0] is PtNumber) {
+            val address = (call.args[0] as PtNumber).number.toInt()
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADM, IRDataType.BYTE, reg1 = resultRegister, value = address)
+            }
+        } else {
+            val addressReg = codeGen.registers.nextFree()
+            result += exprGen.translateExpression(call.args.single(), addressReg, -1)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADI, IRDataType.BYTE, reg1 = resultRegister, reg2 = addressReg)
+            }
+        }
+        return result
+    }
+
+    private fun funcMemory(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val name = (call.args[0] as PtString).value
+        val code = IRCodeChunk(null, null)
+        code += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1=resultRegister, labelSymbol = "prog8_slabs.prog8_memoryslab_$name")
+        return listOf(code)
+    }
+
+    private fun funcLsb(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        return exprGen.translateExpression(call.args.single(), resultRegister, -1)
+        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
+    }
+
+    private fun funcMsb(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.MSIG, IRDataType.BYTE, reg1 = resultRegister, reg2 = resultRegister)
+        }
+        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
+        return result
+    }
+
+    private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val vmDt = codeGen.irType(call.args[0].type)
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(opcode, vmDt, reg1 = resultRegister)
+        }
+        result += assignRegisterTo(call.args[0], resultRegister)
+        return result
+    }
+
+    private fun assignRegisterTo(target: PtExpression, register: Int): IRCodeChunks {
+        val assignment = PtAssignment(target.position)
+        val assignTarget = PtAssignTarget(target.position)
+        assignTarget.children.add(target)
+        assignment.children.add(assignTarget)
+        assignment.children.add(PtMachineRegister(register, target.type, target.position))
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += codeGen.translateNode(assignment)
+        return result
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt

@@ -0,0 +1,272 @@
+package prog8.codegen.intermediate
+
+import prog8.intermediate.*
+
+internal class IRPeepholeOptimizer(private val irprog: IRProgram) {
+    fun optimize() {
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            removeEmptyChunks(sub)
+            joinChunks(sub)
+            sub.chunks.withIndex().forEach { (index, chunk1) ->
+                // we don't optimize Inline Asm chunks here.
+                val chunk2 = if(index<sub.chunks.size-1) sub.chunks[index+1] else null
+                if(chunk1 is IRCodeChunk) {
+                    do {
+                        val indexedInstructions = chunk1.instructions.withIndex()
+                            .map { IndexedValue(it.index, it.value) }
+                        val changed = removeNops(chunk1, indexedInstructions)
+                                || removeDoubleLoadsAndStores(chunk1, indexedInstructions)       // TODO not yet implemented
+                                || removeUselessArithmetic(chunk1, indexedInstructions)
+                                || removeWeirdBranches(chunk1, chunk2, indexedInstructions)
+                                || removeDoubleSecClc(chunk1, indexedInstructions)
+                                || cleanupPushPop(chunk1, indexedInstructions)
+                        // TODO other optimizations:
+                        //  more complex optimizations such as unused registers
+                    } while (changed)
+                }
+            }
+            removeEmptyChunks(sub)
+        }
+
+        irprog.linkChunks() // re-link
+    }
+
+    private fun removeEmptyChunks(sub: IRSubroutine) {
+        if(sub.chunks.isEmpty())
+            return
+
+        /*
+        Empty Code chunk with label ->
+            If next chunk has no label -> move label to next chunk, remove original
+            If next chunk has label -> label name should be the same, remove original. Otherwise FOR NOW leave it in place. (TODO: consolidate labels into 1)
+            If is last chunk -> keep chunk in place because of the label.
+        Empty Code chunk without label ->
+            should not have been generated! ERROR.
+         */
+
+
+        val relabelChunks = mutableListOf<Pair<Int, String>>()
+        val removeChunks = mutableListOf<Int>()
+
+        sub.chunks.withIndex().forEach { (index, chunk) ->
+            if(chunk is IRCodeChunk && chunk.instructions.isEmpty()) {
+                if(chunk.label==null) {
+                    removeChunks += index
+                } else {
+                    if (index < sub.chunks.size - 1) {
+                        val nextchunk = sub.chunks[index + 1]
+                        if (nextchunk.label == null) {
+                            // can transplant label to next chunk and remove this empty one.
+                            relabelChunks += Pair(index + 1, chunk.label!!)
+                            removeChunks += index
+                        } else {
+                            if (chunk.label == nextchunk.label)
+                                removeChunks += index
+                            else {
+                                // TODO: consolidate labels on same chunk
+                            }
+                        }
+                    }
+                }
+            }
+        }
+
+        relabelChunks.forEach { (index, label) ->
+            val chunk = IRCodeChunk(label, null)
+            chunk.instructions += sub.chunks[index].instructions
+            sub.chunks[index] = chunk
+        }
+        removeChunks.reversed().forEach { index -> sub.chunks.removeAt(index) }
+    }
+
+    private fun joinChunks(sub: IRSubroutine) {
+        // Subroutine contains a list of chunks. Some can be joined into one.
+
+        if(sub.chunks.isEmpty())
+            return
+
+        fun mayJoin(previous: IRCodeChunkBase, chunk: IRCodeChunkBase): Boolean {
+            if(chunk.label!=null)
+                return false
+            if(previous is IRCodeChunk && chunk is IRCodeChunk) {
+                // if the previous chunk doesn't end in a jump or a return, flow continues into the next chunk
+                val lastInstruction = previous.instructions.lastOrNull()
+                if(lastInstruction!=null)
+                    return lastInstruction.opcode !in OpcodesThatJump
+                return true
+            }
+            return false
+        }
+
+        val chunks = mutableListOf<IRCodeChunkBase>()
+        chunks += sub.chunks[0]
+        for(ix in 1 until sub.chunks.size) {
+            val lastChunk = chunks.last()
+            if(mayJoin(lastChunk, sub.chunks[ix])) {
+                lastChunk.instructions += sub.chunks[ix].instructions
+                lastChunk.next = sub.chunks[ix].next
+            }
+            else
+                chunks += sub.chunks[ix]
+        }
+        sub.chunks.clear()
+        sub.chunks += chunks
+    }
+
+    private fun cleanupPushPop(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        //  push followed by pop to same target, or different target->replace with load
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if(ins.opcode== Opcode.PUSH) {
+                if(idx < chunk.instructions.size-1) {
+                    val insAfter = chunk.instructions[idx+1] as? IRInstruction
+                    if(insAfter!=null && insAfter.opcode == Opcode.POP) {
+                        if(ins.reg1==insAfter.reg1) {
+                            chunk.instructions.removeAt(idx)
+                            chunk.instructions.removeAt(idx)
+                        } else {
+                            chunk.instructions[idx] = IRInstruction(Opcode.LOADR, ins.type, reg1=insAfter.reg1, reg2=ins.reg1)
+                            chunk.instructions.removeAt(idx+1)
+                        }
+                        changed = true
+                    }
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeDoubleSecClc(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        //  double sec, clc
+        //  sec+clc or clc+sec
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if(ins.opcode== Opcode.SEC || ins.opcode== Opcode.CLC) {
+                if(idx < chunk.instructions.size-1) {
+                    val insAfter = chunk.instructions[idx+1] as? IRInstruction
+                    if(insAfter?.opcode == ins.opcode) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                    else if(ins.opcode== Opcode.SEC && insAfter?.opcode== Opcode.CLC) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                    else if(ins.opcode== Opcode.CLC && insAfter?.opcode== Opcode.SEC) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeWeirdBranches(chunk: IRCodeChunk, nextChunk: IRCodeChunkBase?, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            val labelSymbol = ins.labelSymbol
+
+            // remove jump/branch to label immediately below (= next chunk if it has that label)
+            if(ins.opcode== Opcode.JUMP && labelSymbol!=null) {
+                if(idx==chunk.instructions.size-1 && ins.branchTarget===nextChunk) {
+                    chunk.instructions.removeAt(idx)
+                    changed = true
+                }
+            }
+            // remove useless RETURN
+            if(ins.opcode == Opcode.RETURN && idx>0) {
+                val previous = chunk.instructions[idx-1] as? IRInstruction
+                if(previous?.opcode in OpcodesThatJump) {
+                    chunk.instructions.removeAt(idx)
+                    changed = true
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeUselessArithmetic(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        // note: this is hard to solve for the non-immediate instructions atm because the values are loaded into registers first
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            when (ins.opcode) {
+                Opcode.DIV, Opcode.DIVS, Opcode.MUL, Opcode.MOD -> {
+                    if (ins.value == 1) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.ADD, Opcode.SUB -> {
+                    if (ins.value == 1) {
+                        chunk.instructions[idx] = IRInstruction(
+                            if (ins.opcode == Opcode.ADD) Opcode.INC else Opcode.DEC,
+                            ins.type,
+                            ins.reg1
+                        )
+                        changed = true
+                    } else if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.AND -> {
+                    if (ins.value == 0) {
+                        chunk.instructions[idx] = IRInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = 0)
+                        changed = true
+                    } else if (ins.value == 255 && ins.type == IRDataType.BYTE) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    } else if (ins.value == 65535 && ins.type == IRDataType.WORD) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.OR -> {
+                    if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    } else if ((ins.value == 255 && ins.type == IRDataType.BYTE) || (ins.value == 65535 && ins.type == IRDataType.WORD)) {
+                        chunk.instructions[idx] = IRInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = ins.value)
+                        changed = true
+                    }
+                }
+                Opcode.XOR -> {
+                    if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                else -> {}
+            }
+        }
+        return changed
+    }
+
+    private fun removeNops(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if (ins.opcode == Opcode.NOP) {
+                changed = true
+                chunk.instructions.removeAt(idx)
+            }
+        }
+        return changed
+    }
+
+    private fun removeDoubleLoadsAndStores(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.forEach { (idx, ins) ->
+
+            // TODO: detect multiple loads to the same target registers, only keep first (if source is not I/O memory)
+            // TODO: detect multiple stores to the same target, only keep first (if target is not I/O memory)
+            // TODO: detect multiple float ffrom/fto to the same target, only keep first
+            // TODO: detect multiple sequential rnd with same reg1, only keep one
+            // TODO: detect subsequent same xors/nots/negs, remove the pairs completely as they cancel out
+            // TODO: detect multiple same ands, ors; only keep first
+            // TODO: (hard) detect multiple registers being assigned the same value (and not changed) - use only 1 of them
+            // ...
+        }
+        return changed
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/IRUnusedCodeRemover.kt

@@ -0,0 +1,103 @@
+package prog8.codegen.intermediate
+
+import prog8.code.core.IErrorReporter
+import prog8.code.core.SourceCode.Companion.libraryFilePrefix
+import prog8.intermediate.*
+
+
+internal class IRUnusedCodeRemover(private val irprog: IRProgram, private val errors: IErrorReporter) {
+    fun optimize(): Int {
+        var numRemoved = removeSimpleUnlinked() + removeUnreachable()
+
+        // remove empty subs
+        irprog.blocks.forEach { block ->
+            block.subroutines.reversed().forEach { sub ->
+                if(sub.isEmpty()) {
+                    if(!sub.position.file.startsWith(libraryFilePrefix))
+                        errors.warn("unused subroutine ${sub.name}", sub.position)
+                    block.subroutines.remove(sub)
+                    numRemoved++
+                }
+            }
+        }
+
+        // remove empty blocks
+        irprog.blocks.reversed().forEach { block ->
+            if(block.isEmpty()) {
+                irprog.blocks.remove(block)
+                numRemoved++
+            }
+        }
+
+        return numRemoved
+    }
+
+    private fun removeUnreachable(): Int {
+        val reachable = mutableSetOf(irprog.blocks.single { it.name=="main" }.subroutines.single { it.name=="main.start" }.chunks.first())
+
+        fun grow() {
+            val new = mutableSetOf<IRCodeChunkBase>()
+            reachable.forEach {
+                it.next?.let { next -> new += next }
+                it.instructions.forEach { instr -> instr.branchTarget?.let { target -> new += target} }
+            }
+            reachable += new
+        }
+
+        var previousCount = reachable.size
+        while(true) {
+            grow()
+            if(reachable.size<=previousCount)
+                break
+            previousCount = reachable.size
+        }
+
+        return removeUnlinkedChunks(reachable)
+    }
+
+    private fun removeSimpleUnlinked(): Int {
+        val linkedChunks = mutableSetOf<IRCodeChunkBase>()
+
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            sub.chunks.forEach { chunk ->
+                chunk.next?.let { next -> linkedChunks += next }
+                chunk.instructions.forEach { it.branchTarget?.let { target -> linkedChunks += target } }
+                if (chunk.label == "main.start")
+                    linkedChunks += chunk
+            }
+        }
+
+        return removeUnlinkedChunks(linkedChunks)
+    }
+
+    private fun removeUnlinkedChunks(
+        linkedChunks: MutableSet<IRCodeChunkBase>
+    ): Int {
+        var numRemoved = 0
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            sub.chunks.withIndex().reversed().forEach { (index, chunk) ->
+                if (chunk !in linkedChunks) {
+                    if (chunk === sub.chunks[0]) {
+                        when(chunk) {
+                            is IRCodeChunk -> {
+                                if (chunk.isNotEmpty()) {
+                                    // don't remove the first chunk of the sub itself because it has to have the name of the sub as label
+                                    chunk.instructions.clear()
+                                    numRemoved++
+                                }
+                            }
+                            is IRInlineAsmChunk, is IRInlineBinaryChunk -> {
+                                sub.chunks[index] = IRCodeChunk(chunk.label, chunk.next)
+                                numRemoved++
+                            }
+                        }
+                    } else {
+                        sub.chunks.removeAt(index)
+                        numRemoved++
+                    }
+                }
+            }
+        }
+        return numRemoved
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/RegisterPool.kt

@@ -0,0 +1,29 @@
+package prog8.codegen.intermediate
+
+import prog8.code.core.AssemblyError
+import prog8.intermediate.SyscallRegisterBase
+
+internal class RegisterPool {
+    // reserve 0,1,2 for return values of subroutine calls and syscalls
+    private var firstFree: Int=3
+    private var firstFreeFloat: Int=3
+
+    fun peekNext() = firstFree
+    fun peekNextFloat() = firstFreeFloat
+
+    fun nextFree(): Int {
+        val result = firstFree
+        firstFree++
+        if(firstFree >= SyscallRegisterBase)
+            throw AssemblyError("out of virtual registers (int)")
+        return result
+    }
+
+    fun nextFreeFloat(): Int {
+        val result = firstFreeFloat
+        firstFreeFloat++
+        if(firstFreeFloat >= SyscallRegisterBase)
+            throw AssemblyError("out of virtual registers (fp)")
+        return result
+    }
+}

codeGenIntermediate/src/prog8/codegen/vm/VmCodeGen.kt

@@ -0,0 +1,36 @@
+package prog8.codegen.vm
+
+import prog8.code.SymbolTable
+import prog8.code.ast.PtProgram
+import prog8.code.core.CompilationOptions
+import prog8.code.core.IAssemblyGenerator
+import prog8.code.core.IAssemblyProgram
+import prog8.code.core.IErrorReporter
+import prog8.codegen.intermediate.IRCodeGen
+import prog8.intermediate.IRFileWriter
+import prog8.intermediate.IRProgram
+
+class VmCodeGen(private val program: PtProgram,
+                private val symbolTable: SymbolTable,
+                private val options: CompilationOptions,
+                private val errors: IErrorReporter
+): IAssemblyGenerator {
+    override fun compileToAssembly(): IAssemblyProgram? {
+
+        val irCodeGen = IRCodeGen(program, symbolTable, options, errors)
+        val irProgram = irCodeGen.generate()
+
+        // no need to check options.keepIR, as the VM file format *is* the IR file.
+        return VmAssemblyProgram(irProgram.name, irProgram)
+    }
+}
+
+
+internal class VmAssemblyProgram(override val name: String, private val irProgram: IRProgram): IAssemblyProgram {
+
+    override fun assemble(options: CompilationOptions): Boolean {
+        // the VM reads the IR file from disk.
+        IRFileWriter(irProgram, null).write()
+        return true
+    }
+}

codeGenIntermediate/test/Dummies.kt

@@ -0,0 +1,20 @@
+import prog8.code.core.DataType
+import prog8.code.core.Encoding
+import prog8.code.core.IMemSizer
+import prog8.code.core.IStringEncoding
+
+
+internal object DummyMemsizer : IMemSizer {
+    override fun memorySize(dt: DataType) = 0
+    override fun memorySize(arrayDt: DataType, numElements: Int) = 0
+}
+
+internal object DummyStringEncoder : IStringEncoding {
+    override fun encodeString(str: String, encoding: Encoding): List<UByte> {
+        return emptyList()
+    }
+
+    override fun decodeString(bytes: List<UByte>, encoding: Encoding): String {
+        return ""
+    }
+}

codeGenIntermediate/test/TestIRPeepholeOpt.kt

@@ -0,0 +1,189 @@
+import io.kotest.core.spec.style.FunSpec
+import io.kotest.matchers.shouldBe
+import prog8.code.core.*
+import prog8.code.target.VMTarget
+import prog8.codegen.intermediate.IRPeepholeOptimizer
+import prog8.intermediate.*
+
+class TestIRPeepholeOpt: FunSpec({
+    fun makeIRProgram(chunks: List<IRCodeChunkBase>): IRProgram {
+        require(chunks.first().label=="main.start")
+        val block = IRBlock("main", null, IRBlock.BlockAlignment.NONE, Position.DUMMY)
+        val sub = IRSubroutine("main.start", emptyList(), null, Position.DUMMY)
+        chunks.forEach { sub += it }
+        block += sub
+        val target = VMTarget()
+        val options = CompilationOptions(
+            OutputType.RAW,
+            CbmPrgLauncherType.NONE,
+            ZeropageType.DONTUSE,
+            emptyList(),
+            floats = false,
+            noSysInit = true,
+            compTarget = target,
+            loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
+        )
+        val prog = IRProgram("test", IRSymbolTable(null), options, target)
+        prog.addBlock(block)
+        prog.linkChunks()
+        prog.validate()
+        return prog
+    }
+
+    fun makeIRProgram(instructions: List<IRInstruction>): IRProgram {
+        val chunk = IRCodeChunk("main.start", null)
+        instructions.forEach { chunk += it }
+        return makeIRProgram(listOf(chunk))
+    }
+
+    fun IRProgram.chunks(): List<IRCodeChunkBase> = this.blocks.flatMap { it.subroutines }.flatMap { it.chunks }
+
+    test("remove nops") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=1, value=42),
+            IRInstruction(Opcode.NOP),
+            IRInstruction(Opcode.NOP)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 3
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 1
+    }
+
+    test("remove jmp to label below") {
+        val c1 = IRCodeChunk("main.start", null)
+        c1 += IRInstruction(Opcode.JUMP, labelSymbol = "label")  // removed, but chunk stays because of label
+        val c2 = IRCodeChunk("label", null)
+        c2 += IRInstruction(Opcode.JUMP, labelSymbol = "label2") // removed, but chunk stays because of label
+        c2 += IRInstruction(Opcode.NOP)  // removed
+        val c3 = IRCodeChunk("label2", null)
+        c3 += IRInstruction(Opcode.JUMP, labelSymbol = "label3")
+        c3 += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=1)
+        val c4 = IRCodeChunk("label3", null)
+        val irProg = makeIRProgram(listOf(c1, c2, c3, c4))
+
+        irProg.chunks().size shouldBe 4
+        irProg.chunks().flatMap { it.instructions }.size shouldBe 5
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().size shouldBe 4
+        irProg.chunks()[0].label shouldBe "main.start"
+        irProg.chunks()[1].label shouldBe "label"
+        irProg.chunks()[2].label shouldBe "label2"
+        irProg.chunks()[3].label shouldBe "label3"
+        irProg.chunks()[0].isEmpty() shouldBe true
+        irProg.chunks()[1].isEmpty() shouldBe true
+        irProg.chunks()[2].isEmpty() shouldBe false
+        irProg.chunks()[3].isEmpty() shouldBe true
+        val instr = irProg.chunks().flatMap { it.instructions }
+        instr.size shouldBe 2
+        instr[0].opcode shouldBe Opcode.JUMP
+        instr[1].opcode shouldBe Opcode.INC
+    }
+
+    test("remove double sec/clc") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.CLC),
+            IRInstruction(Opcode.CLC),
+            IRInstruction(Opcode.CLC)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 6
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 1
+        instr[0].opcode shouldBe Opcode.CLC
+    }
+
+    test("push followed by pop") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=42),
+            IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=42),
+            IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=99),
+            IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=222)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 4
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 1
+        instr[0].opcode shouldBe Opcode.LOADR
+        instr[0].reg1 shouldBe 222
+        instr[0].reg2 shouldBe 99
+    }
+
+    test("remove useless div/mul, add/sub") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, value = 0)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 10
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 4
+    }
+
+    test("replace add/sub 1 by inc/dec") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, value = 1)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 2
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 2
+        instr[0].opcode shouldBe Opcode.INC
+        instr[1].opcode shouldBe Opcode.DEC
+    }
+
+    test("remove useless and/or/xor") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 255),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 65535),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 200),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 60000),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, value = 1)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 8
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 4
+    }
+
+    test("replace and/or/xor by constant number") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 0),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 255),
+            IRInstruction(Opcode.OR, IRDataType.WORD, reg1=42, value = 65535)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 4
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 4
+        instr[0].opcode shouldBe Opcode.LOAD
+        instr[1].opcode shouldBe Opcode.LOAD
+        instr[2].opcode shouldBe Opcode.LOAD
+        instr[3].opcode shouldBe Opcode.LOAD
+        instr[0].value shouldBe 0
+        instr[1].value shouldBe 0
+        instr[2].value shouldBe 255
+        instr[3].value shouldBe 65535
+    }
+})

codeGeneration/readme-tests.txt

@@ -1,2 +0,0 @@
-Unittests for things in this module are located in the Compiler module instead,
-for convenience sake, and to not spread the test cases around too much.

codeGeneration/src/prog8/compiler/target/AssemblyError.kt

@@ -1,3 +0,0 @@
-package prog8.compiler.target
-
-class AssemblyError(msg: String) : RuntimeException(msg)

codeGeneration/src/prog8/compiler/target/C64Target.kt

@@ -1,42 +0,0 @@
-package prog8.compiler.target
-
-import com.github.michaelbull.result.fold
-import prog8.ast.base.*
-import prog8.ast.expressions.Expression
-import prog8.ast.statements.RegisterOrStatusflag
-import prog8.ast.statements.Subroutine
-import prog8.compiler.target.c64.C64MachineDefinition
-import prog8.compiler.target.cbm.Petscii
-import prog8.compiler.target.cpu6502.codegen.asmsub6502ArgsEvalOrder
-import prog8.compiler.target.cpu6502.codegen.asmsub6502ArgsHaveRegisterClobberRisk
-import prog8.compilerinterface.ICompilationTarget
-
-
-object C64Target: ICompilationTarget {
-    override val name = "c64"
-    override val machine = C64MachineDefinition()
-    override fun encodeString(str: String, altEncoding: Boolean): List<UByte> {
-        val coded = if (altEncoding) Petscii.encodeScreencode(str, true) else Petscii.encodePetscii(str, true)
-        return coded.fold(
-            failure = { throw it },
-            success = { it }
-        )
-    }
-    override fun decodeString(bytes: List<UByte>, altEncoding: Boolean) =
-        if (altEncoding) Petscii.decodeScreencode(bytes, true) else Petscii.decodePetscii(bytes, true)
-
-    override fun asmsubArgsEvalOrder(sub: Subroutine): List<Int> =
-        asmsub6502ArgsEvalOrder(sub)
-    override fun asmsubArgsHaveRegisterClobberRisk(args: List<Expression>, paramRegisters: List<RegisterOrStatusflag>) =
-        asmsub6502ArgsHaveRegisterClobberRisk(args, paramRegisters)
-
-    override fun memorySize(dt: DataType): Int {
-        return when(dt) {
-            in ByteDatatypes -> 1
-            in WordDatatypes -> 2
-            DataType.FLOAT -> machine.FLOAT_MEM_SIZE
-            in PassByReferenceDatatypes -> machine.POINTER_MEM_SIZE
-            else -> Int.MIN_VALUE
-        }
-    }
-}

codeGeneration/src/prog8/compiler/target/Cx16Target.kt

@@ -1,46 +0,0 @@
-package prog8.compiler.target
-
-import com.github.michaelbull.result.fold
-import prog8.ast.base.ByteDatatypes
-import prog8.ast.base.DataType
-import prog8.ast.base.PassByReferenceDatatypes
-import prog8.ast.base.WordDatatypes
-import prog8.ast.expressions.Expression
-import prog8.ast.statements.RegisterOrStatusflag
-import prog8.ast.statements.Subroutine
-import prog8.compiler.target.cbm.Petscii
-import prog8.compiler.target.cpu6502.codegen.asmsub6502ArgsEvalOrder
-import prog8.compiler.target.cpu6502.codegen.asmsub6502ArgsHaveRegisterClobberRisk
-import prog8.compiler.target.cx16.CX16MachineDefinition
-import prog8.compilerinterface.ICompilationTarget
-
-
-object Cx16Target: ICompilationTarget {
-    override val name = "cx16"
-    override val machine = CX16MachineDefinition()
-    override fun encodeString(str: String, altEncoding: Boolean): List<UByte> {
-        val coded = if (altEncoding) Petscii.encodeScreencode(str, true) else Petscii.encodePetscii(str, true)
-        return coded.fold(
-            failure = { throw it },
-            success = { it }
-        )
-    }
-    override fun decodeString(bytes: List<UByte>, altEncoding: Boolean) =
-        if (altEncoding) Petscii.decodeScreencode(bytes, true) else Petscii.decodePetscii(bytes, true)
-
-    override fun asmsubArgsEvalOrder(sub: Subroutine): List<Int> =
-        asmsub6502ArgsEvalOrder(sub)
-    override fun asmsubArgsHaveRegisterClobberRisk(args: List<Expression>, paramRegisters: List<RegisterOrStatusflag>) =
-        asmsub6502ArgsHaveRegisterClobberRisk(args, paramRegisters)
-
-    override fun memorySize(dt: DataType): Int {
-        return when(dt) {
-            in ByteDatatypes -> 1
-            in WordDatatypes -> 2
-            DataType.FLOAT -> machine.FLOAT_MEM_SIZE
-            in PassByReferenceDatatypes -> machine.POINTER_MEM_SIZE
-            else -> Int.MIN_VALUE
-        }
-    }
-}
-

codeGeneration/src/prog8/compiler/target/cbm/AssemblyProgram.kt

@@ -1,103 +0,0 @@
-package prog8.compiler.target.cbm
-
-import com.github.michaelbull.result.Ok
-import com.github.michaelbull.result.Result
-import com.github.michaelbull.result.mapError
-import prog8.compilerinterface.CompilationOptions
-import prog8.compilerinterface.IAssemblyProgram
-import prog8.compilerinterface.OutputType
-import prog8.compilerinterface.generatedLabelPrefix
-import prog8.parser.SourceCode
-import java.io.File
-import java.nio.file.Path
-import kotlin.io.path.Path
-import kotlin.io.path.isRegularFile
-
-
-internal const val viceMonListPostfix = "vice-mon-list"
-
-class AssemblyProgram(
-        override val valid: Boolean,
-        override val name: String,
-        outputDir: Path,
-        private val compTarget: String) : IAssemblyProgram {
-
-    private val assemblyFile = outputDir.resolve("$name.asm")
-    private val prgFile = outputDir.resolve("$name.prg")
-    private val binFile = outputDir.resolve("$name.bin")
-    private val viceMonListFile = outputDir.resolve("$name.$viceMonListPostfix")
-
-    override fun assemble(quiet: Boolean, options: CompilationOptions): Int {
-        // add "-Wlong-branch"  to see warnings about conversion of branch instructions to jumps (default = do this silently)
-        val command = mutableListOf("64tass", "--ascii", "--case-sensitive", "--long-branch",
-                "-Wall", "-Wno-strict-bool", "-Wno-shadow", // "-Werror",
-                "--dump-labels", "--vice-labels", "-l", viceMonListFile.toString(), "--no-monitor")
-
-        if(quiet)
-            command.add("--quiet")
-
-        val outFile = when (options.output) {
-            OutputType.PRG -> {
-                command.add("--cbm-prg")
-                println("\nCreating prg for target $compTarget.")
-                prgFile
-            }
-            OutputType.RAW -> {
-                command.add("--nostart")
-                println("\nCreating raw binary for target $compTarget.")
-                binFile
-            }
-        }
-        command.addAll(listOf("--output", outFile.toString(), assemblyFile.toString()))
-
-        val proc = ProcessBuilder(command).inheritIO().start()
-        val result = proc.waitFor()
-        if (result == 0) {
-            removeGeneratedLabelsFromMonlist()
-            generateBreakpointList()
-        }
-        return result
-    }
-
-    private fun removeGeneratedLabelsFromMonlist() {
-        val pattern = Regex("""al (\w+) \S+${generatedLabelPrefix}.+?""")
-        val lines = viceMonListFile.toFile().readLines()
-        viceMonListFile.toFile().outputStream().bufferedWriter().use {
-            for (line in lines) {
-                if(pattern.matchEntire(line)==null)
-                    it.write(line+"\n")
-            }
-        }
-    }
-
-    private fun generateBreakpointList() {
-        // builds list of breakpoints, appends to monitor list file
-        val breakpoints = mutableListOf<String>()
-        val pattern = Regex("""al (\w+) \S+_prog8_breakpoint_\d+.?""")      // gather breakpoints by the source label that's generated for them
-        for (line in viceMonListFile.toFile().readLines()) {
-            val match = pattern.matchEntire(line)
-            if (match != null)
-                breakpoints.add("break \$" + match.groupValues[1])
-        }
-        val num = breakpoints.size
-        breakpoints.add(0, "; vice monitor breakpoint list now follows")
-        breakpoints.add(1, "; $num breakpoints have been defined")
-        breakpoints.add(2, "del")
-        viceMonListFile.toFile().appendText(breakpoints.joinToString("\n") + "\n")
-    }
-}
-
-
-internal fun loadAsmIncludeFile(filename: String, source: SourceCode): Result<String, NoSuchFileException> {
-    return if (filename.startsWith(SourceCode.libraryFilePrefix)) {
-        return com.github.michaelbull.result.runCatching {
-            SourceCode.Resource("/prog8lib/${filename.substring(SourceCode.libraryFilePrefix.length)}").readText()
-        }.mapError { NoSuchFileException(File(filename)) }
-    } else {
-        val sib = Path(source.origin).resolveSibling(filename)
-        if (sib.isRegularFile())
-            Ok(SourceCode.File(sib).readText())
-        else
-            Ok(SourceCode.File(Path(filename)).readText())
-    }
-}

codeGeneration/src/prog8/compiler/target/cpu6502/codegen/FunctionCallAsmGen.kt

@@ -1,362 +0,0 @@
-package prog8.compiler.target.cpu6502.codegen
-
-import prog8.ast.IFunctionCall
-import prog8.ast.Node
-import prog8.ast.Program
-import prog8.ast.base.*
-import prog8.ast.expressions.*
-import prog8.ast.statements.*
-import prog8.compiler.target.AssemblyError
-import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignSource
-import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget
-import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignment
-import prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind
-import prog8.compilerinterface.CpuType
-
-
-internal class FunctionCallAsmGen(private val program: Program, private val asmgen: AsmGen) {
-
-    internal fun translateFunctionCallStatement(stmt: IFunctionCall) {
-        saveXbeforeCall(stmt)
-        translateFunctionCall(stmt, false)
-        restoreXafterCall(stmt)
-        // just ignore any result values from the function call.
-    }
-
-    internal fun saveXbeforeCall(stmt: IFunctionCall) {
-        val sub = stmt.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${stmt.target}")
-        if(sub.shouldSaveX()) {
-            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
-            if(regSaveOnStack)
-                asmgen.saveRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnEntry)
-            else
-                asmgen.saveRegisterLocal(CpuRegister.X, (stmt as Node).definingSubroutine!!)
-        }
-    }
-
-    internal fun saveXbeforeCall(gosub: GoSub) {
-        val sub = gosub.identifier?.targetSubroutine(program)
-        if(sub?.shouldSaveX()==true) {
-            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
-            if(regSaveOnStack)
-                asmgen.saveRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnEntry)
-            else
-                asmgen.saveRegisterLocal(CpuRegister.X, gosub.definingSubroutine!!)
-        }
-    }
-
-    internal fun restoreXafterCall(stmt: IFunctionCall) {
-        val sub = stmt.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${stmt.target}")
-        if(sub.shouldSaveX()) {
-            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
-            if(regSaveOnStack)
-                asmgen.restoreRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnReturn)
-            else
-                asmgen.restoreRegisterLocal(CpuRegister.X)
-        }
-    }
-
-    internal fun restoreXafterCall(gosub: GoSub) {
-        val sub = gosub.identifier?.targetSubroutine(program)
-        if(sub?.shouldSaveX()==true) {
-            val regSaveOnStack = sub.asmAddress==null       // rom-routines don't require registers to be saved on stack, normal subroutines do because they can contain nested calls
-            if(regSaveOnStack)
-                asmgen.restoreRegisterStack(CpuRegister.X, sub.shouldKeepA().saveOnReturn)
-            else
-                asmgen.restoreRegisterLocal(CpuRegister.X)
-        }
-    }
-
-    internal fun translateFunctionCall(call: IFunctionCall, isExpression: Boolean) {
-        // Output only the code to set up the parameters and perform the actual call
-        // NOTE: does NOT output the code to deal with the result values!
-        // NOTE: does NOT output code to save/restore the X register for this call! Every caller should deal with this in their own way!!
-        //       (you can use subroutine.shouldSaveX() and saveX()/restoreX() routines as a help for this)
-
-        val sub = call.target.targetSubroutine(program) ?: throw AssemblyError("undefined subroutine ${call.target}")
-        val subAsmName = asmgen.asmSymbolName(call.target)
-
-        if(!isExpression && !sub.isAsmSubroutine)
-            throw AssemblyError("functioncall statements to non-asmsub should have been replaced by GoSub $call")
-
-        if(sub.isAsmSubroutine) {
-            argumentsViaRegisters(sub, call)
-            if (sub.inline && asmgen.options.optimize) {
-                // inline the subroutine.
-                // we do this by copying the subroutine's statements at the call site.
-                // NOTE: *if* there is a return statement, it will be the only one, and the very last statement of the subroutine
-                // (this condition has been enforced by an ast check earlier)
-                asmgen.out("  \t; inlined routine follows: ${sub.name}")
-                val assembly = sub.statements.single() as InlineAssembly
-                asmgen.translate(assembly)
-                asmgen.out("  \t; inlined routine end: ${sub.name}")
-            } else {
-                asmgen.out("  jsr  $subAsmName")
-            }
-        }
-        else {
-            if(sub.inline)
-                throw AssemblyError("can only reliably inline asmsub routines at this time")
-
-            argumentsViaVariables(sub, call)
-            asmgen.out("  jsr  $subAsmName")
-        }
-
-        // remember: dealing with the X register and/or dealing with return values is the responsibility of the caller
-    }
-
-    private fun argumentsViaVariables(sub: Subroutine, call: IFunctionCall) {
-        for(arg in sub.parameters.withIndex().zip(call.args))
-            argumentViaVariable(sub, arg.first, arg.second)
-    }
-
-    private fun argumentsViaRegisters(sub: Subroutine, call: IFunctionCall) {
-        if(sub.parameters.size==1) {
-            argumentViaRegister(sub, IndexedValue(0, sub.parameters.single()), call.args[0])
-        } else {
-            if(asmgen.asmsubArgsHaveRegisterClobberRisk(call.args, sub.asmParameterRegisters)) {
-                registerArgsViaStackEvaluation(call, sub)
-            } else {
-                asmgen.asmsubArgsEvalOrder(sub).forEach {
-                    val param = sub.parameters[it]
-                    val arg = call.args[it]
-                    argumentViaRegister(sub, IndexedValue(it, param), arg)
-                }
-            }
-        }
-    }
-
-    private fun registerArgsViaStackEvaluation(stmt: IFunctionCall, sub: Subroutine) {
-        // this is called when one or more of the arguments are 'complex' and
-        // cannot be assigned to a register easily or risk clobbering other registers.
-        // TODO find another way to prepare the arguments, without using the eval stack
-
-        if(sub.parameters.isEmpty())
-            return
-
-
-        // 1. load all arguments reversed onto the stack: first arg goes last (is on top).
-
-        for (arg in stmt.args.reversed())
-            asmgen.translateExpression(arg)
-
-        // TODO here's an alternative to the above, but for now generates bigger code due to intermediate register steps:
-//        for (arg in stmt.args.reversed()) {
-//            // note this stuff below is needed to (eventually) avoid calling asmgen.translateExpression()
-//            // TODO also This STILL requires the translateNormalAssignment() to be fixed to avoid stack eval for expressions...
-//            val dt = arg.inferType(program).getOr(DataType.UNDEFINED)
-//            asmgen.assignExpressionTo(arg, AsmAssignTarget(TargetStorageKind.STACK, program, asmgen, dt, sub))
-//        }
-
-        var argForCarry: IndexedValue<Pair<Expression, RegisterOrStatusflag>>? = null
-        var argForXregister: IndexedValue<Pair<Expression, RegisterOrStatusflag>>? = null
-        var argForAregister: IndexedValue<Pair<Expression, RegisterOrStatusflag>>? = null
-
-        asmgen.out("  inx")     // align estack pointer
-
-        for(argi in stmt.args.zip(sub.asmParameterRegisters).withIndex()) {
-            val plusIdxStr = if(argi.index==0) "" else "+${argi.index}"
-            when {
-                argi.value.second.statusflag == Statusflag.Pc -> {
-                    require(argForCarry == null)
-                    argForCarry = argi
-                }
-                argi.value.second.statusflag != null -> throw AssemblyError("can only use Carry as status flag parameter")
-                argi.value.second.registerOrPair in arrayOf(RegisterOrPair.X, RegisterOrPair.AX, RegisterOrPair.XY) -> {
-                    require(argForXregister==null)
-                    argForXregister = argi
-                }
-                argi.value.second.registerOrPair in arrayOf(RegisterOrPair.A, RegisterOrPair.AY) -> {
-                    require(argForAregister == null)
-                    argForAregister = argi
-                }
-                argi.value.second.registerOrPair == RegisterOrPair.Y -> {
-                    asmgen.out("  ldy  P8ESTACK_LO$plusIdxStr,x")
-                }
-                argi.value.second.registerOrPair in Cx16VirtualRegisters -> {
-                    // immediately output code to load the virtual register, to avoid clobbering the A register later
-                    when (sub.parameters[argi.index].type) {
-                        in ByteDatatypes -> {
-                            // only load the lsb of the virtual register
-                            asmgen.out(
-                                """
-                                lda  P8ESTACK_LO$plusIdxStr,x
-                                sta  cx16.${argi.value.second.registerOrPair.toString().lowercase()}
-                            """)
-                            if (asmgen.isTargetCpu(CpuType.CPU65c02))
-                                asmgen.out(
-                                    "  stz  cx16.${
-                                        argi.value.second.registerOrPair.toString().lowercase()
-                                    }+1")
-                            else
-                                asmgen.out(
-                                    "  lda  #0 |  sta  cx16.${
-                                        argi.value.second.registerOrPair.toString().lowercase()
-                                    }+1")
-                        }
-                        in WordDatatypes, in IterableDatatypes ->
-                            asmgen.out(
-                                """
-                                lda  P8ESTACK_LO$plusIdxStr,x
-                                sta  cx16.${argi.value.second.registerOrPair.toString().lowercase()}
-                                lda  P8ESTACK_HI$plusIdxStr,x
-                                sta  cx16.${
-                                    argi.value.second.registerOrPair.toString().lowercase()
-                                }+1
-                            """)
-                        else -> throw AssemblyError("weird dt")
-                    }
-                }
-                else -> throw AssemblyError("weird argument")
-            }
-        }
-
-        if(argForCarry!=null) {
-            val plusIdxStr = if(argForCarry.index==0) "" else "+${argForCarry.index}"
-            asmgen.out("""
-                clc
-                lda  P8ESTACK_LO$plusIdxStr,x
-                beq  +
-                sec
-+               php""")             // push the status flags
-        }
-
-        if(argForAregister!=null) {
-            val plusIdxStr = if(argForAregister.index==0) "" else "+${argForAregister.index}"
-            when(argForAregister.value.second.registerOrPair) {
-                RegisterOrPair.A -> asmgen.out("  lda  P8ESTACK_LO$plusIdxStr,x")
-                RegisterOrPair.AY -> asmgen.out("  lda  P8ESTACK_LO$plusIdxStr,x |  ldy  P8ESTACK_HI$plusIdxStr,x")
-                else -> throw AssemblyError("weird arg")
-            }
-        }
-
-        if(argForXregister!=null) {
-            val plusIdxStr = if(argForXregister.index==0) "" else "+${argForXregister.index}"
-
-            if(argForAregister!=null)
-                asmgen.out("  pha")
-            when(argForXregister.value.second.registerOrPair) {
-                RegisterOrPair.X -> asmgen.out("  lda  P8ESTACK_LO$plusIdxStr,x |  tax")
-                RegisterOrPair.AX -> asmgen.out("  ldy  P8ESTACK_LO$plusIdxStr,x |  lda  P8ESTACK_HI$plusIdxStr,x |  tax |  tya")
-                RegisterOrPair.XY -> asmgen.out("  ldy  P8ESTACK_HI$plusIdxStr,x |  lda  P8ESTACK_LO$plusIdxStr,x |  tax")
-                else -> throw AssemblyError("weird arg")
-            }
-            if(argForAregister!=null)
-                asmgen.out("  pla")
-        } else {
-            repeat(sub.parameters.size - 1) { asmgen.out("  inx") }       // unwind stack
-        }
-
-        if(argForCarry!=null)
-            asmgen.out("  plp")       // set the carry flag back to correct value
-    }
-
-    private fun argumentViaVariable(sub: Subroutine, parameter: IndexedValue<SubroutineParameter>, value: Expression) {
-        // pass parameter via a regular variable (not via registers)
-        val valueIDt = value.inferType(program)
-        val valueDt = valueIDt.getOrElse { throw AssemblyError("unknown dt") }
-        if(!isArgumentTypeCompatible(valueDt, parameter.value.type))
-            throw AssemblyError("argument type incompatible")
-
-        val varName = asmgen.asmVariableName(sub.scopedName + parameter.value.name)
-        asmgen.assignExpressionToVariable(value, varName, parameter.value.type, sub)
-    }
-
-    private fun argumentViaRegister(sub: Subroutine, parameter: IndexedValue<SubroutineParameter>, value: Expression) {
-        // pass argument via a register parameter
-        val valueIDt = value.inferType(program)
-        val valueDt = valueIDt.getOrElse { throw AssemblyError("unknown dt") }
-        if(!isArgumentTypeCompatible(valueDt, parameter.value.type))
-            throw AssemblyError("argument type incompatible")
-
-        val paramRegister = sub.asmParameterRegisters[parameter.index]
-        val statusflag = paramRegister.statusflag
-        val register = paramRegister.registerOrPair
-        val requiredDt = parameter.value.type
-        if(requiredDt!=valueDt) {
-            if(valueDt largerThan requiredDt)
-                throw AssemblyError("can only convert byte values to word param types")
-        }
-        if (statusflag!=null) {
-            if(requiredDt!=valueDt)
-                throw AssemblyError("for statusflag, byte value is required")
-            if (statusflag == Statusflag.Pc) {
-                // this param needs to be set last, right before the jsr
-                // for now, this is already enforced on the subroutine definition by the Ast Checker
-                when(value) {
-                    is NumericLiteralValue -> {
-                        val carrySet = value.number.toInt() != 0
-                        asmgen.out(if(carrySet) "  sec" else "  clc")
-                    }
-                    is IdentifierReference -> {
-                        val sourceName = asmgen.asmVariableName(value)
-                        asmgen.out("""
-                pha
-                clc
-                lda  $sourceName
-                beq  +
-                sec  
-    +           pla
-    """)
-                    }
-                    else -> {
-                        asmgen.assignExpressionToRegister(value, RegisterOrPair.A)
-                        asmgen.out("""
-                                    beq  +
-                                    sec
-                                    bcs  ++
-    +                               clc
-    +""")
-                    }
-                }
-            } else throw AssemblyError("can only use Carry as status flag parameter")
-        }
-        else {
-            // via register or register pair
-            register!!
-            if(requiredDt largerThan valueDt) {
-                // we need to sign extend the source, do this via temporary word variable
-                asmgen.assignExpressionToVariable(value, "P8ZP_SCRATCH_W1", DataType.UBYTE, sub)
-                asmgen.signExtendVariableLsb("P8ZP_SCRATCH_W1", valueDt)
-                asmgen.assignVariableToRegister("P8ZP_SCRATCH_W1", register)
-            } else {
-                val target: AsmAssignTarget =
-                    if(parameter.value.type in ByteDatatypes && (register==RegisterOrPair.AX || register == RegisterOrPair.AY || register==RegisterOrPair.XY || register in Cx16VirtualRegisters))
-                        AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, parameter.value.type, sub, register = register)
-                    else {
-                        val signed = parameter.value.type == DataType.BYTE || parameter.value.type == DataType.WORD
-                        AsmAssignTarget.fromRegisters(register, signed, sub, program, asmgen)
-                    }
-                val src = if(valueDt in PassByReferenceDatatypes) {
-                    if(value is IdentifierReference) {
-                        val addr = AddressOf(value, Position.DUMMY)
-                        AsmAssignSource.fromAstSource(addr, program, asmgen).adjustSignedUnsigned(target)
-                    } else {
-                        AsmAssignSource.fromAstSource(value, program, asmgen).adjustSignedUnsigned(target)
-                    }
-                } else {
-                    AsmAssignSource.fromAstSource(value, program, asmgen).adjustSignedUnsigned(target)
-                }
-                asmgen.translateNormalAssignment(AsmAssignment(src, target, false, program.memsizer, Position.DUMMY))
-            }
-        }
-    }
-
-    private fun isArgumentTypeCompatible(argType: DataType, paramType: DataType): Boolean {
-        if(argType isAssignableTo paramType)
-            return true
-        if(argType in ByteDatatypes && paramType in ByteDatatypes)
-            return true
-        if(argType in WordDatatypes && paramType in WordDatatypes)
-            return true
-
-        // we have a special rule for some types.
-        // strings are assignable to UWORD, for example, and vice versa
-        if(argType==DataType.STR && paramType==DataType.UWORD)
-            return true
-        if(argType==DataType.UWORD && paramType == DataType.STR)
-            return true
-
-        return false
-    }
-}

codeGeneration/src/prog8/compiler/target/cx16/CX16MachineDefinition.kt

@@ -1,102 +0,0 @@
-package prog8.compiler.target.cx16
-
-import prog8.ast.base.DataType
-import prog8.compiler.target.cbm.Mflpt5
-import prog8.compiler.target.cbm.viceMonListPostfix
-import prog8.compilerinterface.*
-import java.io.IOException
-import java.nio.file.Path
-
-
-class CX16MachineDefinition: IMachineDefinition {
-
-    override val cpu = CpuType.CPU65c02
-
-    override val FLOAT_MAX_POSITIVE = Mflpt5.FLOAT_MAX_POSITIVE
-    override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
-    override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
-    override val POINTER_MEM_SIZE = 2
-    override val BASIC_LOAD_ADDRESS = 0x0801u
-    override val RAW_LOAD_ADDRESS = 0x8000u
-
-    // the 2*256 byte evaluation stack (on which bytes, words, and even floats are stored during calculations)
-    override val ESTACK_LO = 0x0400u        //  $0400-$04ff inclusive
-    override val ESTACK_HI = 0x0500u        //  $0500-$05ff inclusive
-
-    override lateinit var zeropage: Zeropage
-
-    override fun getFloat(num: Number) = Mflpt5.fromNumber(num)
-    override fun importLibs(compilerOptions: CompilationOptions, compilationTargetName: String): List<String> {
-        return if (compilerOptions.launcher == LauncherType.BASIC || compilerOptions.output == OutputType.PRG)
-            listOf("syslib")
-        else
-            emptyList()
-    }
-
-    override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
-        val emulatorName: String
-        val extraArgs: List<String>
-
-        when(selectedEmulator) {
-            1 -> {
-                emulatorName = "x16emu"
-                extraArgs = emptyList()
-            }
-            2 -> {
-                emulatorName = "box16"
-                extraArgs = listOf("-sym", "${programNameWithPath}.$viceMonListPostfix")
-            }
-            else -> {
-                System.err.println("Cx16 target only supports x16emu and box16 emulators.")
-                return
-            }
-        }
-
-        for(emulator in listOf(emulatorName)) {
-            println("\nStarting Commander X16 emulator $emulator...")
-            val cmdline = listOf(emulator, "-scale", "2", "-run", "-prg", "${programNameWithPath}.prg") + extraArgs
-            val processb = ProcessBuilder(cmdline).inheritIO()
-            val process: Process
-            try {
-                process=processb.start()
-            } catch(x: IOException) {
-                continue  // try the next emulator executable
-            }
-            process.waitFor()
-            break
-        }
-    }
-
-    override fun isIOAddress(address: UInt): Boolean = address==0u || address==1u || address in 0x9f00u..0x9fffu
-    override fun getPreallocatedZeropageVars(): Map<String, Pair<UInt, DataType>> {
-        val vars = mutableMapOf<String, Pair<UInt, DataType>>()
-        for(reg in 0..15) {
-            vars["cx16.r${reg}"] = (2+reg*2).toUInt() to DataType.UWORD        // cx16.r0 .. cx16.r15
-            vars["cx16.r${reg}s"] = (2+reg*2).toUInt() to DataType.WORD        // cx16.r0s .. cx16.r15s
-            vars["cx16.r${reg}L"] = (2+reg*2).toUInt() to DataType.UBYTE       // cx16.r0L .. cx16.r15L
-            vars["cx16.r${reg}H"] = (3+reg*2).toUInt() to DataType.UBYTE       // cx16.r0H .. cx16.r15H
-            vars["cx16.r${reg}sL"] = (2+reg*2).toUInt() to DataType.BYTE       // cx16.r0sL .. cx16.r15sL
-            vars["cx16.r${reg}sH"] = (3+reg*2).toUInt() to DataType.BYTE       // cx16.r0sH .. cx16.r15sH
-        }
-        return vars
-    }
-
-    override fun initializeZeropage(compilerOptions: CompilationOptions) {
-        zeropage = CX16Zeropage(compilerOptions)
-    }
-
-    // 6502 opcodes (including aliases and illegal opcodes), these cannot be used as variable or label names
-    override val opcodeNames = setOf("adc", "and", "asl", "bcc", "bcs",
-            "beq", "bge", "bit", "blt", "bmi", "bne", "bpl", "brk", "bvc", "bvs", "clc",
-            "cld", "cli", "clv", "cmp", "cpx", "cpy", "dec", "dex", "dey",
-            "eor", "gcc", "gcs", "geq", "gge", "glt", "gmi", "gne", "gpl", "gvc", "gvs",
-            "inc", "inx", "iny", "jmp", "jsr",
-            "lda", "ldx", "ldy", "lsr", "nop", "ora", "pha", "php",
-            "pla", "plp", "rol", "ror", "rti", "rts", "sbc",
-            "sec", "sed", "sei",
-            "sta", "stx", "sty", "tax", "tay", "tsx", "txa", "txs", "tya",
-            "bra", "phx", "phy", "plx", "ply", "stz", "trb", "tsb", "bbr", "bbs",
-            "rmb", "smb", "stp", "wai")
-
-
-}

codeGeneration/src/prog8/compiler/target/cx16/CX16Zeropage.kt

@@ -1,41 +0,0 @@
-package prog8.compiler.target.cx16
-
-import prog8.compilerinterface.CompilationOptions
-import prog8.compilerinterface.InternalCompilerException
-import prog8.compilerinterface.Zeropage
-import prog8.compilerinterface.ZeropageType
-
-class CX16Zeropage(options: CompilationOptions) : Zeropage(options) {
-
-    override val SCRATCH_B1 = 0x7au      // temp storage for a single byte
-    override val SCRATCH_REG = 0x7bu     // temp storage for a register, must be B1+1
-    override val SCRATCH_W1 = 0x7cu      // temp storage 1 for a word  $7c+$7d
-    override val SCRATCH_W2 = 0x7eu      // temp storage 2 for a word  $7e+$7f
-
-
-    init {
-        if (options.floats && options.zeropage !in arrayOf(ZeropageType.BASICSAFE, ZeropageType.DONTUSE))
-            throw InternalCompilerException("when floats are enabled, zero page type should be 'basicsafe' or 'dontuse'")
-
-        // the addresses 0x02 to 0x21 (inclusive) are taken for sixteen virtual 16-bit api registers.
-
-        when (options.zeropage) {
-            ZeropageType.FULL -> {
-                free.addAll(0x22u..0xffu)
-            }
-            ZeropageType.KERNALSAFE -> {
-                free.addAll(0x22u..0x7fu)
-                free.addAll(0xa9u..0xffu)
-            }
-            ZeropageType.BASICSAFE -> {
-                free.addAll(0x22u..0x7fu)
-            }
-            ZeropageType.DONTUSE -> {
-                free.clear() // don't use zeropage at all
-            }
-            else -> throw InternalCompilerException("for this machine target, zero page type 'floatsafe' is not available. ${options.zeropage}")
-        }
-
-        removeReservedFromFreePool()
-    }
-}

codeOptimizers/build.gradle

@@ -24,7 +24,7 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':compilerInterfaces')
+    implementation project(':codeCore')
     implementation project(':compilerAst')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"

codeOptimizers/codeOptimizers.iml

@@ -9,7 +9,7 @@
     <orderEntry type="inheritedJdk" />
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
-    <orderEntry type="module" module-name="compilerInterfaces" />
+    <orderEntry type="module" module-name="codeCore" />
     <orderEntry type="module" module-name="compilerAst" />
   </component>
 </module>

codeOptimizers/src/prog8/optimizer/BinExprSplitter.kt

@@ -3,26 +3,29 @@ package prog8.optimizer
 import prog8.ast.IStatementContainer
 import prog8.ast.Node
 import prog8.ast.Program
-import prog8.ast.base.DataType
-import prog8.ast.base.FatalAstException
 import prog8.ast.expressions.BinaryExpression
 import prog8.ast.expressions.IdentifierReference
 import prog8.ast.expressions.TypecastExpression
-import prog8.ast.expressions.augmentAssignmentOperators
+import prog8.ast.getTempVar
 import prog8.ast.statements.AssignTarget
 import prog8.ast.statements.Assignment
+import prog8.ast.statements.AssignmentOrigin
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
-import prog8.compilerinterface.CompilationOptions
-import prog8.compilerinterface.ICompilationTarget
-import prog8.compilerinterface.isIOAddress
+import prog8.code.core.AugmentAssignmentOperators
+import prog8.code.core.CompilationOptions
+import prog8.code.core.DataType
+import prog8.code.target.VMTarget
 
 
-class BinExprSplitter(private val program: Program, private val options: CompilationOptions, private val compTarget: ICompilationTarget) : AstWalker() {
+class BinExprSplitter(private val program: Program, private val options: CompilationOptions) : AstWalker() {
 
     override fun after(assignment: Assignment, parent: Node): Iterable<IAstModification> {
 
-        if(assignment.value.inferType(program).istype(DataType.FLOAT) && !options.optimizeFloatExpressions)
+        if(options.compTarget.name == VMTarget.NAME)
+            return noModifications  // don't split expressions when targeting the vm codegen, it handles nested expressions well
+
+        if(assignment.value.inferType(program) istype DataType.FLOAT && !options.optimizeFloatExpressions)
             return noModifications
 
         val binExpr = assignment.value as? BinaryExpression
@@ -45,7 +48,7 @@ X =      BinExpr                                    X   =   LeftExpr
 
 
  */
-            if(binExpr.operator in augmentAssignmentOperators && isSimpleTarget(assignment.target)) {
+            if(binExpr.operator in AugmentAssignmentOperators && isSimpleTarget(assignment.target)) {
                 if(assignment.target isSameAs binExpr.right)
                     return noModifications
                 if(assignment.target isSameAs binExpr.left) {
@@ -74,7 +77,7 @@ X =      BinExpr                                    X   =   LeftExpr
                 }
 
                 if(binExpr.right.isSimple) {
-                    val firstAssign = Assignment(assignment.target.copy(), binExpr.left, binExpr.left.position)
+                    val firstAssign = Assignment(assignment.target.copy(), binExpr.left, AssignmentOrigin.OPTIMIZER, binExpr.left.position)
                     val targetExpr = assignment.target.toExpression()
                     val augExpr = BinaryExpression(targetExpr, binExpr.operator, binExpr.right, binExpr.right.position)
                     return listOf(
@@ -92,26 +95,20 @@ X =      BinExpr                                    X   =   LeftExpr
         val typecast = assignment.value as? TypecastExpression
         if(typecast!=null) {
             val origExpr = typecast.expression as? BinaryExpression
-            if(origExpr!=null) {
+            if(origExpr!=null && options.compTarget.name!=VMTarget.NAME) {
                 // it's a typecast of a binary expression.
                 // we can see if we can unwrap the binary expression by working on a new temporary variable
                 // (that has the type of the expression), and then finally doing the typecast.
                 // Once it's outside the typecast, the regular splitting can commence.
-                val tempVar = when(val tempDt = origExpr.inferType(program).getOr(DataType.UNDEFINED)) {
-                    DataType.UBYTE -> listOf("prog8_lib", "retval_interm_ub")
-                    DataType.BYTE -> listOf("prog8_lib", "retval_interm_b")
-                    DataType.UWORD -> listOf("prog8_lib", "retval_interm_uw")
-                    DataType.WORD -> listOf("prog8_lib", "retval_interm_w")
-                    DataType.FLOAT -> listOf("floats", "tempvar_swap_float")
-                    else -> throw FatalAstException("invalid dt $tempDt")
-                }
+                val tempvarDt = origExpr.inferType(program).getOr(DataType.UNDEFINED)
+                val (tempVarName, _) = program.getTempVar(tempvarDt)
                 val assignTempVar = Assignment(
-                    AssignTarget(IdentifierReference(tempVar, typecast.position), null, null, typecast.position),
-                    typecast.expression, typecast.position
+                    AssignTarget(IdentifierReference(tempVarName, typecast.position), null, null, typecast.position),
+                    typecast.expression, AssignmentOrigin.OPTIMIZER, typecast.position
                 )
                 return listOf(
                     IAstModification.InsertBefore(assignment, assignTempVar, parent as IStatementContainer),
-                    IAstModification.ReplaceNode(typecast.expression, IdentifierReference(tempVar, typecast.position), typecast)
+                    IAstModification.ReplaceNode(typecast.expression, IdentifierReference(tempVarName, typecast.position), typecast)
                 )
             }
         }
@@ -121,7 +118,7 @@ X =      BinExpr                                    X   =   LeftExpr
 
     private fun isSimpleTarget(target: AssignTarget) =
             if (target.identifier!=null || target.memoryAddress!=null)
-                !target.isIOAddress(compTarget.machine)
+                !target.isIOAddress(options.compTarget.machine)
             else
                 false