version 8.7

fixed virtual machine string comparison syscall

.idea/misc.xml

@@ -19,7 +19,7 @@
   <component name="FrameworkDetectionExcludesConfiguration">
     <type id="Python" />
   </component>
-  <component name="ProjectRootManager" version="2" languageLevel="JDK_11" project-jdk-name="11" project-jdk-type="JavaSDK">
+  <component name="ProjectRootManager" version="2" languageLevel="JDK_11" default="true" project-jdk-name="11" project-jdk-type="JavaSDK">
     <output url="file://$PROJECT_DIR$/out" />
   </component>
 </project>

.idea/modules.xml

@@ -2,10 +2,10 @@
 <project version="4">
   <component name="ProjectModuleManager">
     <modules>
-      <module fileurl="file://$PROJECT_DIR$/codeAst/codeAst.iml" filepath="$PROJECT_DIR$/codeAst/codeAst.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeCore/codeCore.iml" filepath="$PROJECT_DIR$/codeCore/codeCore.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeGenCpu6502/codeGenCpu6502.iml" filepath="$PROJECT_DIR$/codeGenCpu6502/codeGenCpu6502.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeGenExperimental/codeGenExperimental.iml" filepath="$PROJECT_DIR$/codeGenExperimental/codeGenExperimental.iml" />
+      <module fileurl="file://$PROJECT_DIR$/codeGenIntermediate/codeGenIntermediate.iml" filepath="$PROJECT_DIR$/codeGenIntermediate/codeGenIntermediate.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeGenVirtual/codeGenVirtual.iml" filepath="$PROJECT_DIR$/codeGenVirtual/codeGenVirtual.iml" />
       <module fileurl="file://$PROJECT_DIR$/codeOptimizers/codeOptimizers.iml" filepath="$PROJECT_DIR$/codeOptimizers/codeOptimizers.iml" />
       <module fileurl="file://$PROJECT_DIR$/compiler/compiler.iml" filepath="$PROJECT_DIR$/compiler/compiler.iml" />
@@ -14,6 +14,7 @@
       <module fileurl="file://$PROJECT_DIR$/docs/docs.iml" filepath="$PROJECT_DIR$/docs/docs.iml" />
       <module fileurl="file://$PROJECT_DIR$/examples/examples.iml" filepath="$PROJECT_DIR$/examples/examples.iml" />
       <module fileurl="file://$PROJECT_DIR$/httpCompilerService/httpCompilerService.iml" filepath="$PROJECT_DIR$/httpCompilerService/httpCompilerService.iml" />
+      <module fileurl="file://$PROJECT_DIR$/intermediate/intermediate.iml" filepath="$PROJECT_DIR$/intermediate/intermediate.iml" />
       <module fileurl="file://$PROJECT_DIR$/parser/parser.iml" filepath="$PROJECT_DIR$/parser/parser.iml" />
       <module fileurl="file://$PROJECT_DIR$/virtualmachine/virtualmachine.iml" filepath="$PROJECT_DIR$/virtualmachine/virtualmachine.iml" />
     </modules>

README.md

@@ -78,6 +78,9 @@ It's handy to have an emulator (or a real machine perhaps!) to run the programs
 of the [Vice emulator](http://vice-emu.sourceforge.net/)  for the C64 target,
 and the [x16emu emulator](https://github.com/commanderx16/x16-emulator) for the CommanderX16 target.
 
+**Syntax highlighting:** for a few different editors, syntax highlighting definition files are provided.
+Look in the [syntax-files](https://github.com/irmen/prog8/tree/master/syntax-files) directory in the github repository to find them.
+
 
 Example code
 ------------

codeCore/src/prog8/code/Either.kt

@@ -1,8 +1,7 @@
-package prog8
+package prog8.code
 
 /**
  * By convention, the right side of an `Either` is used to hold successful values.
- *
  */
 sealed class Either<out L, out R> {
 

codeCore/src/prog8/code/SymbolTable.kt

@@ -5,7 +5,7 @@ import prog8.code.core.*
 
 /**
  * Tree structure containing all symbol definitions in the program
- * (blocks, subroutines, variables (all types) and labels).
+ * (blocks, subroutines, variables (all types), memoryslabs, and labels).
  */
 class SymbolTable : StNode("", StNodeType.GLOBAL, Position.DUMMY) {
     fun print() = printIndented(0)
@@ -54,6 +54,10 @@ class SymbolTable : StNode("", StNodeType.GLOBAL, Position.DUMMY) {
         vars
     }
 
+    val allMemorySlabs: Collection<StMemorySlab> by lazy {
+        children.mapNotNull { if (it.value.type == StNodeType.MEMORYSLAB) it.value as StMemorySlab else null }
+    }
+
     override fun lookup(scopedName: List<String>) = flat[scopedName]
 }
 
@@ -68,7 +72,8 @@ enum class StNodeType {
     STATICVAR,
     MEMVAR,
     CONSTANT,
-    BUILTINFUNC
+    BUILTINFUNC,
+    MEMORYSLAB
 }
 
 
@@ -142,6 +147,7 @@ open class StNode(val name: String,
             StNodeType.LABEL -> print("(L) ")
             StNodeType.STATICVAR -> print("(V) ")
             StNodeType.MEMVAR -> print("(M) ")
+            StNodeType.MEMORYSLAB -> print("(MS) ")
             StNodeType.CONSTANT -> print("(C) ")
             StNodeType.BUILTINFUNC -> print("(F) ")
             StNodeType.ROMSUB -> print("(R) ")
@@ -163,31 +169,41 @@ open class StNode(val name: String,
 
 class StStaticVariable(name: String,
                        val dt: DataType,
-                       val initialNumericValue: Double?,
-                       val initialStringValue: StString?,
-                       val initialArrayValue: StArray?,
+                       val bss: Boolean,
+                       val onetimeInitializationNumericValue: Double?,      // regular (every-run-time) initialization is done via regular assignments
+                       val onetimeInitializationStringValue: StString?,
+                       val onetimeInitializationArrayValue: StArray?,
                        val length: Int?,             // for arrays: the number of elements, for strings: number of characters *including* the terminating 0-byte
                        val zpwish: ZeropageWish,
                        position: Position) : StNode(name, StNodeType.STATICVAR, position) {
 
     init {
-        if(length!=null) {
-            require(initialNumericValue == null)
-            if(initialArrayValue!=null)
-                require(length == initialArrayValue.size)
+        if(bss) {
+            require(onetimeInitializationNumericValue==null)
+            require(onetimeInitializationStringValue==null)
+            require(onetimeInitializationArrayValue.isNullOrEmpty())
+        } else {
+            require(onetimeInitializationNumericValue!=null ||
+                    onetimeInitializationStringValue!=null ||
+                    onetimeInitializationArrayValue!=null)
         }
-        if(initialNumericValue!=null)
+        if(length!=null) {
+            require(onetimeInitializationNumericValue == null)
+            if(onetimeInitializationArrayValue!=null)
+                require(onetimeInitializationArrayValue.isEmpty() ||onetimeInitializationArrayValue.size==length)
+        }
+        if(onetimeInitializationNumericValue!=null)
             require(dt in NumericDatatypes)
-        if(initialArrayValue!=null)
+        if(onetimeInitializationArrayValue!=null)
             require(dt in ArrayDatatypes)
-        if(initialStringValue!=null) {
+        if(onetimeInitializationStringValue!=null) {
             require(dt == DataType.STR)
-            require(length == initialStringValue.first.length+1)
+            require(length == onetimeInitializationStringValue.first.length+1)
         }
     }
 
     override fun printProperties() {
-        print("$name  dt=$dt  zpw=$zpwish")
+        print("$name  dt=$dt  zpw=$zpwish  bss=$bss")
     }
 }
 
@@ -211,6 +227,17 @@ class StMemVar(name: String,
     }
 }
 
+class StMemorySlab(
+    name: String,
+    val size: UInt,
+    val align: UInt,
+    position: Position
+):
+    StNode(name, StNodeType.MEMORYSLAB, position) {
+    override fun printProperties() {
+        print("$name  size=$size  align=$align")
+    }
+}
 
 class StSub(name: String, val parameters: List<StSubroutineParameter>, val returnType: DataType?, position: Position) :
         StNode(name, StNodeType.SUBROUTINE, position) {
@@ -220,7 +247,11 @@ class StSub(name: String, val parameters: List<StSubroutineParameter>, val retur
 }
 
 
-class StRomSub(name: String, val address: UInt, val parameters: List<StSubroutineParameter>, val returnTypes: List<DataType>, position: Position) :
+class StRomSub(name: String,
+               val address: UInt,
+               val parameters: List<StRomSubParameter>,
+               val returns: List<RegisterOrStatusflag>,
+               position: Position) :
     StNode(name, StNodeType.ROMSUB, position) {
     override fun printProperties() {
         print("$name  address=${address.toHex()}")
@@ -229,6 +260,7 @@ class StRomSub(name: String, val address: UInt, val parameters: List<StSubroutin
 
 
 class StSubroutineParameter(val name: String, val type: DataType)
+class StRomSubParameter(val register: RegisterOrStatusflag, val type: DataType)
 class StArrayElement(val number: Double?, val addressOf: List<String>?)
 
 typealias StString = Pair<String, Encoding>

codeCore/src/prog8/code/ast/AstBase.kt

@@ -3,7 +3,7 @@ package prog8.code.ast
 import prog8.code.core.*
 import java.nio.file.Path
 
-// New (work-in-progress) simplified AST for the code generator.
+// New simplified AST for the code generator.
 
 
 sealed class PtNode(val position: Position) {
@@ -42,7 +42,7 @@ class PtNodeGroup : PtNode(Position.DUMMY) {
 }
 
 
-abstract class PtNamedNode(val name: String, position: Position): PtNode(position) {
+sealed class PtNamedNode(val name: String, position: Position): PtNode(position) {
     val scopedName: List<String> by lazy {
         var namedParent: PtNode = this.parent
         if(namedParent is PtProgram)
@@ -96,8 +96,13 @@ class PtBlock(name: String,
 }
 
 
-class PtInlineAssembly(val assembly: String, position: Position) : PtNode(position) {
+class PtInlineAssembly(val assembly: String, val isIR: Boolean, position: Position) : PtNode(position) {
     override fun printProperties() {}
+
+    init {
+        require(!assembly.startsWith('\n') && !assembly.startsWith('\r')) { "inline assembly should be trimmed" }
+        require(!assembly.endsWith('\n') && !assembly.endsWith('\r')) { "inline assembly should be trimmed" }
+    }
 }
 
 

codeCore/src/prog8/code/ast/AstExpressions.kt

@@ -173,8 +173,7 @@ class PtPrefix(val operator: String, type: DataType, position: Position): PtExpr
 
     init {
         // note: the "not" operator may no longer occur in the ast; not x should have been replaced with x==0
-        if(operator !in setOf("+", "-", "~"))
-            throw IllegalArgumentException("invalid prefix operator: $operator")
+        require(operator in setOf("+", "-", "~")) { "invalid prefix operator: $operator" }
     }
 
     override fun printProperties() {

codeCore/src/prog8/code/ast/AstStatements.kt

@@ -8,7 +8,7 @@ class PtAsmSub(
     val address: UInt?,
     val clobbers: Set<CpuRegister>,
     val parameters: List<Pair<PtSubroutineParameter, RegisterOrStatusflag>>,
-    val returnTypes: List<DataType>,
+    val returnTypes: List<DataType>,    // TODO join with register as Pairs ?
     val retvalRegisters: List<RegisterOrStatusflag>,
     val inline: Boolean,
     position: Position
@@ -29,6 +29,14 @@ class PtSub(
     override fun printProperties() {
         print(name)
     }
+
+    init {
+        // params and return value should not be str
+        if(parameters.any{ it.type !in NumericDatatypes })
+            throw AssemblyError("non-numeric parameter")
+        if(returntype!=null && returntype !in NumericDatatypes)
+            throw AssemblyError("non-numeric returntype $returntype")
+    }
 }
 
 

codeCore/src/prog8/code/core/CompilationOptions.kt

@@ -20,6 +20,7 @@ class CompilationOptions(val output: OutputType,
                          var asmQuiet: Boolean = false,
                          var asmListfile: Boolean = false,
                          var experimentalCodegen: Boolean = false,
+                         var keepIR: Boolean = false,
                          var evalStackBaseAddress: UInt? = null,
                          var outputDir: Path = Path(""),
                          var symbolDefs: Map<String, String> = emptyMap()

codeCore/src/prog8/code/core/SourceCode.kt

@@ -106,7 +106,7 @@ sealed class SourceCode {
      * [origin]: `library:/x/y/z.p8` for a given `pathString` of "x/y/z.p8"
      */
     class Resource(pathString: String): SourceCode() {
-        private val normalized = "/" + Path.of(pathString).normalize().toMutableList().joinToString("/")
+        private val normalized = "/" + Path(pathString).normalize().toMutableList().joinToString("/")
 
         override val isFromResources = true
         override val isFromFilesystem = false
@@ -125,7 +125,7 @@ sealed class SourceCode {
             }
             val stream = object {}.javaClass.getResourceAsStream(normalized)
             text = stream!!.reader().use { it.readText() }
-            name = Path.of(pathString).toFile().nameWithoutExtension
+            name = Path(pathString).toFile().nameWithoutExtension
         }
     }
 

codeCore/src/prog8/code/target/virtual/VirtualMachineDefinition.kt

@@ -4,9 +4,10 @@ import prog8.code.core.CompilationOptions
 import prog8.code.core.CpuType
 import prog8.code.core.IMachineDefinition
 import prog8.code.core.Zeropage
-import java.io.File
 import java.nio.file.Path
-
+import kotlin.io.path.isReadable
+import kotlin.io.path.name
+import kotlin.io.path.readText
 
 class VirtualMachineDefinition: IMachineDefinition {
 
@@ -30,10 +31,18 @@ class VirtualMachineDefinition: IMachineDefinition {
 
     override fun launchEmulator(selectedEmulator: Int, programNameWithPath: Path) {
         println("\nStarting Virtual Machine...")
-        // to not have external module dependencies we launch the virtual machine via reflection
+        // to not have external module dependencies in our own module, we launch the virtual machine via reflection
         val vm = Class.forName("prog8.vm.VmRunner").getDeclaredConstructor().newInstance() as IVirtualMachineRunner
-        val source = File("$programNameWithPath.p8virt").readText()
-        vm.runProgram(source, true)
+        val filename = programNameWithPath.name
+        if(programNameWithPath.isReadable()) {
+            vm.runProgram(programNameWithPath.readText())
+        } else {
+            val withExt = programNameWithPath.resolveSibling("$filename.p8ir")
+            if(withExt.isReadable())
+                vm.runProgram(withExt.readText())
+            else
+                throw NoSuchFileException(withExt.toFile(), reason="not a .p8ir file")
+        }
     }
 
     override fun isIOAddress(address: UInt): Boolean = false
@@ -44,5 +53,5 @@ class VirtualMachineDefinition: IMachineDefinition {
 }
 
 interface IVirtualMachineRunner {
-    fun runProgram(source: String, throttle: Boolean)
+    fun runProgram(irSource: CharSequence)
 }

codeGenCpu6502/build.gradle

@@ -24,7 +24,6 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':codeAst')
     implementation project(':codeCore')
     implementation project(':compilerAst')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"

codeGenCpu6502/codeGenCpu6502.iml

@@ -9,7 +9,6 @@
     <orderEntry type="inheritedJdk" />
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
-    <orderEntry type="module" module-name="codeAst" />
     <orderEntry type="module" module-name="codeCore" />
     <orderEntry type="module" module-name="compilerAst" />
     <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />

codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt

@@ -41,7 +41,7 @@ class AsmGen(internal val program: Program,
     private val expressionsAsmGen = ExpressionsAsmGen(program, this, allocator)
     private val programGen = ProgramAndVarsGen(program, options, errors, symbolTable, functioncallAsmGen, this, allocator, zeropage)
     private val assignmentAsmGen = AssignmentAsmGen(program, this, allocator)
-    private val builtinFunctionsAsmGen = BuiltinFunctionsAsmGen(program, this, assignmentAsmGen, allocator)
+    private val builtinFunctionsAsmGen = BuiltinFunctionsAsmGen(program, this, assignmentAsmGen)
 
     override fun compileToAssembly(): IAssemblyProgram? {
 
@@ -77,7 +77,7 @@ class AsmGen(internal val program: Program,
     }
 
     internal fun out(str: String, splitlines: Boolean = true) {
-        val fragment = (if(splitlines && " | " in str) str.replace("|", "\n") else str).trim('\n')
+        val fragment = (if(splitlines && " | " in str) str.replace("|", "\n") else str).trim('\r', '\n')
         if (splitlines) {
             for (line in fragment.splitToSequence('\n')) {
                 val trimmed = if (line.startsWith(' ')) "\t" + line.trim() else line
@@ -106,7 +106,7 @@ class AsmGen(internal val program: Program,
             DataType.BYTE -> listOf("cx16", "r9sL")
             DataType.UWORD -> listOf("cx16", "r9")
             DataType.WORD -> listOf("cx16", "r9s")
-            DataType.FLOAT -> listOf("floats", "tempvar_swap_float")      // defined in floats.p8
+            DataType.FLOAT -> TODO("no temporary float var available")
             else -> throw FatalAstException("invalid dt $dt")
         }
     }
@@ -838,7 +838,7 @@ $repeatLabel    lda  $counterVar
                 if(stmt.definingModule.source is SourceCode.Generated)
                     throw AssemblyError("%asminclude inside non-library/non-filesystem module not yet supported")
                 loadAsmIncludeFile(includedName, stmt.definingModule.source).fold(
-                    success = { assemblyLines.add(it.trimEnd().trimStart('\n')) },
+                    success = { assemblyLines.add(it.trimEnd().trimStart('\r', '\n')) },
                     failure = { errors.err(it.toString(), stmt.position) }
                 )
             }
@@ -909,8 +909,7 @@ $repeatLabel    lda  $counterVar
     }
 
     private fun translate(asm: InlineAssembly) {
-        val assembly = asm.assembly.trimEnd().trimStart('\n')
-        assemblyLines.add(assembly)
+        assemblyLines.add(asm.assembly.trimEnd().trimStart('\r', '\n'))
     }
 
     internal fun returnRegisterOfFunction(it: IdentifierReference): RegisterOrPair {

codeGenCpu6502/src/prog8/codegen/cpu6502/AsmOptimizer.kt

@@ -59,6 +59,13 @@ internal fun optimizeAssembly(lines: MutableList<String>, machine: IMachineDefin
         numberOfOptimizations++
     }
 
+    mods = optimizeSamePointerIndexing(linesByFourteen, machine, program)
+    if(mods.isNotEmpty()) {
+        apply(mods, lines)
+        linesByFourteen = getLinesBy(lines, 14)
+        numberOfOptimizations++
+    }
+
     // TODO more assembly peephole optimizations
 
     return numberOfOptimizations
@@ -320,6 +327,48 @@ private fun optimizeSameAssignments(linesByFourteen: List<List<IndexedValue<Stri
     return mods
 }
 
+private fun optimizeSamePointerIndexing(linesByFourteen: List<List<IndexedValue<String>>>, machine: IMachineDefinition, program: Program): List<Modification> {
+
+    // Optimize same pointer indexing where for instance we load and store to the same ptr index in Y
+    // if Y isn't modified in between we can omit the second LDY:
+    //    ldy  #0
+    //    lda  (ptr),y
+    //    ora  #3       ; <-- instruction(s) that don't modify Y
+    //    ldy  #0       ; <-- can be removed
+    //    sta  (ptr),y
+
+    val mods = mutableListOf<Modification>()
+    for (lines in linesByFourteen) {
+        val first = lines[0].value.trimStart()
+        val second = lines[1].value.trimStart()
+        val third = lines[2].value.trimStart()
+        val fourth = lines[3].value.trimStart()
+        val fifth = lines[4].value.trimStart()
+        val sixth = lines[5].value.trimStart()
+
+        if(first.startsWith("ldy") && second.startsWith("lda") && fourth.startsWith("ldy") && fifth.startsWith("sta")) {
+            val firstvalue = first.substring(4)
+            val secondvalue = second.substring(4)
+            val fourthvalue = fourth.substring(4)
+            val fifthvalue = fifth.substring(4)
+            if("y" !in third && firstvalue==fourthvalue && secondvalue==fifthvalue && secondvalue.endsWith(",y") && fifthvalue.endsWith(",y")) {
+                mods.add(Modification(lines[3].index, true, null))
+            }
+        }
+        if(first.startsWith("ldy") && second.startsWith("lda") && fifth.startsWith("ldy") && sixth.startsWith("sta")) {
+            val firstvalue = first.substring(4)
+            val secondvalue = second.substring(4)
+            val fifthvalue = fifth.substring(4)
+            val sixthvalue = sixth.substring(4)
+            if("y" !in third && "y" !in fourth && firstvalue==fifthvalue && secondvalue==sixthvalue && secondvalue.endsWith(",y") && sixthvalue.endsWith(",y")) {
+                mods.add(Modification(lines[4].index, true, null))
+            }
+        }
+    }
+
+    return mods
+}
+
 private fun optimizeStoreLoadSame(linesByFour: List<List<IndexedValue<String>>>, machine: IMachineDefinition, program: Program): List<Modification> {
     // sta X + lda X,  sty X + ldy X,   stx X + ldx X  -> the second instruction can OFTEN be eliminated
     val mods = mutableListOf<Modification>()

codeGenCpu6502/src/prog8/codegen/cpu6502/BuiltinFunctionsAsmGen.kt

@@ -15,8 +15,7 @@ import prog8.compiler.FSignature
 
 internal class BuiltinFunctionsAsmGen(private val program: Program,
                                       private val asmgen: AsmGen,
-                                      private val assignAsmGen: AssignmentAsmGen,
-                                      private val allocations: VariableAllocator) {
+                                      private val assignAsmGen: AssignmentAsmGen) {
 
     internal fun translateFunctioncallExpression(fcall: BuiltinFunctionCall, resultToStack: Boolean, resultRegister: RegisterOrPair?) {
         val func = BuiltinFunctions.getValue(fcall.target.nameInSource.single())
@@ -44,7 +43,6 @@ internal class BuiltinFunctionsAsmGen(private val program: Program,
             "abs" -> funcAbs(fcall, func, resultToStack, resultRegister, sscope)
             "any", "all" -> funcAnyAll(fcall, func, resultToStack, resultRegister, sscope)
             "sgn" -> funcSgn(fcall, func, resultToStack, resultRegister, sscope)
-            "rnd", "rndw" -> funcRnd(func, resultToStack, resultRegister, sscope)
             "sqrt16" -> funcSqrt16(fcall, func, resultToStack, resultRegister, sscope)
             "rol" -> funcRol(fcall)
             "rol2" -> funcRol2(fcall)
@@ -309,14 +307,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program,
             throw AssemblyError("should not discard result of memory allocation at $fcall")
         val name = (fcall.args[0] as StringLiteral).value
         require(name.all { it.isLetterOrDigit() || it=='_' }) {"memory name should be a valid symbol name"}
-        val size = (fcall.args[1] as NumericLiteral).number.toUInt()
-        val align = (fcall.args[2] as NumericLiteral).number.toUInt()
-
-        val existing = allocations.getMemorySlab(name)
-        if(existing!=null && (existing.first!=size || existing.second!=align))
-            throw AssemblyError("memory slab '$name' already exists with a different size or alignment at ${fcall.position}")
-
-        val slabname = IdentifierReference(listOf("prog8_slabs", name), fcall.position)
+        val slabname = IdentifierReference(listOf("prog8_slabs", "prog8_memoryslab_$name"), fcall.position)
         slabname.linkParents(fcall)
         val src = AsmAssignSource(SourceStorageKind.EXPRESSION, program, asmgen, DataType.UWORD, expression = AddressOf(slabname, fcall.position))
         val target =
@@ -326,7 +317,6 @@ internal class BuiltinFunctionsAsmGen(private val program: Program,
                 AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, null, asmgen)
         val assign = AsmAssignment(src, target, false, program.memsizer, fcall.position)
         asmgen.translateNormalAssignment(assign)
-        allocations.allocateMemorySlab(name, size, align)
     }
 
     private fun funcSqrt16(fcall: IFunctionCall, func: FSignature, resultToStack: Boolean, resultRegister: RegisterOrPair?, scope: Subroutine?) {
@@ -696,28 +686,6 @@ internal class BuiltinFunctionsAsmGen(private val program: Program,
         }
     }
 
-    private fun funcRnd(func: FSignature, resultToStack: Boolean, resultRegister: RegisterOrPair?, scope: Subroutine?) {
-        when(func.name) {
-            "rnd" -> {
-                if(resultToStack)
-                    asmgen.out("  jsr  prog8_lib.func_rnd_stack")
-                else {
-                    asmgen.out("  jsr  math.randbyte")
-                    assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, asmgen), CpuRegister.A)
-                }
-            }
-            "rndw" -> {
-                if(resultToStack)
-                    asmgen.out("  jsr  prog8_lib.func_rndw_stack")
-                else {
-                    asmgen.out("  jsr  math.randword")
-                    assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, asmgen), RegisterOrPair.AY)
-                }
-            }
-            else -> throw AssemblyError("wrong func")
-        }
-    }
-
     private fun funcPokeW(fcall: IFunctionCall) {
         when(val addrExpr = fcall.args[0]) {
             is NumericLiteral -> {

codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt

@@ -53,7 +53,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
         (sub.parameters.size==1 && sub.parameters[0].type in IntegerDatatypes)
                 || (sub.parameters.size==2 && sub.parameters[0].type in ByteDatatypes && sub.parameters[1].type in ByteDatatypes)
 
-    internal fun translateFunctionCall(call: IFunctionCall, isExpression: Boolean) {
+    internal fun translateFunctionCall(call: IFunctionCall, isExpression: Boolean) {            // TODO remove isExpression unused parameter
         // Output only the code to set up the parameters and perform the actual call
         // NOTE: does NOT output the code to deal with the result values!
         // NOTE: does NOT output code to save/restore the X register for this call! Every caller should deal with this in their own way!!

codeGenCpu6502/src/prog8/codegen/cpu6502/ProgramAndVarsGen.kt

@@ -170,10 +170,10 @@ internal class ProgramAndVarsGen(
     private fun memorySlabs() {
         asmgen.out("; memory slabs")
         asmgen.out("prog8_slabs\t.block")
-        for((name, info) in allocator.memorySlabs) {
-            if(info.second>1u)
-                asmgen.out("\t.align  ${info.second.toHex()}")
-            asmgen.out("$name\t.fill  ${info.first}")
+        for(slab in symboltable.allMemorySlabs) {
+            if(slab.align>1u)
+                asmgen.out("\t.align  ${slab.align.toHex()}")
+            asmgen.out("${slab.name}\t.fill  ${slab.size}")
         }
         asmgen.out("\t.bend")
     }
@@ -450,8 +450,8 @@ internal class ProgramAndVarsGen(
         val vars = allocator.zeropageVars.filter { it.value.dt==DataType.STR }
         for (variable in vars) {
             val svar = symboltable.flat.getValue(variable.key) as StStaticVariable
-            if(svar.initialStringValue!=null)
-                result.add(ZpStringWithInitial(variable.key, variable.value, svar.initialStringValue!!))
+            if(svar.onetimeInitializationStringValue!=null)
+                result.add(ZpStringWithInitial(variable.key, variable.value, svar.onetimeInitializationStringValue!!))
         }
         return result
     }
@@ -461,8 +461,8 @@ internal class ProgramAndVarsGen(
         val vars = allocator.zeropageVars.filter { it.value.dt in ArrayDatatypes }
         for (variable in vars) {
             val svar = symboltable.flat.getValue(variable.key) as StStaticVariable
-            if(svar.initialArrayValue!=null)
-                result.add(ZpArrayWithInitial(variable.key, variable.value, svar.initialArrayValue!!))
+            if(svar.onetimeInitializationArrayValue!=null)
+                result.add(ZpArrayWithInitial(variable.key, variable.value, svar.onetimeInitializationArrayValue!!))
         }
         return result
     }
@@ -481,7 +481,7 @@ internal class ProgramAndVarsGen(
         asmgen.out("; non-zeropage variables")
         val (stringvars, othervars) = variables.partition { it.dt==DataType.STR }
         stringvars.forEach {
-            outputStringvar(it.name, it.initialStringValue!!.second, it.initialStringValue!!.first)
+            outputStringvar(it.name, it.onetimeInitializationStringValue!!.second, it.onetimeInitializationStringValue!!.first)
         }
         othervars.sortedBy { it.type }.forEach {
             staticVariable2asm(it)
@@ -491,11 +491,11 @@ internal class ProgramAndVarsGen(
     private fun staticVariable2asm(variable: StStaticVariable) {
         val name = variable.name
         val initialValue: Number =
-            if(variable.initialNumericValue!=null) {
+            if(variable.onetimeInitializationNumericValue!=null) {
                 if(variable.dt== DataType.FLOAT)
-                    variable.initialNumericValue!!
+                    variable.onetimeInitializationNumericValue!!
                 else
-                    variable.initialNumericValue!!.toInt()
+                    variable.onetimeInitializationNumericValue!!.toInt()
             } else 0
 
         when (variable.dt) {
@@ -514,7 +514,7 @@ internal class ProgramAndVarsGen(
             DataType.STR -> {
                 throw AssemblyError("all string vars should have been interned into prog")
             }
-            in ArrayDatatypes -> arrayVariable2asm(name, variable.dt, variable.initialArrayValue, variable.length)
+            in ArrayDatatypes -> arrayVariable2asm(name, variable.dt, variable.onetimeInitializationArrayValue, variable.length)
             else -> {
                 throw AssemblyError("weird dt")
             }

codeGenCpu6502/src/prog8/codegen/cpu6502/VariableAllocator.kt

@@ -15,8 +15,6 @@ internal class VariableAllocator(private val symboltable: SymbolTable,
 ) {
 
     private val zeropage = options.compTarget.machine.zeropage
-    private val memorySlabsInternal = mutableMapOf<String, Pair<UInt, UInt>>()
-    internal val memorySlabs: Map<String, Pair<UInt, UInt>> = memorySlabsInternal
     internal val globalFloatConsts = mutableMapOf<Double, String>()     // all float values in the entire program (value -> varname)
     internal val zeropageVars: Map<List<String>, Zeropage.ZpAllocation> = zeropage.allocatedVariables
 
@@ -24,12 +22,6 @@ internal class VariableAllocator(private val symboltable: SymbolTable,
         allocateZeropageVariables()
     }
 
-    internal fun getMemorySlab(name: String) = memorySlabsInternal[name]
-
-    internal fun allocateMemorySlab(name: String, size: UInt, align: UInt) {
-        memorySlabsInternal[name] = Pair(size, align)
-    }
-
     internal fun isZpVar(scopedName: List<String>) = scopedName in zeropage.allocatedVariables
 
     internal fun getFloatAsmConst(number: Double): String {

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt

@@ -287,18 +287,24 @@ internal class AssignmentAsmGen(private val program: Program,
                 }
             }
             is PrefixExpression -> {
-                // first assign the value to the target then apply the operator in place on the target.
-                translateNormalAssignment(AsmAssignment(
-                    AsmAssignSource.fromAstSource(value.expression, program, asmgen),
-                    assign.target,
-                    false, program.memsizer, assign.position
-                ))
-                val target = virtualRegsToVariables(assign.target)
-                when(value.operator) {
-                    "+" -> {}
-                    "-" -> augmentableAsmGen.inplaceNegate(target, target.datatype)
-                    "~" -> augmentableAsmGen.inplaceInvert(target, target.datatype)
-                    else -> throw AssemblyError("invalid prefix operator")
+                if(assign.target.array==null) {
+                    // First assign the value to the target then apply the operator in place on the target.
+                    // This saves a temporary variable
+                    translateNormalAssignment(
+                        AsmAssignment(
+                            AsmAssignSource.fromAstSource(value.expression, program, asmgen),
+                            assign.target,
+                            false, program.memsizer, assign.position
+                        )
+                    )
+                    when (value.operator) {
+                        "+" -> {}
+                        "-" -> augmentableAsmGen.inplaceNegate(assign)
+                        "~" -> augmentableAsmGen.inplaceInvert(assign)
+                        else -> throw AssemblyError("invalid prefix operator")
+                    }
+                } else {
+                    assignPrefixedExpressionToArrayElt(assign)
                 }
             }
             is ContainmentCheck -> {
@@ -317,6 +323,28 @@ internal class AssignmentAsmGen(private val program: Program,
         }
     }
 
+    internal fun assignPrefixedExpressionToArrayElt(assign: AsmAssignment) {
+        require(assign.source.expression is PrefixExpression)
+        if(assign.source.datatype==DataType.FLOAT) {
+            // floatarray[x] = -value   ... just use FAC1 to calculate the expression into and then store that back into the array.
+            assignExpressionToRegister(assign.source.expression, RegisterOrPair.FAC1, true)
+            assignFAC1float(assign.target)
+        } else {
+            // array[x] = -value   ... use a tempvar then store that back into the array.
+            val tempvar = asmgen.getTempVarName(assign.target.datatype).joinToString(".")
+            val assignToTempvar = AsmAssignment(assign.source,
+                AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, assign.target.datatype, assign.target.scope, variableAsmName=tempvar, origAstTarget = assign.target.origAstTarget),
+                false, program.memsizer, assign.position)
+            asmgen.translateNormalAssignment(assignToTempvar)
+            when(assign.target.datatype) {
+                in ByteDatatypes -> assignVariableByte(assign.target, tempvar)
+                in WordDatatypes -> assignVariableWord(assign.target, tempvar)
+                DataType.FLOAT -> assignVariableFloat(assign.target, tempvar)
+                else -> throw AssemblyError("weird dt")
+            }
+        }
+    }
+
     private fun assignVirtualRegister(target: AsmAssignTarget, register: RegisterOrPair) {
         when(target.datatype) {
             in ByteDatatypes -> {
@@ -852,7 +880,8 @@ internal class AssignmentAsmGen(private val program: Program,
                     fun assignViaExprEval(addressExpression: Expression) {
                         asmgen.assignExpressionToVariable(addressExpression, "P8ZP_SCRATCH_W2", DataType.UWORD, null)
                         asmgen.loadAFromZpPointerVar("P8ZP_SCRATCH_W2")
-                        assignRegisterByte(target, CpuRegister.A)
+                        asmgen.out("  ldy  #0")
+                        assignRegisterpairWord(target, RegisterOrPair.AY)
                     }
 
                     when (value.addressExpression) {
@@ -974,6 +1003,9 @@ internal class AssignmentAsmGen(private val program: Program,
                     } else if(valueDt in ByteDatatypes && targetDt in ByteDatatypes) {
                         // byte to byte, just assign
                         assignExpressionToRegister(value, target.register!!, targetDt==DataType.BYTE || targetDt==DataType.WORD)
+                    } else if(valueDt in ByteDatatypes && targetDt in WordDatatypes) {
+                        // byte to word, just assign
+                        assignExpressionToRegister(value, target.register!!, targetDt==DataType.WORD)
                     }
                     else
                         throw AssemblyError("can't cast $valueDt to $targetDt, this should have been checked in the astchecker")
@@ -1969,18 +2001,10 @@ internal class AssignmentAsmGen(private val program: Program,
     }
 
     internal fun assignRegisterByte(target: AsmAssignTarget, register: CpuRegister) {
-        // we make an exception in the type check for assigning something to a cx16 virtual register, or a register pair
-        // these will be correctly typecasted from a byte to a word value
-        if(target.register !in Cx16VirtualRegisters &&
-            target.register!=RegisterOrPair.AX && target.register!=RegisterOrPair.AY && target.register!=RegisterOrPair.XY) {
-            if(target.kind== TargetStorageKind.VARIABLE) {
-                val parts = target.asmVarname.split('.')
-                if (parts.size != 2 || parts[0] != "cx16")
-                    require(target.datatype in ByteDatatypes)
-            } else {
-                require(target.datatype in ByteDatatypes)
-            }
-        }
+        // we make an exception in the type check for assigning something to a register pair AX, AY or XY
+        // these will be correctly typecasted from a byte to a word value here
+        if(target.register !in setOf(RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY))
+            require(target.datatype in ByteDatatypes)
 
         when(target.kind) {
             TargetStorageKind.VARIABLE -> {

codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt

@@ -21,13 +21,10 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         when (val value = assign.source.expression!!) {
             is PrefixExpression -> {
                 // A = -A , A = +A, A = ~A, A = not A
-                val target = assignmentAsmGen.virtualRegsToVariables(assign.target)
-                val itype = value.inferType(program)
-                val type = itype.getOrElse { throw AssemblyError("unknown dt") }
                 when (value.operator) {
                     "+" -> {}
-                    "-" -> inplaceNegate(target, type)
-                    "~" -> inplaceInvert(target, type)
+                    "-" -> inplaceNegate(assign)
+                    "~" -> inplaceInvert(assign)
                     else -> throw AssemblyError("invalid prefix operator")
                 }
             }
@@ -1796,8 +1793,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
         }
     }
 
-    internal fun inplaceInvert(target: AsmAssignTarget, dt: DataType) {
-        when (dt) {
+    internal fun inplaceInvert(assign: AsmAssignment) {
+        val target = assign.target
+        when (assign.target.datatype) {
             DataType.UBYTE -> {
                 when (target.kind) {
                     TargetStorageKind.VARIABLE -> {
@@ -1840,7 +1838,8 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         }
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for byte stack invert")
-                    else -> throw AssemblyError("no asm gen for in-place invert ubyte for ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.UWORD -> {
@@ -1864,15 +1863,17 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         }
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for word stack invert")
-                    else -> throw AssemblyError("no asm gen for in-place invert uword for ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             else -> throw AssemblyError("invert of invalid type")
         }
     }
 
-    internal fun inplaceNegate(target: AsmAssignTarget, dt: DataType) {
-        when (dt) {
+    internal fun inplaceNegate(assign: AsmAssignment) {
+        val target = assign.target
+        when (assign.target.datatype) {
             DataType.BYTE -> {
                 when (target.kind) {
                     TargetStorageKind.VARIABLE -> {
@@ -1896,9 +1897,10 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             else -> throw AssemblyError("invalid reg dt for byte negate")
                         }
                     }
-                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't in-place negate")
+                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't negate that")
                     TargetStorageKind.STACK -> TODO("no asm gen for byte stack negate")
-                    else -> throw AssemblyError("no asm gen for in-place negate byte")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.WORD -> {
@@ -1955,12 +1957,21 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                             else -> throw AssemblyError("invalid reg dt for word neg")
                         }
                     }
+                    TargetStorageKind.MEMORY -> throw AssemblyError("memory is ubyte, can't negate that")
                     TargetStorageKind.STACK -> TODO("no asm gen for word stack negate")
-                    else -> throw AssemblyError("no asm gen for in-place negate word")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target")
                 }
             }
             DataType.FLOAT -> {
                 when (target.kind) {
+                    TargetStorageKind.REGISTER -> {
+                        when(target.register!!) {
+                            RegisterOrPair.FAC1 -> asmgen.out("  jsr  floats.NEGOP")
+                            RegisterOrPair.FAC2 -> asmgen.out("  jsr  floats.MOVFA |  jsr floats.NEGOP |  jsr  floats.MOVEF")
+                            else -> throw AssemblyError("invalid float register")
+                        }
+                    }
                     TargetStorageKind.VARIABLE -> {
                         // simply flip the sign bit in the float
                         asmgen.out("""
@@ -1970,10 +1981,11 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
                         """)
                     }
                     TargetStorageKind.STACK -> TODO("no asm gen for float stack negate")
-                    else -> throw AssemblyError("weird target kind for inplace negate float ${target.kind}")
+                    TargetStorageKind.ARRAY -> assignmentAsmGen.assignPrefixedExpressionToArrayElt(assign)
+                    else -> throw AssemblyError("weird target for in-place float negation")
                 }
             }
-            else -> throw AssemblyError("negate of invalid type $dt")
+            else -> throw AssemblyError("negate of invalid type")
         }
     }
 

codeGenExperimental/build.gradle

@@ -24,8 +24,9 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':codeAst')
     implementation project(':codeCore')
+    implementation project(':intermediate')
+    implementation project(':codeGenIntermediate')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"

codeGenExperimental/codeGenExperimental.iml

@@ -10,7 +10,8 @@
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
     <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
-    <orderEntry type="module" module-name="codeAst" />
+    <orderEntry type="module" module-name="codeGenIntermediate" />
+    <orderEntry type="module" module-name="intermediate" />
     <orderEntry type="module" module-name="codeCore" />
   </component>
 </module>

codeGenExperimental/src/prog8/codegen/experimental/AsmGen.kt

@@ -1,39 +0,0 @@
-package prog8.codegen.experimental
-
-import prog8.code.SymbolTable
-import prog8.code.ast.PtProgram
-import prog8.code.core.CompilationOptions
-import prog8.code.core.IAssemblyGenerator
-import prog8.code.core.IAssemblyProgram
-import prog8.code.core.IErrorReporter
-
-/*
-
-    NOTE: The goal is to keep the dependencies as lean as possible! For now, we depend only on:
-         - codeAst (the 'lean' new AST and the SymbolTable)
-         - codeCore (various base enums and interfaces)
-
-    This *should* be enough to build a complete code generator with. But we'll see :)
-
- */
-
-
-class AsmGen(internal val program: PtProgram,
-             internal val symbolTable: SymbolTable,
-             internal val options: CompilationOptions,
-             internal val errors: IErrorReporter
-): IAssemblyGenerator {
-
-    override fun compileToAssembly(): IAssemblyProgram? {
-
-        println("\n** experimental code generator **\n")
-
-        println("Writing AST into XML form...")
-        val xmlConv = AstToXmlConverter(program, symbolTable, options)
-        xmlConv.writeXml()
-
-        println("..todo: create assembly program into ${options.outputDir.toAbsolutePath()}..")
-
-        return AssemblyProgram("dummy")
-    }
-}

codeGenExperimental/src/prog8/codegen/experimental/AssemblyProgram.kt

@@ -1,13 +0,0 @@
-package prog8.codegen.experimental
-
-import prog8.code.core.CompilationOptions
-import prog8.code.core.IAssemblyProgram
-
-
-internal class AssemblyProgram(override val name: String) : IAssemblyProgram
-{
-    override fun assemble(options: CompilationOptions): Boolean {
-        println("..todo: assemble code into binary..")
-        return true
-    }
-}

codeGenExperimental/src/prog8/codegen/experimental/AstToXmlConverter.kt

@@ -1,668 +0,0 @@
-package prog8.codegen.experimental
-
-import prog8.code.*
-import prog8.code.ast.*
-import prog8.code.core.*
-import javax.xml.stream.XMLOutputFactory
-import kotlin.io.path.Path
-import kotlin.io.path.absolutePathString
-import kotlin.io.path.div
-
-/*
-
-    NOTE: The goal is to keep the dependencies as lean as possible! For now, we depend only on:
-         - codeAst (the 'lean' new AST and the SymbolTable)
-         - codeCore (various base enums and interfaces)
-
-    This *should* be enough to build a complete code generator with. But we'll see :)
-
- */
-
-
-class AstToXmlConverter(internal val program: PtProgram,
-                        internal val symbolTable: SymbolTable,
-                        internal val options: CompilationOptions
-) {
-
-    private lateinit var xml: IndentingXmlWriter
-
-    fun writeXml() {
-        val writer = (options.outputDir / Path(program.name+"-ast.xml")).toFile().printWriter()
-        xml = IndentingXmlWriter(XMLOutputFactory.newFactory().createXMLStreamWriter(writer))
-        xml.doc()
-        xml.elt("program")
-        xml.attr("name", program.name)
-        xml.startChildren()
-        writeOptions(options)
-        program.children.forEach { writeNode(it) }
-        writeSymboltable(symbolTable)
-        xml.endElt()
-        xml.endDoc()
-        xml.close()
-    }
-
-    private fun writeSymboltable(st: SymbolTable) {
-        xml.elt("symboltable")
-        xml.startChildren()
-        st.flat.forEach{ (name, entry) ->
-            xml.elt("entry")
-            xml.attr("name", name.joinToString("."))
-            xml.attr("type", entry.type.name)
-            xml.startChildren()
-            writeStNode(entry)
-            xml.endElt()
-        }
-        xml.endElt()
-    }
-
-    private fun writeStNode(node: StNode) {
-        when(node.type) {
-            StNodeType.GLOBAL,
-            StNodeType.LABEL,
-            StNodeType.BLOCK,
-            StNodeType.BUILTINFUNC,
-            StNodeType.SUBROUTINE -> {/* no additional info*/}
-            StNodeType.ROMSUB -> {
-                node as StRomSub
-                xml.elt("romsub")
-                xml.attr("address", node.address.toString())
-                xml.endElt()
-            }
-            StNodeType.STATICVAR -> {
-                node as StStaticVariable
-                xml.elt("var")
-                xml.attr("type", node.dt.name)
-                xml.attr("zpwish", node.zpwish.name)
-                if(node.length!=null)
-                    xml.attr("length", node.length.toString())
-                if(node.initialNumericValue!=null || node.initialArrayValue!=null || node.initialStringValue!=null) {
-                    xml.startChildren()
-                    if(node.initialNumericValue!=null) {
-                        writeNumber(node.dt, node.initialNumericValue!!)
-                    }
-                    if(node.initialStringValue!=null) {
-                        xml.writeTextNode(
-                            "string",
-                            listOf(Pair("encoding", node.initialStringValue!!.second.name)),
-                            node.initialStringValue!!.first,
-                            false
-                        )
-                    }
-                    if(node.initialArrayValue!=null) {
-                        xml.elt("array")
-                        xml.startChildren()
-                        val eltDt = ArrayToElementTypes.getValue(node.dt)
-                        node.initialArrayValue!!.forEach {
-                            if(it.number!=null) {
-                                writeNumber(eltDt, it.number!!)
-                            }
-                            if(it.addressOf!=null) {
-                                xml.elt("addressof")
-                                xml.attr("symbol", it.addressOf!!.joinToString("."))
-                                xml.endElt()
-                            }
-                        }
-                        xml.endElt()
-                    }
-                }
-                xml.endElt()
-            }
-            StNodeType.MEMVAR -> {
-                node as StMemVar
-                xml.writeTextNode("memvar",
-                    listOf(Pair("type", node.dt.name)),
-                    node.address.toString(),
-                    false)
-            }
-            StNodeType.CONSTANT -> {
-                node as StConstant
-                xml.writeTextNode("const",
-                    listOf(Pair("type", node.dt.name)),
-                    intOrDouble(node.dt, node.value).toString(),
-                    false)
-            }
-        }
-    }
-
-    private fun writeOptions(options: CompilationOptions) {
-        xml.elt("options")
-        xml.attr("target", options.compTarget.name)
-        xml.attr("output", options.output.name)
-        xml.attr("launcher", options.launcher.name)
-        xml.attr("zeropage", options.zeropage.name)
-        xml.attr("loadaddress", options.loadAddress.toString())
-        xml.attr("floatsenabled", options.floats.toString())
-        xml.attr("nosysinit", options.noSysInit.toString())
-        xml.attr("dontreinitglobals", options.dontReinitGlobals.toString())
-        xml.attr("optimize", options.optimize.toString())
-        if(options.evalStackBaseAddress!=null)
-            xml.attr("evalstackbase", options.evalStackBaseAddress!!.toString())
-        if(options.zpReserved.isNotEmpty()) {
-            xml.startChildren()
-            options.zpReserved.forEach {
-                xml.elt("zpreserved")
-                xml.attr("from", it.first.toString())
-                xml.attr("to", it.last.toString())
-                xml.endElt()
-            }
-        }
-        if(options.symbolDefs.isNotEmpty()) {
-            xml.startChildren()
-            options.symbolDefs.forEach { name, value ->
-                xml.elt("symboldef")
-                xml.attr("name", name)
-                xml.attr("value", value)
-                xml.endElt()
-            }
-        }
-        xml.endElt()
-    }
-
-    private fun writeNode(it: PtNode) {
-        when(it) {
-            is PtBlock -> write(it)
-            is PtSub -> write(it)
-            is PtVariable -> write(it)
-            is PtAssignment -> write(it)
-            is PtConstant -> write(it)
-            is PtAsmSub -> write(it)
-            is PtAddressOf -> write(it)
-            is PtArrayIndexer -> write(it)
-            is PtArray -> write(it)
-            is PtBinaryExpression -> write(it)
-            is PtBuiltinFunctionCall -> write(it)
-            is PtConditionalBranch -> write(it)
-            is PtContainmentCheck -> write(it)
-            is PtForLoop -> write(it)
-            is PtFunctionCall -> write(it)
-            is PtIdentifier -> write(it)
-            is PtIfElse -> write(it)
-            is PtInlineAssembly -> write(it)
-            is PtIncludeBinary -> write(it)
-            is PtJump -> write(it)
-            is PtMemoryByte -> write(it)
-            is PtMemMapped -> write(it)
-            is PtNumber -> write(it)
-            is PtPostIncrDecr -> write(it)
-            is PtPrefix -> write(it)
-            is PtRange -> write(it)
-            is PtRepeatLoop -> write(it)
-            is PtReturn -> write(it)
-            is PtString -> write(it)
-            is PtTypeCast -> write(it)
-            is PtWhen -> write(it)
-            is PtWhenChoice -> write(it)
-            is PtLabel -> write(it)
-            is PtNop -> {}
-            is PtBreakpoint -> write(it)
-            is PtScopeVarsDecls -> write(it)
-            is PtNodeGroup -> it.children.forEach { writeNode(it) }
-            else -> TODO("$it")
-        }
-    }
-
-    private fun write(vars: PtScopeVarsDecls) {
-        xml.elt("vars")
-        xml.startChildren()
-        vars.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(breakPt: PtBreakpoint) {
-        xml.elt("breakpoint")
-        xml.pos(breakPt.position)
-        xml.endElt()
-    }
-
-    private fun write(array: PtArray) {
-        xml.elt("array")
-        xml.attr("type", array.type.name)
-        xml.startChildren()
-        array.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(prefix: PtPrefix) {
-        xml.elt("prefix")
-        xml.attr("op", prefix.operator)
-        xml.attr("type", prefix.type.name)
-        xml.startChildren()
-        xml.elt("value")
-        xml.startChildren()
-        writeNode(prefix.value)
-        xml.endElt()
-        xml.endElt()
-    }
-
-    private fun write(string: PtString) =
-        xml.writeTextNode("string", listOf(Pair("encoding", string.encoding.name)), string.value, false)
-
-    private fun write(rept: PtRepeatLoop) {
-        xml.elt("repeat")
-        xml.pos(rept.position)
-        xml.startChildren()
-        xml.elt("count")
-        xml.startChildren()
-        writeNode(rept.count)
-        xml.endElt()
-        writeNode(rept.statements)
-        xml.endElt()
-    }
-
-    private fun write(branch: PtConditionalBranch) {
-        xml.elt("conditionalbranch")
-        xml.attr("condition", branch.condition.name)
-        xml.pos(branch.position)
-        xml.startChildren()
-        xml.elt("true")
-        xml.startChildren()
-        writeNode(branch.trueScope)
-        xml.endElt()
-        if(branch.falseScope.children.isNotEmpty()) {
-            xml.elt("false")
-            xml.startChildren()
-            writeNode(branch.falseScope)
-            xml.endElt()
-        }
-        xml.endElt()
-    }
-
-    private fun write(check: PtContainmentCheck) {
-        xml.elt("containment")
-        xml.attr("type", check.type.name)
-        xml.startChildren()
-        xml.elt("element")
-        xml.startChildren()
-        writeNode(check.children[0])
-        xml.endElt()
-        xml.elt("iterable")
-        xml.startChildren()
-        writeNode(check.children[1])
-        xml.endElt()
-        xml.endElt()
-    }
-
-    private fun write(range: PtRange) {
-        xml.elt("range")
-        xml.attr("type", range.type.name)
-        xml.startChildren()
-        xml.elt("from")
-        xml.startChildren()
-        writeNode(range.from)
-        xml.endElt()
-        xml.elt("to")
-        xml.startChildren()
-        writeNode(range.to)
-        xml.endElt()
-        xml.elt("step")
-        xml.startChildren()
-        writeNode(range.step)
-        xml.endElt()
-        xml.endElt()
-    }
-
-    private fun write(forLoop: PtForLoop) {
-        xml.elt("for")
-        xml.attr("loopvar", strTargetName(forLoop.variable))
-        xml.pos(forLoop.position)
-        xml.startChildren()
-        xml.elt("iterable")
-        xml.startChildren()
-        writeNode(forLoop.iterable)
-        xml.endElt()
-        writeNode(forLoop.statements)
-        xml.endElt()
-    }
-
-    private fun write(membyte: PtMemoryByte) {
-        xml.elt("membyte")
-        xml.attr("type", membyte.type.name)
-        xml.startChildren()
-        xml.elt("address")
-        xml.startChildren()
-        writeNode(membyte.address)
-        xml.endElt()
-        xml.endElt()
-    }
-
-    private fun write(whenStmt: PtWhen) {
-        xml.elt("when")
-        xml.pos(whenStmt.position)
-        xml.startChildren()
-        xml.elt("value")
-        xml.startChildren()
-        writeNode(whenStmt.value)
-        xml.endElt()
-        xml.elt("choices")
-        xml.startChildren()
-        writeNode(whenStmt.choices)
-        xml.endElt()
-        xml.endElt()
-    }
-
-    private fun write(choice: PtWhenChoice) {
-        xml.elt("choice")
-        if(choice.isElse) {
-            xml.attr("else", "true")
-            xml.startChildren()
-        } else {
-            xml.startChildren()
-            xml.elt("values")
-            xml.startChildren()
-            writeNode(choice.values)
-            xml.endElt()
-        }
-        writeNode(choice.statements)
-        xml.endElt()
-    }
-
-    private fun write(inlineAsm: PtInlineAssembly) {
-        xml.elt("assembly")
-        xml.pos(inlineAsm.position)
-        xml.startChildren()
-        xml.writeTextNode("code", emptyList(), inlineAsm.assembly)
-        xml.endElt()
-    }
-
-    private fun write(inlineBinary: PtIncludeBinary) {
-        xml.elt("binary")
-        xml.attr("filename", inlineBinary.file.absolutePathString())
-        if(inlineBinary.offset!=null)
-            xml.attr("offset", inlineBinary.offset!!.toString())
-        if(inlineBinary.length!=null)
-            xml.attr("length", inlineBinary.length!!.toString())
-        xml.pos(inlineBinary.position)
-        xml.endElt()
-    }
-
-    private fun write(fcall: PtBuiltinFunctionCall) {
-        xml.elt("builtinfcall")
-        xml.attr("name", fcall.name)
-        if(fcall.void)
-            xml.attr("type", "VOID")
-        else
-            xml.attr("type", fcall.type.name)
-        xml.startChildren()
-        fcall.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(cast: PtTypeCast) {
-        xml.elt("cast")
-        xml.attr("type", cast.type.name)
-        xml.startChildren()
-        writeNode(cast.value)
-        xml.endElt()
-    }
-
-    private fun write(aix: PtArrayIndexer) {
-        xml.elt("arrayindexed")
-        xml.attr("type", aix.type.name)
-        xml.startChildren()
-        write(aix.variable)
-        writeNode(aix.index)
-        xml.endElt()
-    }
-
-    private fun write(binexpr: PtBinaryExpression) {
-        xml.elt("binexpr")
-        xml.attr("op", binexpr.operator)
-        xml.attr("type", binexpr.type.name)
-        xml.startChildren()
-        writeNode(binexpr.left)
-        writeNode(binexpr.right)
-        xml.endElt()
-    }
-
-    private fun write(addrof: PtAddressOf) {
-        xml.elt("addressof")
-        xml.attr("symbol", strTargetName(addrof.identifier))
-        xml.endElt()
-    }
-
-    private fun write(fcall: PtFunctionCall) {
-        xml.elt("fcall")
-        xml.attr("name", strTargetName(fcall))
-        if(fcall.void)
-            xml.attr("type", "VOID")
-        else
-            xml.attr("type", fcall.type.name)
-        xml.pos(fcall.position)
-        xml.startChildren()
-        fcall.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(number: PtNumber) = writeNumber(number.type, number.number)
-
-    private fun writeNumber(type: DataType, number: Double) =
-        xml.writeTextNode("number", listOf(Pair("type", type.name)), intOrDouble(type, number).toString(), false)
-
-    private fun write(symbol: PtIdentifier) {
-        xml.elt("symbol")
-        xml.attr("name", strTargetName(symbol))
-        xml.attr("type", symbol.type.name)
-        xml.endElt()
-    }
-
-    private fun write(assign: PtAssignment) {
-        xml.elt("assign")
-        xml.pos(assign.position)
-        xml.startChildren()
-        write(assign.target)
-        writeNode(assign.value)
-        xml.endElt()
-    }
-
-    private fun write(ifElse: PtIfElse) {
-        xml.elt("ifelse")
-        xml.pos(ifElse.position)
-        xml.startChildren()
-        xml.elt("condition")
-        xml.startChildren()
-        writeNode(ifElse.condition)
-        xml.endElt()
-        xml.elt("true")
-        xml.pos(ifElse.ifScope.position)
-        xml.startChildren()
-        writeNode(ifElse.ifScope)
-        xml.endElt()
-        if(ifElse.elseScope.children.isNotEmpty()) {
-            xml.elt("false")
-            xml.pos(ifElse.elseScope.position)
-            xml.startChildren()
-            writeNode(ifElse.elseScope)
-            xml.endElt()
-        }
-        xml.endElt()
-    }
-
-    private fun write(ret: PtReturn) {
-        xml.elt("return")
-        if(ret.hasValue) {
-            xml.startChildren()
-            writeNode(ret.value!!)
-        }
-        xml.endElt()
-    }
-
-    private fun write(incdec: PtPostIncrDecr) {
-        if(incdec.operator=="++") xml.elt("inc") else xml.elt("dec")
-        xml.startChildren()
-        write(incdec.target)
-        xml.endElt()
-    }
-
-    private fun write(label: PtLabel) {
-        xml.elt("label")
-        xml.attr("name", label.scopedName.joinToString("."))
-        xml.pos(label.position)
-        xml.endElt()
-    }
-
-    private fun write(block: PtBlock) {
-        xml.elt("block")
-        xml.attr("name", block.scopedName.joinToString("."))
-        if(block.address!=null)
-            xml.attr("address", block.address!!.toString())
-        xml.attr("library", block.library.toString())
-        xml.pos(block.position)
-        xml.startChildren()
-        block.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(memMapped: PtMemMapped) {
-        xml.writeTextNode("memvar",
-            listOf(
-                Pair("name", memMapped.scopedName.joinToString(".")),
-                Pair("type", memMapped.type.name)
-            ),
-            memMapped.address.toString(),
-            false)
-    }
-
-    private fun write(target: PtAssignTarget) {
-        xml.elt("target")
-        xml.startChildren()
-        if(target.identifier!=null) {
-            writeNode(target.identifier!!)
-        } else if(target.memory!=null) {
-            writeNode(target.memory!!)
-        } else if(target.array!=null) {
-            writeNode(target.array!!)
-        } else
-            throw InternalCompilerException("weird assign target")
-        xml.endElt()
-    }
-
-    private fun write(jump: PtJump) {
-        xml.elt("jump")
-        if(jump.identifier!=null) xml.attr("symbol", strTargetName(jump.identifier!!))
-        else if(jump.address!=null) xml.attr("address", jump.address!!.toString())
-        else if(jump.generatedLabel!=null) xml.attr("label", jump.generatedLabel!!)
-        else
-            throw InternalCompilerException("weird jump target")
-        xml.endElt()
-    }
-
-    private fun write(sub: PtSub) {
-        xml.elt("sub")
-        xml.attr("name", sub.scopedName.joinToString("."))
-        if(sub.inline)
-            xml.attr("inline", "true")
-        xml.attr("returntype", sub.returntype?.toString() ?: "VOID")
-        xml.pos(sub.position)
-        xml.startChildren()
-        if(sub.parameters.isNotEmpty()) {
-            xml.elt("parameters")
-            xml.startChildren()
-            sub.parameters.forEach { write(it) }
-            xml.endElt()
-        }
-        sub.children.forEach { writeNode(it) }
-        xml.endElt()
-    }
-
-    private fun write(parameter: PtSubroutineParameter, registerOrStatusflag: RegisterOrStatusflag? = null) {
-        xml.elt("param")
-        xml.attr("name", parameter.name)
-        xml.attr("type", parameter.type.name)
-        if(registerOrStatusflag?.statusflag!=null) {
-            xml.attr("statusflag", registerOrStatusflag.statusflag!!.toString())
-        }
-        if(registerOrStatusflag?.registerOrPair!=null){
-            xml.attr("registers", registerOrStatusflag.registerOrPair!!.name)
-        }
-        xml.endElt()
-    }
-
-    private fun write(asmSub: PtAsmSub) {
-        if(asmSub.address!=null) {
-            xml.elt("romsub")
-            xml.attr("name", asmSub.scopedName.joinToString("."))
-            xml.attr("address", asmSub.address!!.toString())
-            if(asmSub.inline)
-                xml.attr("inline", "true")
-            xml.pos(asmSub.position)
-            xml.startChildren()
-            paramsEtcetera(asmSub)
-            xml.endElt()
-        }
-        else {
-            xml.elt("asmsub")
-            xml.attr("name", asmSub.scopedName.joinToString("."))
-            if(asmSub.inline)
-                xml.attr("inline", "true")
-            xml.pos(asmSub.position)
-            xml.startChildren()
-            paramsEtcetera(asmSub)
-            xml.elt("code")
-            xml.startChildren()
-            asmSub.children.forEach { writeNode(it) }
-            xml.endElt()
-            xml.endElt()
-        }
-    }
-
-    private fun paramsEtcetera(asmSub: PtAsmSub) {
-        if(asmSub.parameters.isNotEmpty()) {
-            xml.elt("parameters")
-            xml.startChildren()
-            asmSub.parameters.forEach { (param, reg) -> write(param, reg) }
-            xml.endElt()
-        }
-        if(asmSub.clobbers.isNotEmpty()) {
-            xml.elt("clobbers")
-            xml.attr("registers", asmSub.clobbers.joinToString(",") { it.name })
-            xml.endElt()
-        }
-        if(asmSub.retvalRegisters.isNotEmpty()) {
-            xml.elt("returns")
-            xml.startChildren()
-            asmSub.retvalRegisters.forEach {
-                xml.elt("register")
-                if(it.statusflag!=null)
-                    xml.attr("statusflag", it.statusflag!!.toString())
-                if(it.registerOrPair!=null)
-                    xml.attr("registers", it.registerOrPair!!.toString())
-                xml.endElt()
-            }
-            xml.endElt()
-        }
-    }
-
-    private fun write(constant: PtConstant) {
-        xml.writeTextNode("const",
-            listOf(
-                Pair("name", constant.scopedName.joinToString(".")),
-                Pair("type", constant.type.name)
-            ),
-            intOrDouble(constant.type, constant.value).toString(), false)
-    }
-
-    private fun write(variable: PtVariable) {
-        // the variable declaration nodes are still present in the Ast,
-        // but the Symboltable should be used look up their details.
-        xml.elt("vardecl")
-        xml.attr("name", variable.scopedName.joinToString("."))
-        xml.attr("type", variable.type.name)
-        if(variable.arraySize!=null)
-            xml.attr("arraysize", variable.arraySize.toString())
-        if(variable.value!=null) {
-            // static initialization value
-            xml.startChildren()
-            writeNode(variable.value!!)
-        }
-        xml.endElt()
-    }
-
-
-
-    private fun strTargetName(ident: PtIdentifier): String = ident.targetName.joinToString(".")
-
-    private fun strTargetName(call: PtFunctionCall): String = call.functionName.joinToString(".")
-
-    private fun intOrDouble(type: DataType, value: Double): Number =
-        if(type in IntegerDatatypes) value.toInt() else value
-}

codeGenExperimental/src/prog8/codegen/experimental/CodeGen.kt

@@ -0,0 +1,30 @@
+package prog8.codegen.experimental
+
+import prog8.code.SymbolTable
+import prog8.code.ast.PtProgram
+import prog8.code.core.CompilationOptions
+import prog8.code.core.IAssemblyGenerator
+import prog8.code.core.IAssemblyProgram
+import prog8.code.core.IErrorReporter
+import prog8.codegen.intermediate.IRCodeGen
+import prog8.intermediate.IRFileWriter
+
+class CodeGen(private val program: PtProgram,
+              private val symbolTable: SymbolTable,
+              private val options: CompilationOptions,
+              private val errors: IErrorReporter
+): IAssemblyGenerator {
+    override fun compileToAssembly(): IAssemblyProgram? {
+
+        // you could write a code generator directly on the PtProgram AST,
+        // but you can also use the Intermediate Representation to build a codegen on:
+        val irCodeGen = IRCodeGen(program, symbolTable, options, errors)
+        val irProgram = irCodeGen.generate()
+
+        // this stub only writes the IR program to disk but doesn't generate anything else.
+        IRFileWriter(irProgram, null).write()
+
+        println("** experimental codegen stub: no assembly generated **")
+        return null
+    }
+}

codeGenExperimental/src/prog8/codegen/experimental/IndentingXmlWriter.kt

@@ -1,89 +0,0 @@
-package prog8.codegen.experimental
-
-import prog8.code.core.Position
-import java.util.*
-import javax.xml.stream.XMLStreamWriter
-
-class IndentingXmlWriter(val xml: XMLStreamWriter): XMLStreamWriter by xml {
-    private var indent = 0
-    private var content = Stack<Boolean>()
-
-    fun doc(version: String? = null) = if(version==null) writeStartDocument() else writeStartDocument(version)
-    fun endDoc() = writeEndDocument()
-    fun elt(name: String) = writeStartElement(name)
-    fun attr(name: String, value: String) = writeAttribute(name, value)
-    fun attrs(attributes: List<Pair<String, String>>) = attributes.forEach { writeAttribute(it.first, it.second) }
-    fun startChildren() {
-        xml.writeCharacters("\n")
-        content.pop()
-        content.push(true)
-    }
-    fun endElt(writeIndent: Boolean=true) = writeEndElement(writeIndent)
-    fun pos(pos: Position) = writeAttribute("src", pos.toString())
-    fun comment(text: String) {
-        writeComment(text)
-        writeCharacters("\n")
-    }
-
-    override fun writeStartDocument() {
-        xml.writeStartDocument()
-        xml.writeCharacters("\n")
-        content.push(true)
-    }
-
-    override fun writeStartDocument(version: String) {
-        xml.writeStartDocument(version)
-        xml.writeCharacters("\n")
-        content.push(true)
-    }
-
-    override fun writeEndDocument() {
-        xml.writeEndDocument()
-        xml.writeCharacters("\n")
-        require(indent==0)
-        require(content.size==1)
-    }
-
-    override fun writeStartElement(name: String) {
-        xml.writeCharacters("  ".repeat(indent))
-        xml.writeStartElement(name)
-        indent++
-        content.push(false)
-    }
-
-    override fun writeStartElement(name: String, ns: String) {
-        xml.writeCharacters("  ".repeat(indent))
-        xml.writeStartElement(name, ns)
-        indent++
-        content.push(false)
-    }
-
-    fun writeEndElement(writeIndents: Boolean) {
-        indent--
-        if(content.pop() && writeIndents)
-            xml.writeCharacters("  ".repeat(indent))
-        xml.writeEndElement()
-        xml.writeCharacters("\n")
-    }
-
-    override fun writeEndElement() = writeEndElement(true)
-
-    override fun writeStartElement(name: String, ns: String, p2: String) {
-        xml.writeCharacters("  ".repeat(indent))
-        xml.writeStartElement(name, ns, p2)
-        indent++
-        content.push(false)
-    }
-
-    fun writeTextNode(name: String, attrs: List<Pair<String, String>>, text: String, cdata: Boolean = true) {
-        xml.writeCharacters("  ".repeat(indent))
-        xml.writeStartElement(name)
-        attrs.forEach { (name, value) -> xml.writeAttribute(name, value) }
-        if(cdata)
-            xml.writeCData(text)
-        else
-            xml.writeCharacters(text)
-        xml.writeEndElement()
-        xml.writeCharacters("\n")
-    }
-}

codeGenIntermediate/build.gradle

@@ -3,7 +3,6 @@ plugins {
     id 'java'
     id 'application'
     id "org.jetbrains.kotlin.jvm"
-    id "io.kotest" version "0.3.9"
 }
 
 java {
@@ -25,9 +24,8 @@ compileTestKotlin {
 }
 
 dependencies {
-    implementation project(':codeAst')
     implementation project(':codeCore')
-    implementation project(':virtualmachine')
+    implementation project(':intermediate')
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"
     implementation "com.michael-bull.kotlin-result:kotlin-result-jvm:1.1.16"
@@ -62,4 +60,4 @@ test {
     testLogging {
         events "skipped", "failed"
     }
-}
+}

codeGenIntermediate/codeGenIntermediate.iml

@@ -5,15 +5,14 @@
     <content url="file://$MODULE_DIR$">
       <sourceFolder url="file://$MODULE_DIR$/src" isTestSource="false" />
       <sourceFolder url="file://$MODULE_DIR$/test" isTestSource="true" />
+      <excludeFolder url="file://$MODULE_DIR$/build" />
     </content>
     <orderEntry type="inheritedJdk" />
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="library" name="KotlinJavaRuntime" level="project" />
-    <orderEntry type="library" name="michael.bull.kotlin.result.jvm" level="project" />
+    <orderEntry type="module" module-name="codeCore" />
+    <orderEntry type="module" module-name="intermediate" />
     <orderEntry type="library" name="io.kotest.assertions.core.jvm" level="project" />
     <orderEntry type="library" name="io.kotest.runner.junit5.jvm" level="project" />
-    <orderEntry type="module" module-name="codeAst" />
-    <orderEntry type="module" module-name="codeCore" />
-    <orderEntry type="module" module-name="virtualmachine" />
   </component>
 </module>

codeGenIntermediate/src/prog8/codegen/intermediate/AssignmentGen.kt

@@ -0,0 +1,298 @@
+package prog8.codegen.intermediate
+
+import prog8.code.ast.*
+import prog8.code.core.AssemblyError
+import prog8.code.core.DataType
+import prog8.code.core.SignedDatatypes
+import prog8.intermediate.*
+
+internal class AssignmentGen(private val codeGen: IRCodeGen, private val expressionEval: ExpressionGen) {
+
+    internal fun translate(assignment: PtAssignment): IRCodeChunks {
+        if(assignment.target.children.single() is PtMachineRegister)
+            throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
+
+        return if (assignment.isInplaceAssign)
+            translateInplaceAssign(assignment)
+        else
+            translateRegularAssign(assignment)
+    }
+
+    private fun translateInplaceAssign(assignment: PtAssignment): IRCodeChunks {
+        val ident = assignment.target.identifier
+        val memory = assignment.target.memory
+        val array = assignment.target.array
+
+        return if(ident!=null) {
+            assignSelfInMemory(ident.targetName.joinToString("."), assignment.value, assignment)
+        } else if(memory != null) {
+            if(memory.address is PtNumber)
+                assignSelfInMemoryKnownAddress((memory.address as PtNumber).number.toInt(), assignment.value, assignment)
+            else
+                fallbackAssign(assignment)
+        } else if(array!=null) {
+            // NOTE: naive fallback assignment here will sometimes generate code that loads the index value multiple times
+            // in a register. It's way too much work to optimize that here - instead, we trust that the generated IL assembly
+            // will be optimized later and have the double assignments removed.
+            fallbackAssign(assignment)
+        } else {
+            fallbackAssign(assignment)
+        }
+    }
+
+    private fun assignSelfInMemoryKnownAddress(
+        address: Int,
+        value: PtExpression,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        val vmDt = codeGen.irType(value.type)
+        when(value) {
+            is PtIdentifier -> return emptyList() // do nothing, x=x null assignment.
+            is PtMachineRegister -> return emptyList() // do nothing, reg=reg null assignment
+            is PtPrefix -> return inplacePrefix(value.operator, vmDt, address, null)
+            is PtBinaryExpression -> return inplaceBinexpr(value.operator, value.right, vmDt, value.type in SignedDatatypes, address, null, origAssign)
+            is PtMemoryByte -> {
+                return if (!codeGen.options.compTarget.machine.isIOAddress(address.toUInt()))
+                    emptyList() // do nothing, mem=mem null assignment.
+                else {
+                    // read and write a (i/o) memory location to itself.
+                    val tempReg = codeGen.registers.nextFree()
+                    val code = IRCodeChunk(null, null)
+                    code += IRInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, value = address)
+                    code += IRInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, value = address)
+                    listOf(code)
+                }
+            }
+            else -> return fallbackAssign(origAssign)
+        }
+    }
+
+    private fun assignSelfInMemory(
+        symbol: String,
+        value: PtExpression,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        val vmDt = codeGen.irType(value.type)
+        return when(value) {
+            is PtIdentifier -> emptyList() // do nothing, x=x null assignment.
+            is PtMachineRegister -> emptyList() // do nothing, reg=reg null assignment
+            is PtPrefix -> inplacePrefix(value.operator, vmDt, null, symbol)
+            is PtBinaryExpression -> inplaceBinexpr(value.operator, value.right, vmDt, value.type in SignedDatatypes, null, symbol, origAssign)
+            is PtMemoryByte -> {
+                val code = IRCodeChunk(null, null)
+                val tempReg = codeGen.registers.nextFree()
+                code += IRInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, labelSymbol = symbol)
+                code += IRInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, labelSymbol = symbol)
+                listOf(code)
+            }
+
+            else -> fallbackAssign(origAssign)
+        }
+    }
+
+    private fun fallbackAssign(origAssign: PtAssignment): IRCodeChunks {
+        if (codeGen.options.slowCodegenWarnings)
+            codeGen.errors.warn("indirect code for in-place assignment", origAssign.position)
+        return translateRegularAssign(origAssign)
+    }
+
+    private fun inplaceBinexpr(
+        operator: String,
+        operand: PtExpression,
+        vmDt: IRDataType,
+        signed: Boolean,
+        knownAddress: Int?,
+        symbol: String?,
+        origAssign: PtAssignment
+    ): IRCodeChunks {
+        if(knownAddress!=null) {
+            when (operator) {
+                "+" -> return expressionEval.operatorPlusInplace(knownAddress, null, vmDt, operand)
+                "-" -> return expressionEval.operatorMinusInplace(knownAddress, null, vmDt, operand)
+                "*" -> return expressionEval.operatorMultiplyInplace(knownAddress, null, vmDt, operand)
+                "/" -> return expressionEval.operatorDivideInplace(knownAddress, null, vmDt, signed, operand)
+                "|" -> return expressionEval.operatorOrInplace(knownAddress, null, vmDt, operand)
+                "&" -> return expressionEval.operatorAndInplace(knownAddress, null, vmDt, operand)
+                "^" -> return expressionEval.operatorXorInplace(knownAddress, null, vmDt, operand)
+                "<<" -> return expressionEval.operatorShiftLeftInplace(knownAddress, null, vmDt, operand)
+                ">>" -> return expressionEval.operatorShiftRightInplace(knownAddress, null, vmDt, signed, operand)
+                else -> {}
+            }
+        } else {
+            symbol!!
+            when (operator) {
+                "+" -> return expressionEval.operatorPlusInplace(null, symbol, vmDt, operand)
+                "-" -> return expressionEval.operatorMinusInplace(null, symbol, vmDt, operand)
+                "*" -> return expressionEval.operatorMultiplyInplace(null, symbol, vmDt, operand)
+                "/" -> return expressionEval.operatorDivideInplace(null, symbol, vmDt, signed, operand)
+                "|" -> return expressionEval.operatorOrInplace(null, symbol, vmDt, operand)
+                "&" -> return expressionEval.operatorAndInplace(null, symbol, vmDt, operand)
+                "^" -> return expressionEval.operatorXorInplace(null, symbol, vmDt, operand)
+                "<<" -> return expressionEval.operatorShiftLeftInplace(null, symbol, vmDt, operand)
+                ">>" -> return expressionEval.operatorShiftRightInplace(null, symbol, vmDt, signed, operand)
+                else -> {}
+            }
+        }
+        return fallbackAssign(origAssign)
+    }
+
+    private fun inplacePrefix(operator: String, vmDt: IRDataType, knownAddress: Int?, addressSymbol: String?): IRCodeChunks {
+        val code= IRCodeChunk(null, null)
+        when(operator) {
+            "+" -> { }
+            "-" -> {
+                code += if(knownAddress!=null)
+                    IRInstruction(Opcode.NEGM, vmDt, value = knownAddress)
+                else
+                    IRInstruction(Opcode.NEGM, vmDt, labelSymbol = addressSymbol)
+            }
+            "~" -> {
+                val regMask = codeGen.registers.nextFree()
+                val mask = if(vmDt==IRDataType.BYTE) 0x00ff else 0xffff
+                code += IRInstruction(Opcode.LOAD, vmDt, reg1=regMask, value = mask)
+                code += if(knownAddress!=null)
+                    IRInstruction(Opcode.XORM, vmDt, reg1=regMask, value = knownAddress)
+                else
+                    IRInstruction(Opcode.XORM, vmDt, reg1=regMask, labelSymbol = addressSymbol)
+            }
+            else -> throw AssemblyError("weird prefix operator")
+        }
+        return listOf(code)
+    }
+
+    private fun translateRegularAssign(assignment: PtAssignment): IRCodeChunks {
+        // note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
+        val ident = assignment.target.identifier
+        val memory = assignment.target.memory
+        val array = assignment.target.array
+        val vmDt = codeGen.irType(assignment.value.type)
+        val result = mutableListOf<IRCodeChunkBase>()
+        var resultRegister = -1
+        var resultFpRegister = -1
+        val zero = codeGen.isZero(assignment.value)
+        if(!zero) {
+            // calculate the assignment value
+            if (vmDt == IRDataType.FLOAT) {
+                resultFpRegister = codeGen.registers.nextFreeFloat()
+                result += expressionEval.translateExpression(assignment.value, -1, resultFpRegister)
+            } else {
+                resultRegister = if (assignment.value is PtMachineRegister) {
+                    (assignment.value as PtMachineRegister).register
+                } else {
+                    val reg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(assignment.value, reg, -1)
+                    reg
+                }
+            }
+        }
+        if(ident!=null) {
+            val symbol = ident.targetName.joinToString(".")
+            val instruction = if(zero) {
+                IRInstruction(Opcode.STOREZM, vmDt, labelSymbol = symbol)
+            } else {
+                if (vmDt == IRDataType.FLOAT)
+                    IRInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, labelSymbol = symbol)
+                else
+                    IRInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, labelSymbol = symbol)
+            }
+            result += IRCodeChunk(null, null).also { it += instruction }
+            return result
+        }
+        else if(array!=null) {
+            val variable = array.variable.targetName.joinToString(".")
+            val itemsize = codeGen.program.memsizer.memorySize(array.type)
+
+            if(array.variable.type==DataType.UWORD) {
+                // indexing a pointer var instead of a real array or string
+                if(itemsize!=1)
+                    throw AssemblyError("non-array var indexing requires bytes dt")
+                if(array.index.type!=DataType.UBYTE)
+                    throw AssemblyError("non-array var indexing requires bytes index")
+                val idxReg = codeGen.registers.nextFree()
+                result += expressionEval.translateExpression(array.index, idxReg, -1)
+                val code = IRCodeChunk(null, null)
+                if(zero) {
+                    // there's no STOREZIX instruction
+                    resultRegister = codeGen.registers.nextFree()
+                    code += IRInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, value=0)
+                }
+                code += IRInstruction(Opcode.STOREIX, vmDt, reg1=resultRegister, reg2=idxReg, labelSymbol = variable)
+                result += code
+                return result
+            }
+
+            val fixedIndex = constIntValue(array.index)
+            if(zero) {
+                if(fixedIndex!=null) {
+                    val offset = fixedIndex*itemsize
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZM, vmDt, labelSymbol = "$variable+$offset") }
+                    result += chunk
+                } else {
+                    val indexReg = codeGen.registers.nextFree()
+                    result += loadIndexReg(array, itemsize, indexReg)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZX, vmDt, reg1=indexReg, labelSymbol = variable) }
+                }
+            } else {
+                if(vmDt== IRDataType.FLOAT) {
+                    if(fixedIndex!=null) {
+                        val offset = fixedIndex*itemsize
+                        val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, labelSymbol = "$variable+$offset") }
+                        result += chunk
+                    } else {
+                        val indexReg = codeGen.registers.nextFree()
+                        result += loadIndexReg(array, itemsize, indexReg)
+                        result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREX, vmDt, reg1 = indexReg, fpReg1 = resultFpRegister, labelSymbol = variable) }
+                    }
+                } else {
+                    if(fixedIndex!=null) {
+                        val offset = fixedIndex*itemsize
+                        val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, labelSymbol = "$variable+$offset") }
+                        result += chunk
+                    } else {
+                        val indexReg = codeGen.registers.nextFree()
+                        result += loadIndexReg(array, itemsize, indexReg)
+                        result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, labelSymbol = variable) }
+                    }
+                }
+            }
+            return result
+        }
+        else if(memory!=null) {
+            require(vmDt== IRDataType.BYTE)
+            if(zero) {
+                if(memory.address is PtNumber) {
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZM, vmDt, value=(memory.address as PtNumber).number.toInt()) }
+                    result += chunk
+                } else {
+                    val addressReg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(memory.address, addressReg, -1)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREZI, vmDt, reg1=addressReg) }
+                }
+            } else {
+                if(memory.address is PtNumber) {
+                    val chunk = IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREM, vmDt, reg1=resultRegister, value=(memory.address as PtNumber).number.toInt()) }
+                    result += chunk
+                } else {
+                    val addressReg = codeGen.registers.nextFree()
+                    result += expressionEval.translateExpression(memory.address, addressReg, -1)
+                    result += IRCodeChunk(null, null).also { it += IRInstruction(Opcode.STOREI, vmDt, reg1=resultRegister, reg2=addressReg) }
+                }
+            }
+
+            return result
+        }
+        else
+            throw AssemblyError("weird assigntarget")
+    }
+
+    private fun loadIndexReg(array: PtArrayIndexer, itemsize: Int, indexReg: Int): IRCodeChunks {
+        return if(itemsize==1) {
+            expressionEval.translateExpression(array.index, indexReg, -1)
+        } else {
+            val mult = PtBinaryExpression("*", DataType.UBYTE, array.position)
+            mult.children += array.index
+            mult.children += PtNumber(DataType.UBYTE, itemsize.toDouble(), array.position)
+            expressionEval.translateExpression(mult, indexReg, -1)
+        }
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/BuiltinFuncGen.kt

@@ -0,0 +1,404 @@
+package prog8.codegen.intermediate
+
+import prog8.code.StStaticVariable
+import prog8.code.ast.*
+import prog8.code.core.AssemblyError
+import prog8.code.core.DataType
+import prog8.intermediate.*
+
+
+internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGen: ExpressionGen) {
+
+    fun translate(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        return when(call.name) {
+            "any" -> funcAny(call, resultRegister)
+            "all" -> funcAll(call, resultRegister)
+            "abs" -> funcAbs(call, resultRegister)
+            "cmp" -> funcCmp(call)
+            "sgn" -> funcSgn(call, resultRegister)
+            "sqrt16" -> funcSqrt16(call, resultRegister)
+            "pop" -> funcPop(call)
+            "popw" -> funcPopw(call)
+            "push" -> funcPush(call)
+            "pushw" -> funcPushw(call)
+            "rsave",
+            "rsavex",
+            "rrestore",
+            "rrestorex" -> emptyList()  // vm doesn't have registers to save/restore
+            "callfar" -> throw AssemblyError("callfar() is for cx16 target only")
+            "callrom" -> throw AssemblyError("callrom() is for cx16 target only")
+            "msb" -> funcMsb(call, resultRegister)
+            "lsb" -> funcLsb(call, resultRegister)
+            "memory" -> funcMemory(call, resultRegister)
+            "peek" -> funcPeek(call, resultRegister)
+            "peekw" -> funcPeekW(call, resultRegister)
+            "poke" -> funcPoke(call)
+            "pokew" -> funcPokeW(call)
+            "pokemon" -> emptyList()
+            "mkword" -> funcMkword(call, resultRegister)
+            "sort" -> funcSort(call)
+            "reverse" -> funcReverse(call)
+            "rol" -> funcRolRor(Opcode.ROXL, call, resultRegister)
+            "ror" -> funcRolRor(Opcode.ROXR, call, resultRegister)
+            "rol2" -> funcRolRor(Opcode.ROL, call, resultRegister)
+            "ror2" -> funcRolRor(Opcode.ROR, call, resultRegister)
+            else -> throw AssemblyError("missing builtinfunc for ${call.name}")
+        }
+    }
+
+    private fun funcCmp(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val leftRegister = codeGen.registers.nextFree()
+        val rightRegister = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], leftRegister, -1)
+        result += exprGen.translateExpression(call.args[1], rightRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.CMP, codeGen.irType(call.args[0].type), reg1=leftRegister, reg2=rightRegister)
+        }
+        return result
+    }
+
+    private fun funcAny(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when (array.dt) {
+                DataType.ARRAY_UB,
+                DataType.ARRAY_B -> IMSyscall.ANY_BYTE
+                DataType.ARRAY_UW,
+                DataType.ARRAY_W -> IMSyscall.ANY_WORD
+                DataType.ARRAY_F -> IMSyscall.ANY_FLOAT
+                else -> throw IllegalArgumentException("weird type")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+            if(resultRegister!=0)
+                it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
+        }
+        return result
+    }
+
+    private fun funcAll(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB,
+                DataType.ARRAY_B -> IMSyscall.ALL_BYTE
+                DataType.ARRAY_UW,
+                DataType.ARRAY_W -> IMSyscall.ALL_WORD
+                DataType.ARRAY_F -> IMSyscall.ALL_FLOAT
+                else -> throw IllegalArgumentException("weird type")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+            if(resultRegister!=0)
+                it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
+        }
+        return result
+    }
+
+    private fun funcAbs(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val sourceDt = call.args.single().type
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(sourceDt!=DataType.UWORD) {
+            result += exprGen.translateExpression(call.args[0], resultRegister, -1)
+            when (sourceDt) {
+                DataType.UBYTE -> {
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1 = resultRegister)
+                    }
+                }
+                DataType.BYTE -> {
+                    val notNegativeLabel = codeGen.createLabelName()
+                    val compareReg = codeGen.registers.nextFree()
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=compareReg, reg2=resultRegister)
+                        it += IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=compareReg, value=0x80)
+                        it += IRInstruction(Opcode.BZ, IRDataType.BYTE, reg1=compareReg, labelSymbol = notNegativeLabel)
+                        it += IRInstruction(Opcode.NEG, IRDataType.BYTE, reg1=resultRegister)
+                        it += IRInstruction(Opcode.EXT, IRDataType.BYTE, reg1=resultRegister)
+                    }
+                    result += IRCodeChunk(notNegativeLabel, null)
+                }
+                DataType.WORD -> {
+                    val notNegativeLabel = codeGen.createLabelName()
+                    val compareReg = codeGen.registers.nextFree()
+                    result += IRCodeChunk(null, null).also {
+                        it += IRInstruction(Opcode.LOADR, IRDataType.WORD, reg1=compareReg, reg2=resultRegister)
+                        it += IRInstruction(Opcode.AND, IRDataType.WORD, reg1=compareReg, value=0x8000)
+                        it += IRInstruction(Opcode.BZ, IRDataType.WORD, reg1=compareReg, labelSymbol = notNegativeLabel)
+                        it += IRInstruction(Opcode.NEG, IRDataType.WORD, reg1=resultRegister)
+                    }
+                    result += IRCodeChunk(notNegativeLabel, null)
+                }
+                else -> throw AssemblyError("weird type")
+            }
+        }
+        return result
+    }
+
+    private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val reg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.SGN, codeGen.irType(call.type), reg1 = resultRegister, reg2 = reg)
+        }
+        return result
+    }
+
+    private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val reg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.SQRT, IRDataType.WORD, reg1=resultRegister, reg2=reg)
+        }
+        return result
+    }
+
+    private fun funcPop(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val code = IRCodeChunk(null, null)
+        val reg = codeGen.registers.nextFree()
+        code += IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=reg)
+        val result = mutableListOf<IRCodeChunkBase>(code)
+        result += assignRegisterTo(call.args.single(), reg)
+        return result
+    }
+
+    private fun funcPopw(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val code = IRCodeChunk(null, null)
+        val reg = codeGen.registers.nextFree()
+        code += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=reg)
+        val result = mutableListOf<IRCodeChunkBase>(code)
+        result += assignRegisterTo(call.args.single(), reg)
+        return result
+    }
+
+    private fun funcPush(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        val reg = codeGen.registers.nextFree()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=reg)
+        }
+        return result
+    }
+
+    private fun funcPushw(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        val reg = codeGen.registers.nextFree()
+        result += exprGen.translateExpression(call.args.single(), reg, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1 = reg)
+        }
+        return result
+    }
+
+    private fun funcReverse(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB, DataType.ARRAY_B, DataType.STR -> IMSyscall.REVERSE_BYTES
+                DataType.ARRAY_UW, DataType.ARRAY_W -> IMSyscall.REVERSE_WORDS
+                DataType.ARRAY_F -> IMSyscall.REVERSE_FLOATS
+                else -> throw IllegalArgumentException("weird type to reverse")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+        }
+        return result
+    }
+
+    private fun funcSort(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val arrayName = call.args[0] as PtIdentifier
+        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
+        val syscall =
+            when(array.dt) {
+                DataType.ARRAY_UB -> IMSyscall.SORT_UBYTE
+                DataType.ARRAY_B -> IMSyscall.SORT_BYTE
+                DataType.ARRAY_UW -> IMSyscall.SORT_UWORD
+                DataType.ARRAY_W -> IMSyscall.SORT_WORD
+                DataType.STR -> IMSyscall.SORT_UBYTE
+                DataType.ARRAY_F -> throw IllegalArgumentException("sorting a floating point array is not supported")
+                else -> throw IllegalArgumentException("weird type to sort")
+            }
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
+            it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
+        }
+        return result
+    }
+
+    private fun funcMkword(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val msbReg = codeGen.registers.nextFree()
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], msbReg, -1)
+        result += exprGen.translateExpression(call.args[1], resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.CONCAT, IRDataType.BYTE, reg1 = resultRegister, reg2 = msbReg)
+        }
+        return result
+    }
+
+    private fun funcPokeW(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(codeGen.isZero(call.args[1])) {
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZM, IRDataType.WORD, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZI, IRDataType.WORD, reg2 = addressReg)
+                }
+            }
+        } else {
+            val valueReg = codeGen.registers.nextFree()
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREM, IRDataType.WORD, reg1 = valueReg, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREI, IRDataType.WORD, reg1 = valueReg, reg2 = addressReg)
+                }
+            }
+        }
+        return result
+    }
+
+    private fun funcPoke(call: PtBuiltinFunctionCall): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(codeGen.isZero(call.args[1])) {
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZM, IRDataType.BYTE, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREZI, IRDataType.BYTE, reg2 = addressReg)
+                }
+            }
+        } else {
+            val valueReg = codeGen.registers.nextFree()
+            if (call.args[0] is PtNumber) {
+                val address = (call.args[0] as PtNumber).number.toInt()
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREM, IRDataType.BYTE, reg1 = valueReg, value = address)
+                }
+            } else {
+                val addressReg = codeGen.registers.nextFree()
+                result += exprGen.translateExpression(call.args[0], addressReg, -1)
+                result += exprGen.translateExpression(call.args[1], valueReg, -1)
+                result += IRCodeChunk(null, null).also {
+                    it += IRInstruction(Opcode.STOREI, IRDataType.BYTE, reg1 = valueReg, reg2 = addressReg)
+                }
+            }
+        }
+        return result
+    }
+
+    private fun funcPeekW(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(call.args[0] is PtNumber) {
+            val address = (call.args[0] as PtNumber).number.toInt()
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADM, IRDataType.WORD, reg1 = resultRegister, value = address)
+            }
+        } else {
+            val addressReg = codeGen.registers.nextFree()
+            result += exprGen.translateExpression(call.args.single(), addressReg, -1)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADI, IRDataType.WORD, reg1 = resultRegister, reg2 = addressReg)
+            }
+        }
+        return result
+    }
+
+    private fun funcPeek(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        if(call.args[0] is PtNumber) {
+            val address = (call.args[0] as PtNumber).number.toInt()
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADM, IRDataType.BYTE, reg1 = resultRegister, value = address)
+            }
+        } else {
+            val addressReg = codeGen.registers.nextFree()
+            result += exprGen.translateExpression(call.args.single(), addressReg, -1)
+            result += IRCodeChunk(null, null).also {
+                it += IRInstruction(Opcode.LOADI, IRDataType.BYTE, reg1 = resultRegister, reg2 = addressReg)
+            }
+        }
+        return result
+    }
+
+    private fun funcMemory(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val name = (call.args[0] as PtString).value
+        val code = IRCodeChunk(null, null)
+        code += IRInstruction(Opcode.LOAD, IRDataType.WORD, reg1=resultRegister, labelSymbol = "prog8_slabs.prog8_memoryslab_$name")
+        return listOf(code)
+    }
+
+    private fun funcLsb(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        return exprGen.translateExpression(call.args.single(), resultRegister, -1)
+        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
+    }
+
+    private fun funcMsb(call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args.single(), resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(Opcode.MSIG, IRDataType.BYTE, reg1 = resultRegister, reg2 = resultRegister)
+        }
+        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
+        return result
+    }
+
+    private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): IRCodeChunks {
+        val vmDt = codeGen.irType(call.args[0].type)
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += exprGen.translateExpression(call.args[0], resultRegister, -1)
+        result += IRCodeChunk(null, null).also {
+            it += IRInstruction(opcode, vmDt, reg1 = resultRegister)
+        }
+        result += assignRegisterTo(call.args[0], resultRegister)
+        return result
+    }
+
+    private fun assignRegisterTo(target: PtExpression, register: Int): IRCodeChunks {
+        val assignment = PtAssignment(target.position)
+        val assignTarget = PtAssignTarget(target.position)
+        assignTarget.children.add(target)
+        assignment.children.add(assignTarget)
+        assignment.children.add(PtMachineRegister(register, target.type, target.position))
+        val result = mutableListOf<IRCodeChunkBase>()
+        result += codeGen.translateNode(assignment)
+        return result
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt

@@ -0,0 +1,272 @@
+package prog8.codegen.intermediate
+
+import prog8.intermediate.*
+
+internal class IRPeepholeOptimizer(private val irprog: IRProgram) {
+    fun optimize() {
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            removeEmptyChunks(sub)
+            joinChunks(sub)
+            sub.chunks.withIndex().forEach { (index, chunk1) ->
+                // we don't optimize Inline Asm chunks here.
+                val chunk2 = if(index<sub.chunks.size-1) sub.chunks[index+1] else null
+                if(chunk1 is IRCodeChunk) {
+                    do {
+                        val indexedInstructions = chunk1.instructions.withIndex()
+                            .map { IndexedValue(it.index, it.value) }
+                        val changed = removeNops(chunk1, indexedInstructions)
+                                || removeDoubleLoadsAndStores(chunk1, indexedInstructions)       // TODO not yet implemented
+                                || removeUselessArithmetic(chunk1, indexedInstructions)
+                                || removeWeirdBranches(chunk1, chunk2, indexedInstructions)
+                                || removeDoubleSecClc(chunk1, indexedInstructions)
+                                || cleanupPushPop(chunk1, indexedInstructions)
+                        // TODO other optimizations:
+                        //  more complex optimizations such as unused registers
+                    } while (changed)
+                }
+            }
+            removeEmptyChunks(sub)
+        }
+
+        irprog.linkChunks() // re-link
+    }
+
+    private fun removeEmptyChunks(sub: IRSubroutine) {
+        if(sub.chunks.isEmpty())
+            return
+
+        /*
+        Empty Code chunk with label ->
+            If next chunk has no label -> move label to next chunk, remove original
+            If next chunk has label -> label name should be the same, remove original. Otherwise FOR NOW leave it in place. (TODO: consolidate labels into 1)
+            If is last chunk -> keep chunk in place because of the label.
+        Empty Code chunk without label ->
+            should not have been generated! ERROR.
+         */
+
+
+        val relabelChunks = mutableListOf<Pair<Int, String>>()
+        val removeChunks = mutableListOf<Int>()
+
+        sub.chunks.withIndex().forEach { (index, chunk) ->
+            if(chunk is IRCodeChunk && chunk.instructions.isEmpty()) {
+                if(chunk.label==null) {
+                    removeChunks += index
+                } else {
+                    if (index < sub.chunks.size - 1) {
+                        val nextchunk = sub.chunks[index + 1]
+                        if (nextchunk.label == null) {
+                            // can transplant label to next chunk and remove this empty one.
+                            relabelChunks += Pair(index + 1, chunk.label!!)
+                            removeChunks += index
+                        } else {
+                            if (chunk.label == nextchunk.label)
+                                removeChunks += index
+                            else {
+                                // TODO: consolidate labels on same chunk
+                            }
+                        }
+                    }
+                }
+            }
+        }
+
+        relabelChunks.forEach { (index, label) ->
+            val chunk = IRCodeChunk(label, null)
+            chunk.instructions += sub.chunks[index].instructions
+            sub.chunks[index] = chunk
+        }
+        removeChunks.reversed().forEach { index -> sub.chunks.removeAt(index) }
+    }
+
+    private fun joinChunks(sub: IRSubroutine) {
+        // Subroutine contains a list of chunks. Some can be joined into one.
+
+        if(sub.chunks.isEmpty())
+            return
+
+        fun mayJoin(previous: IRCodeChunkBase, chunk: IRCodeChunkBase): Boolean {
+            if(chunk.label!=null)
+                return false
+            if(previous is IRCodeChunk && chunk is IRCodeChunk) {
+                // if the previous chunk doesn't end in a jump or a return, flow continues into the next chunk
+                val lastInstruction = previous.instructions.lastOrNull()
+                if(lastInstruction!=null)
+                    return lastInstruction.opcode !in OpcodesThatJump
+                return true
+            }
+            return false
+        }
+
+        val chunks = mutableListOf<IRCodeChunkBase>()
+        chunks += sub.chunks[0]
+        for(ix in 1 until sub.chunks.size) {
+            val lastChunk = chunks.last()
+            if(mayJoin(lastChunk, sub.chunks[ix])) {
+                lastChunk.instructions += sub.chunks[ix].instructions
+                lastChunk.next = sub.chunks[ix].next
+            }
+            else
+                chunks += sub.chunks[ix]
+        }
+        sub.chunks.clear()
+        sub.chunks += chunks
+    }
+
+    private fun cleanupPushPop(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        //  push followed by pop to same target, or different target->replace with load
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if(ins.opcode== Opcode.PUSH) {
+                if(idx < chunk.instructions.size-1) {
+                    val insAfter = chunk.instructions[idx+1] as? IRInstruction
+                    if(insAfter!=null && insAfter.opcode == Opcode.POP) {
+                        if(ins.reg1==insAfter.reg1) {
+                            chunk.instructions.removeAt(idx)
+                            chunk.instructions.removeAt(idx)
+                        } else {
+                            chunk.instructions[idx] = IRInstruction(Opcode.LOADR, ins.type, reg1=insAfter.reg1, reg2=ins.reg1)
+                            chunk.instructions.removeAt(idx+1)
+                        }
+                        changed = true
+                    }
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeDoubleSecClc(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        //  double sec, clc
+        //  sec+clc or clc+sec
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if(ins.opcode== Opcode.SEC || ins.opcode== Opcode.CLC) {
+                if(idx < chunk.instructions.size-1) {
+                    val insAfter = chunk.instructions[idx+1] as? IRInstruction
+                    if(insAfter?.opcode == ins.opcode) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                    else if(ins.opcode== Opcode.SEC && insAfter?.opcode== Opcode.CLC) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                    else if(ins.opcode== Opcode.CLC && insAfter?.opcode== Opcode.SEC) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeWeirdBranches(chunk: IRCodeChunk, nextChunk: IRCodeChunkBase?, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            val labelSymbol = ins.labelSymbol
+
+            // remove jump/branch to label immediately below (= next chunk if it has that label)
+            if(ins.opcode== Opcode.JUMP && labelSymbol!=null) {
+                if(idx==chunk.instructions.size-1 && ins.branchTarget===nextChunk) {
+                    chunk.instructions.removeAt(idx)
+                    changed = true
+                }
+            }
+            // remove useless RETURN
+            if(ins.opcode == Opcode.RETURN && idx>0) {
+                val previous = chunk.instructions[idx-1] as? IRInstruction
+                if(previous?.opcode in OpcodesThatJump) {
+                    chunk.instructions.removeAt(idx)
+                    changed = true
+                }
+            }
+        }
+        return changed
+    }
+
+    private fun removeUselessArithmetic(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        // note: this is hard to solve for the non-immediate instructions atm because the values are loaded into registers first
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            when (ins.opcode) {
+                Opcode.DIV, Opcode.DIVS, Opcode.MUL, Opcode.MOD -> {
+                    if (ins.value == 1) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.ADD, Opcode.SUB -> {
+                    if (ins.value == 1) {
+                        chunk.instructions[idx] = IRInstruction(
+                            if (ins.opcode == Opcode.ADD) Opcode.INC else Opcode.DEC,
+                            ins.type,
+                            ins.reg1
+                        )
+                        changed = true
+                    } else if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.AND -> {
+                    if (ins.value == 0) {
+                        chunk.instructions[idx] = IRInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = 0)
+                        changed = true
+                    } else if (ins.value == 255 && ins.type == IRDataType.BYTE) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    } else if (ins.value == 65535 && ins.type == IRDataType.WORD) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                Opcode.OR -> {
+                    if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    } else if ((ins.value == 255 && ins.type == IRDataType.BYTE) || (ins.value == 65535 && ins.type == IRDataType.WORD)) {
+                        chunk.instructions[idx] = IRInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = ins.value)
+                        changed = true
+                    }
+                }
+                Opcode.XOR -> {
+                    if (ins.value == 0) {
+                        chunk.instructions.removeAt(idx)
+                        changed = true
+                    }
+                }
+                else -> {}
+            }
+        }
+        return changed
+    }
+
+    private fun removeNops(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.reversed().forEach { (idx, ins) ->
+            if (ins.opcode == Opcode.NOP) {
+                changed = true
+                chunk.instructions.removeAt(idx)
+            }
+        }
+        return changed
+    }
+
+    private fun removeDoubleLoadsAndStores(chunk: IRCodeChunk, indexedInstructions: List<IndexedValue<IRInstruction>>): Boolean {
+        var changed = false
+        indexedInstructions.forEach { (idx, ins) ->
+
+            // TODO: detect multiple loads to the same target registers, only keep first (if source is not I/O memory)
+            // TODO: detect multiple stores to the same target, only keep first (if target is not I/O memory)
+            // TODO: detect multiple float ffrom/fto to the same target, only keep first
+            // TODO: detect multiple sequential rnd with same reg1, only keep one
+            // TODO: detect subsequent same xors/nots/negs, remove the pairs completely as they cancel out
+            // TODO: detect multiple same ands, ors; only keep first
+            // TODO: (hard) detect multiple registers being assigned the same value (and not changed) - use only 1 of them
+            // ...
+        }
+        return changed
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/IRUnusedCodeRemover.kt

@@ -0,0 +1,103 @@
+package prog8.codegen.intermediate
+
+import prog8.code.core.IErrorReporter
+import prog8.code.core.SourceCode.Companion.libraryFilePrefix
+import prog8.intermediate.*
+
+
+internal class IRUnusedCodeRemover(private val irprog: IRProgram, private val errors: IErrorReporter) {
+    fun optimize(): Int {
+        var numRemoved = removeSimpleUnlinked() + removeUnreachable()
+
+        // remove empty subs
+        irprog.blocks.forEach { block ->
+            block.subroutines.reversed().forEach { sub ->
+                if(sub.isEmpty()) {
+                    if(!sub.position.file.startsWith(libraryFilePrefix))
+                        errors.warn("unused subroutine ${sub.name}", sub.position)
+                    block.subroutines.remove(sub)
+                    numRemoved++
+                }
+            }
+        }
+
+        // remove empty blocks
+        irprog.blocks.reversed().forEach { block ->
+            if(block.isEmpty()) {
+                irprog.blocks.remove(block)
+                numRemoved++
+            }
+        }
+
+        return numRemoved
+    }
+
+    private fun removeUnreachable(): Int {
+        val reachable = mutableSetOf(irprog.blocks.single { it.name=="main" }.subroutines.single { it.name=="main.start" }.chunks.first())
+
+        fun grow() {
+            val new = mutableSetOf<IRCodeChunkBase>()
+            reachable.forEach {
+                it.next?.let { next -> new += next }
+                it.instructions.forEach { instr -> instr.branchTarget?.let { target -> new += target} }
+            }
+            reachable += new
+        }
+
+        var previousCount = reachable.size
+        while(true) {
+            grow()
+            if(reachable.size<=previousCount)
+                break
+            previousCount = reachable.size
+        }
+
+        return removeUnlinkedChunks(reachable)
+    }
+
+    private fun removeSimpleUnlinked(): Int {
+        val linkedChunks = mutableSetOf<IRCodeChunkBase>()
+
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            sub.chunks.forEach { chunk ->
+                chunk.next?.let { next -> linkedChunks += next }
+                chunk.instructions.forEach { it.branchTarget?.let { target -> linkedChunks += target } }
+                if (chunk.label == "main.start")
+                    linkedChunks += chunk
+            }
+        }
+
+        return removeUnlinkedChunks(linkedChunks)
+    }
+
+    private fun removeUnlinkedChunks(
+        linkedChunks: MutableSet<IRCodeChunkBase>
+    ): Int {
+        var numRemoved = 0
+        irprog.blocks.asSequence().flatMap { it.subroutines }.forEach { sub ->
+            sub.chunks.withIndex().reversed().forEach { (index, chunk) ->
+                if (chunk !in linkedChunks) {
+                    if (chunk === sub.chunks[0]) {
+                        when(chunk) {
+                            is IRCodeChunk -> {
+                                if (chunk.isNotEmpty()) {
+                                    // don't remove the first chunk of the sub itself because it has to have the name of the sub as label
+                                    chunk.instructions.clear()
+                                    numRemoved++
+                                }
+                            }
+                            is IRInlineAsmChunk, is IRInlineBinaryChunk -> {
+                                sub.chunks[index] = IRCodeChunk(chunk.label, chunk.next)
+                                numRemoved++
+                            }
+                        }
+                    } else {
+                        sub.chunks.removeAt(index)
+                        numRemoved++
+                    }
+                }
+            }
+        }
+        return numRemoved
+    }
+}

codeGenIntermediate/src/prog8/codegen/intermediate/RegisterPool.kt

@@ -0,0 +1,29 @@
+package prog8.codegen.intermediate
+
+import prog8.code.core.AssemblyError
+import prog8.intermediate.SyscallRegisterBase
+
+internal class RegisterPool {
+    // reserve 0,1,2 for return values of subroutine calls and syscalls
+    private var firstFree: Int=3
+    private var firstFreeFloat: Int=3
+
+    fun peekNext() = firstFree
+    fun peekNextFloat() = firstFreeFloat
+
+    fun nextFree(): Int {
+        val result = firstFree
+        firstFree++
+        if(firstFree >= SyscallRegisterBase)
+            throw AssemblyError("out of virtual registers (int)")
+        return result
+    }
+
+    fun nextFreeFloat(): Int {
+        val result = firstFreeFloat
+        firstFreeFloat++
+        if(firstFreeFloat >= SyscallRegisterBase)
+            throw AssemblyError("out of virtual registers (fp)")
+        return result
+    }
+}

codeGenIntermediate/src/prog8/codegen/vm/VmCodeGen.kt

@@ -0,0 +1,36 @@
+package prog8.codegen.vm
+
+import prog8.code.SymbolTable
+import prog8.code.ast.PtProgram
+import prog8.code.core.CompilationOptions
+import prog8.code.core.IAssemblyGenerator
+import prog8.code.core.IAssemblyProgram
+import prog8.code.core.IErrorReporter
+import prog8.codegen.intermediate.IRCodeGen
+import prog8.intermediate.IRFileWriter
+import prog8.intermediate.IRProgram
+
+class VmCodeGen(private val program: PtProgram,
+                private val symbolTable: SymbolTable,
+                private val options: CompilationOptions,
+                private val errors: IErrorReporter
+): IAssemblyGenerator {
+    override fun compileToAssembly(): IAssemblyProgram? {
+
+        val irCodeGen = IRCodeGen(program, symbolTable, options, errors)
+        val irProgram = irCodeGen.generate()
+
+        // no need to check options.keepIR, as the VM file format *is* the IR file.
+        return VmAssemblyProgram(irProgram.name, irProgram)
+    }
+}
+
+
+internal class VmAssemblyProgram(override val name: String, private val irProgram: IRProgram): IAssemblyProgram {
+
+    override fun assemble(options: CompilationOptions): Boolean {
+        // the VM reads the IR file from disk.
+        IRFileWriter(irProgram, null).write()
+        return true
+    }
+}

codeGenIntermediate/test/Dummies.kt

@@ -1,5 +1,3 @@
-package prog8tests.vm.helpers
-
 import prog8.code.core.DataType
 import prog8.code.core.Encoding
 import prog8.code.core.IMemSizer

codeGenIntermediate/test/TestIRPeepholeOpt.kt

@@ -0,0 +1,189 @@
+import io.kotest.core.spec.style.FunSpec
+import io.kotest.matchers.shouldBe
+import prog8.code.core.*
+import prog8.code.target.VMTarget
+import prog8.codegen.intermediate.IRPeepholeOptimizer
+import prog8.intermediate.*
+
+class TestIRPeepholeOpt: FunSpec({
+    fun makeIRProgram(chunks: List<IRCodeChunkBase>): IRProgram {
+        require(chunks.first().label=="main.start")
+        val block = IRBlock("main", null, IRBlock.BlockAlignment.NONE, Position.DUMMY)
+        val sub = IRSubroutine("main.start", emptyList(), null, Position.DUMMY)
+        chunks.forEach { sub += it }
+        block += sub
+        val target = VMTarget()
+        val options = CompilationOptions(
+            OutputType.RAW,
+            CbmPrgLauncherType.NONE,
+            ZeropageType.DONTUSE,
+            emptyList(),
+            floats = false,
+            noSysInit = true,
+            compTarget = target,
+            loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
+        )
+        val prog = IRProgram("test", IRSymbolTable(null), options, target)
+        prog.addBlock(block)
+        prog.linkChunks()
+        prog.validate()
+        return prog
+    }
+
+    fun makeIRProgram(instructions: List<IRInstruction>): IRProgram {
+        val chunk = IRCodeChunk("main.start", null)
+        instructions.forEach { chunk += it }
+        return makeIRProgram(listOf(chunk))
+    }
+
+    fun IRProgram.chunks(): List<IRCodeChunkBase> = this.blocks.flatMap { it.subroutines }.flatMap { it.chunks }
+
+    test("remove nops") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=1, value=42),
+            IRInstruction(Opcode.NOP),
+            IRInstruction(Opcode.NOP)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 3
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 1
+    }
+
+    test("remove jmp to label below") {
+        val c1 = IRCodeChunk("main.start", null)
+        c1 += IRInstruction(Opcode.JUMP, labelSymbol = "label")  // removed, but chunk stays because of label
+        val c2 = IRCodeChunk("label", null)
+        c2 += IRInstruction(Opcode.JUMP, labelSymbol = "label2") // removed, but chunk stays because of label
+        c2 += IRInstruction(Opcode.NOP)  // removed
+        val c3 = IRCodeChunk("label2", null)
+        c3 += IRInstruction(Opcode.JUMP, labelSymbol = "label3")
+        c3 += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=1)
+        val c4 = IRCodeChunk("label3", null)
+        val irProg = makeIRProgram(listOf(c1, c2, c3, c4))
+
+        irProg.chunks().size shouldBe 4
+        irProg.chunks().flatMap { it.instructions }.size shouldBe 5
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().size shouldBe 4
+        irProg.chunks()[0].label shouldBe "main.start"
+        irProg.chunks()[1].label shouldBe "label"
+        irProg.chunks()[2].label shouldBe "label2"
+        irProg.chunks()[3].label shouldBe "label3"
+        irProg.chunks()[0].isEmpty() shouldBe true
+        irProg.chunks()[1].isEmpty() shouldBe true
+        irProg.chunks()[2].isEmpty() shouldBe false
+        irProg.chunks()[3].isEmpty() shouldBe true
+        val instr = irProg.chunks().flatMap { it.instructions }
+        instr.size shouldBe 2
+        instr[0].opcode shouldBe Opcode.JUMP
+        instr[1].opcode shouldBe Opcode.INC
+    }
+
+    test("remove double sec/clc") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.SEC),
+            IRInstruction(Opcode.CLC),
+            IRInstruction(Opcode.CLC),
+            IRInstruction(Opcode.CLC)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 6
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 1
+        instr[0].opcode shouldBe Opcode.CLC
+    }
+
+    test("push followed by pop") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=42),
+            IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=42),
+            IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=99),
+            IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=222)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 4
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 1
+        instr[0].opcode shouldBe Opcode.LOADR
+        instr[0].reg1 shouldBe 222
+        instr[0].reg2 shouldBe 99
+    }
+
+    test("remove useless div/mul, add/sub") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.DIV, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.DIVS, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.MUL, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.MOD, IRDataType.BYTE, reg1=42, value = 2),
+            IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, value = 0)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 10
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 4
+    }
+
+    test("replace add/sub 1 by inc/dec") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.ADD, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.SUB, IRDataType.BYTE, reg1=42, value = 1)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 2
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 2
+        instr[0].opcode shouldBe Opcode.INC
+        instr[1].opcode shouldBe Opcode.DEC
+    }
+
+    test("remove useless and/or/xor") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 255),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 65535),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 200),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 60000),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 1),
+            IRInstruction(Opcode.XOR, IRDataType.BYTE, reg1=42, value = 1)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 8
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        irProg.chunks().single().instructions.size shouldBe 4
+    }
+
+    test("replace and/or/xor by constant number") {
+        val irProg = makeIRProgram(listOf(
+            IRInstruction(Opcode.AND, IRDataType.BYTE, reg1=42, value = 0),
+            IRInstruction(Opcode.AND, IRDataType.WORD, reg1=42, value = 0),
+            IRInstruction(Opcode.OR, IRDataType.BYTE, reg1=42, value = 255),
+            IRInstruction(Opcode.OR, IRDataType.WORD, reg1=42, value = 65535)
+        ))
+        irProg.chunks().single().instructions.size shouldBe 4
+        val opt = IRPeepholeOptimizer(irProg)
+        opt.optimize()
+        val instr = irProg.chunks().single().instructions
+        instr.size shouldBe 4
+        instr[0].opcode shouldBe Opcode.LOAD
+        instr[1].opcode shouldBe Opcode.LOAD
+        instr[2].opcode shouldBe Opcode.LOAD
+        instr[3].opcode shouldBe Opcode.LOAD
+        instr[0].value shouldBe 0
+        instr[1].value shouldBe 0
+        instr[2].value shouldBe 255
+        instr[3].value shouldBe 65535
+    }
+})

codeGenVirtual/src/prog8/codegen/virtual/AssemblyProgram.kt

@@ -1,138 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.core.AssemblyError
-import prog8.code.core.CompilationOptions
-import prog8.code.core.IAssemblyProgram
-import prog8.vm.Instruction
-import prog8.vm.Opcode
-import prog8.vm.OpcodesWithAddress
-import prog8.vm.VmDataType
-import java.io.BufferedWriter
-import java.nio.file.Path
-import kotlin.io.path.bufferedWriter
-import kotlin.io.path.div
-
-
-class AssemblyProgram(override val name: String, private val allocations: VariableAllocator
-) : IAssemblyProgram {
-
-    private val globalInits = mutableListOf<VmCodeLine>()
-    private val blocks = mutableListOf<VmCodeChunk>()
-
-    override fun assemble(options: CompilationOptions): Boolean {
-        val outfile = options.outputDir / ("$name.p8virt")
-        println("write code to $outfile")
-        outfile.bufferedWriter().use { out ->
-            allocations.asVmMemory().forEach { (name, alloc) ->
-                out.write("; ${name.joinToString(".")}\n")
-                out.write(alloc + "\n")
-            }
-            out.write("------PROGRAM------\n")
-
-            if(!options.dontReinitGlobals) {
-                out.write("; global var inits\n")
-                globalInits.forEach { out.writeLine(it) }
-            }
-
-            out.write("; actual program code\n")
-            blocks.asSequence().flatMap { it.lines }.forEach { line->out.writeLine(line) }
-        }
-        return true
-    }
-
-    private fun BufferedWriter.writeLine(line: VmCodeLine) {
-        when(line) {
-            is VmCodeComment -> write("; ${line.comment}\n")
-            is VmCodeInstruction -> {
-                write(line.ins.toString() + "\n")
-            }
-            is VmCodeLabel -> write("_" + line.name.joinToString(".") + ":\n")
-            is VmCodeInlineAsm -> {
-                val asm = line.assembly.replace("""\{[a-zA-Z\d_\.]+\}""".toRegex()) { matchResult ->
-                    val name = matchResult.value.substring(1, matchResult.value.length-1).split('.')
-                    allocations.get(name).toString() }
-                write(asm+"\n")
-            }
-            is VmCodeInlineBinary -> {
-                write("incbin \"${line.file}\"")
-                if(line.offset!=null)
-                    write(",${line.offset}")
-                if(line.length!=null)
-                    write(",${line.length}")
-                write("\n")
-            }
-            else -> throw AssemblyError("invalid vm code line")
-        }
-    }
-
-    fun addGlobalInits(chunk: VmCodeChunk) = globalInits.addAll(chunk.lines)
-    fun addBlock(block: VmCodeChunk) = blocks.add(block)
-    fun getBlocks(): List<VmCodeChunk> = blocks
-}
-
-sealed class VmCodeLine
-
-class VmCodeInstruction(
-    opcode: Opcode,
-    type: VmDataType?=null,
-    reg1: Int?=null,        // 0-$ffff
-    reg2: Int?=null,        // 0-$ffff
-    fpReg1: Int?=null,      // 0-$ffff
-    fpReg2: Int?=null,      // 0-$ffff
-    value: Int?=null,       // 0-$ffff
-    fpValue: Float?=null,
-    labelSymbol: List<String>?=null    // alternative to value for branch/call/jump labels
-): VmCodeLine() {
-    val ins = Instruction(opcode, type, reg1, reg2, fpReg1, fpReg2, value, fpValue, labelSymbol)
-
-    init {
-        if(reg1!=null && (reg1<0 || reg1>65536))
-            throw IllegalArgumentException("reg1 out of bounds")
-        if(reg2!=null && (reg2<0 || reg2>65536))
-            throw IllegalArgumentException("reg2 out of bounds")
-        if(fpReg1!=null && (fpReg1<0 || fpReg1>65536))
-            throw IllegalArgumentException("fpReg1 out of bounds")
-        if(fpReg2!=null && (fpReg2<0 || fpReg2>65536))
-            throw IllegalArgumentException("fpReg2 out of bounds")
-
-        if(value!=null && opcode !in OpcodesWithAddress) {
-            when (type) {
-                VmDataType.BYTE -> {
-                    if (value < -128 || value > 255)
-                        throw IllegalArgumentException("value out of range for byte: $value")
-                }
-                VmDataType.WORD -> {
-                    if (value < -32768 || value > 65535)
-                        throw IllegalArgumentException("value out of range for word: $value")
-                }
-                VmDataType.FLOAT, null -> {}
-            }
-        }
-    }
-}
-
-class VmCodeLabel(val name: List<String>): VmCodeLine()
-internal class VmCodeComment(val comment: String): VmCodeLine()
-
-class VmCodeChunk(initial: VmCodeLine? = null) {
-    val lines = mutableListOf<VmCodeLine>()
-
-    init {
-        if(initial!=null)
-            lines.add(initial)
-    }
-
-    operator fun plusAssign(line: VmCodeLine) {
-        lines.add(line)
-    }
-
-    operator fun plusAssign(chunk: VmCodeChunk) {
-        lines.addAll(chunk.lines)
-    }
-}
-
-internal class VmCodeInlineAsm(asm: String): VmCodeLine() {
-    val assembly: String = asm.trimIndent()
-}
-
-internal class VmCodeInlineBinary(val file: Path, val offset: UInt?, val length: UInt?): VmCodeLine()

codeGenVirtual/src/prog8/codegen/virtual/AssignmentGen.kt

@@ -1,247 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.ast.*
-import prog8.code.core.*
-import prog8.vm.Opcode
-import prog8.vm.VmDataType
-
-internal class AssignmentGen(private val codeGen: CodeGen, private val expressionEval: ExpressionGen) {
-
-    internal fun translate(assignment: PtAssignment): VmCodeChunk {
-        if(assignment.target.children.single() is PtMachineRegister)
-            throw AssemblyError("assigning to a register should be done by just evaluating the expression into resultregister")
-
-        return if (assignment.isInplaceAssign)
-            translateInplaceAssign(assignment)
-        else
-            translateRegularAssign(assignment)
-    }
-
-    private fun translateInplaceAssign(assignment: PtAssignment): VmCodeChunk {
-        val ident = assignment.target.identifier
-        val memory = assignment.target.memory
-        val array = assignment.target.array
-
-        return if(ident!=null) {
-            val address = codeGen.allocations.get(ident.targetName)
-            assignSelfInMemory(address, assignment.value, assignment)
-        } else if(memory != null) {
-            if(memory.address is PtNumber)
-                assignSelfInMemory((memory.address as PtNumber).number.toInt(), assignment.value, assignment)
-            else
-                fallbackAssign(assignment)
-        } else if(array!=null) {
-            // NOTE: naive fallback assignment here will sometimes generate code that loads the index value multiple times
-            // in a register. It's way too much work to optimize that here - instead, we trust that the generated IL assembly
-            // will be optimized later and have the double assignments removed.
-            fallbackAssign(assignment)
-        } else {
-            fallbackAssign(assignment)
-        }
-    }
-
-    private fun assignSelfInMemory(
-        address: Int,
-        value: PtExpression,
-        origAssign: PtAssignment
-    ): VmCodeChunk {
-        val vmDt = codeGen.vmType(value.type)
-        val code = VmCodeChunk()
-        when(value) {
-            is PtIdentifier -> return code // do nothing, x=x null assignment.
-            is PtMachineRegister -> return code // do nothing, reg=reg null assignment
-            is PtPrefix -> return inplacePrefix(value.operator, vmDt, address)
-            is PtBinaryExpression -> return inplaceBinexpr(value.operator, value.right, vmDt, value.type in SignedDatatypes, address, origAssign)
-            is PtMemoryByte -> {
-                return if (!codeGen.options.compTarget.machine.isIOAddress(address.toUInt()))
-                    code // do nothing, mem=mem null assignment.
-                else {
-                    // read and write a (i/o) memory location to itself.
-                    val tempReg = codeGen.vmRegisters.nextFree()
-                    code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1 = tempReg, value = address)
-                    code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = tempReg, value = address)
-                    code
-                }
-            }
-            else -> return fallbackAssign(origAssign)
-        }
-
-    }
-
-    private fun fallbackAssign(origAssign: PtAssignment): VmCodeChunk {
-        if (codeGen.options.slowCodegenWarnings)
-            codeGen.errors.warn("indirect code for in-place assignment", origAssign.position)
-        return translateRegularAssign(origAssign)
-    }
-
-    private fun inplaceBinexpr(
-        operator: String,
-        operand: PtExpression,
-        vmDt: VmDataType,
-        signed: Boolean,
-        address: Int,
-        origAssign: PtAssignment
-    ): VmCodeChunk {
-        when(operator) {
-            "+" -> return expressionEval.operatorPlusInplace(address, vmDt, operand)
-            "-" -> return expressionEval.operatorMinusInplace(address, vmDt, operand)
-            "*" -> return expressionEval.operatorMultiplyInplace(address, vmDt, operand)
-            "/" -> return expressionEval.operatorDivideInplace(address, vmDt, signed, operand)
-            "|" -> return expressionEval.operatorOrInplace(address, vmDt, operand)
-            "&" -> return expressionEval.operatorAndInplace(address, vmDt, operand)
-            "^" -> return expressionEval.operatorXorInplace(address, vmDt, operand)
-            "<<" -> return expressionEval.operatorShiftLeftInplace(address, vmDt, operand)
-            ">>" -> return expressionEval.operatorShiftRightInplace(address, vmDt, signed, operand)
-            else -> {}
-        }
-        return fallbackAssign(origAssign)
-    }
-
-    private fun inplacePrefix(operator: String, vmDt: VmDataType, address: Int): VmCodeChunk {
-        val code= VmCodeChunk()
-        when(operator) {
-            "+" -> { }
-            "-" -> {
-                code += VmCodeInstruction(Opcode.NEGM, vmDt, value = address)
-            }
-            "~" -> {
-                val regMask = codeGen.vmRegisters.nextFree()
-                val mask = if(vmDt==VmDataType.BYTE) 0x00ff else 0xffff
-                code += VmCodeInstruction(Opcode.LOAD, vmDt, reg1=regMask, value = mask)
-                code += VmCodeInstruction(Opcode.XORM, vmDt, reg1=regMask, value = address)
-            }
-            else -> throw AssemblyError("weird prefix operator")
-        }
-        return code
-    }
-
-    private fun translateRegularAssign(assignment: PtAssignment): VmCodeChunk {
-        // note: assigning array and string values is done via an explicit memcopy/stringcopy function call.
-        val ident = assignment.target.identifier
-        val memory = assignment.target.memory
-        val array = assignment.target.array
-        val vmDt = codeGen.vmType(assignment.value.type)
-
-        val code = VmCodeChunk()
-        var resultRegister = -1
-        var resultFpRegister = -1
-        val zero = codeGen.isZero(assignment.value)
-        if(!zero) {
-            // calculate the assignment value
-            if (vmDt == VmDataType.FLOAT) {
-                resultFpRegister = codeGen.vmRegisters.nextFreeFloat()
-                code += expressionEval.translateExpression(assignment.value, -1, resultFpRegister)
-            } else {
-                resultRegister = if (assignment.value is PtMachineRegister) {
-                    (assignment.value as PtMachineRegister).register
-                } else {
-                    val reg = codeGen.vmRegisters.nextFree()
-                    code += expressionEval.translateExpression(assignment.value, reg, -1)
-                    reg
-                }
-            }
-        }
-        if(ident!=null) {
-            val address = codeGen.allocations.get(ident.targetName)
-            code += if(zero) {
-                VmCodeInstruction(Opcode.STOREZM, vmDt, value = address)
-            } else {
-                if (vmDt == VmDataType.FLOAT)
-                    VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value = address)
-                else
-                    VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value = address)
-            }
-        }
-        else if(array!=null) {
-            val variable = array.variable.targetName
-            var variableAddr = codeGen.allocations.get(variable)
-            val itemsize = codeGen.program.memsizer.memorySize(array.type)
-
-            if(array.variable.type==DataType.UWORD) {
-                // indexing a pointer var instead of a real array or string
-                if(itemsize!=1)
-                    throw AssemblyError("non-array var indexing requires bytes dt")
-                if(array.index.type!=DataType.UBYTE)
-                    throw AssemblyError("non-array var indexing requires bytes index")
-                val idxReg = codeGen.vmRegisters.nextFree()
-                code += expressionEval.translateExpression(array.index, idxReg, -1)
-                if(zero) {
-                    // there's no STOREZIX instruction
-                    resultRegister = codeGen.vmRegisters.nextFree()
-                    code += VmCodeInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, value=0)
-                }
-                code += VmCodeInstruction(Opcode.STOREIX, vmDt, reg1=resultRegister, reg2=idxReg, value = variableAddr)
-                return code
-            }
-
-            val fixedIndex = constIntValue(array.index)
-            if(zero) {
-                if(fixedIndex!=null) {
-                    variableAddr += fixedIndex*itemsize
-                    code += VmCodeInstruction(Opcode.STOREZM, vmDt, value=variableAddr)
-                } else {
-                    val indexReg = codeGen.vmRegisters.nextFree()
-                    code += loadIndexReg(array, itemsize, indexReg)
-                    code += VmCodeInstruction(Opcode.STOREZX, vmDt, reg1=indexReg, value=variableAddr)
-                }
-            } else {
-                if(vmDt== VmDataType.FLOAT) {
-                    if(fixedIndex!=null) {
-                        variableAddr += fixedIndex*itemsize
-                        code += VmCodeInstruction(Opcode.STOREM, vmDt, fpReg1 = resultFpRegister, value=variableAddr)
-                    } else {
-                        val indexReg = codeGen.vmRegisters.nextFree()
-                        code += loadIndexReg(array, itemsize, indexReg)
-                        code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
-                    }
-                } else {
-                    if(fixedIndex!=null) {
-                        variableAddr += fixedIndex*itemsize
-                        code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = resultRegister, value=variableAddr)
-                    } else {
-                        val indexReg = codeGen.vmRegisters.nextFree()
-                        code += loadIndexReg(array, itemsize, indexReg)
-                        code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1 = resultRegister, reg2=indexReg, value=variableAddr)
-                    }
-                }
-            }
-        }
-        else if(memory!=null) {
-            require(vmDt== VmDataType.BYTE)
-            if(zero) {
-                if(memory.address is PtNumber) {
-                    code += VmCodeInstruction(Opcode.STOREZM, vmDt, value=(memory.address as PtNumber).number.toInt())
-                } else {
-                    val addressReg = codeGen.vmRegisters.nextFree()
-                    code += expressionEval.translateExpression(memory.address, addressReg, -1)
-                    code += VmCodeInstruction(Opcode.STOREZI, vmDt, reg1=addressReg)
-                }
-            } else {
-                if(memory.address is PtNumber) {
-                    code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1=resultRegister, value=(memory.address as PtNumber).number.toInt())
-                } else {
-                    val addressReg = codeGen.vmRegisters.nextFree()
-                    code += expressionEval.translateExpression(memory.address, addressReg, -1)
-                    code += VmCodeInstruction(Opcode.STOREI, vmDt, reg1=resultRegister, reg2=addressReg)
-                }
-            }
-        }
-        else
-            throw AssemblyError("weird assigntarget")
-        return code
-    }
-
-    private fun loadIndexReg(array: PtArrayIndexer, itemsize: Int, indexReg: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(itemsize==1) {
-            code += expressionEval.translateExpression(array.index, indexReg, -1)
-        }
-        else {
-            val mult = PtBinaryExpression("*", DataType.UBYTE, array.position)
-            mult.children += array.index
-            mult.children += PtNumber(DataType.UBYTE, itemsize.toDouble(), array.position)
-            code += expressionEval.translateExpression(mult, indexReg, -1)
-        }
-        return code
-    }
-}

codeGenVirtual/src/prog8/codegen/virtual/BuiltinFuncGen.kt

@@ -1,376 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.StStaticVariable
-import prog8.code.ast.*
-import prog8.code.core.AssemblyError
-import prog8.code.core.DataType
-import prog8.vm.Opcode
-import prog8.vm.Syscall
-import prog8.vm.VmDataType
-
-internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen: ExpressionGen) {
-
-    fun translate(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        return when(call.name) {
-            "any" -> funcAny(call, resultRegister)
-            "all" -> funcAll(call, resultRegister)
-            "abs" -> funcAbs(call, resultRegister)
-            "cmp" -> funcCmp(call)
-            "sgn" -> funcSgn(call, resultRegister)
-            "sqrt16" -> funcSqrt16(call, resultRegister)
-            "pop" -> funcPop(call)
-            "popw" -> funcPopw(call)
-            "push" -> funcPush(call)
-            "pushw" -> funcPushw(call)
-            "rsave",
-            "rsavex",
-            "rrestore",
-            "rrestorex" -> VmCodeChunk() // vm doesn't have registers to save/restore
-            "rnd" -> funcRnd(resultRegister)
-            "rndw" -> funcRndw(resultRegister)
-            "callfar" -> throw AssemblyError("callfar() is for cx16 target only")
-            "callrom" -> throw AssemblyError("callrom() is for cx16 target only")
-            "msb" -> funcMsb(call, resultRegister)
-            "lsb" -> funcLsb(call, resultRegister)
-            "memory" -> funcMemory(call, resultRegister)
-            "peek" -> funcPeek(call, resultRegister)
-            "peekw" -> funcPeekW(call, resultRegister)
-            "poke" -> funcPoke(call)
-            "pokew" -> funcPokeW(call)
-            "pokemon" -> VmCodeChunk()
-            "mkword" -> funcMkword(call, resultRegister)
-            "sort" -> funcSort(call)
-            "reverse" -> funcReverse(call)
-            "rol" -> funcRolRor(Opcode.ROXL, call, resultRegister)
-            "ror" -> funcRolRor(Opcode.ROXR, call, resultRegister)
-            "rol2" -> funcRolRor(Opcode.ROL, call, resultRegister)
-            "ror2" -> funcRolRor(Opcode.ROR, call, resultRegister)
-            else -> throw AssemblyError("missing builtinfunc for ${call.name}")
-        }
-    }
-
-    private fun funcCmp(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        val leftRegister = codeGen.vmRegisters.nextFree()
-        val rightRegister = codeGen.vmRegisters.nextFree()
-        code += exprGen.translateExpression(call.args[0], leftRegister, -1)
-        code += exprGen.translateExpression(call.args[1], rightRegister, -1)
-        code += VmCodeInstruction(Opcode.CMP, codeGen.vmType(call.args[0].type), reg1=leftRegister, reg2=rightRegister)
-        return code
-    }
-
-    private fun funcAny(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val arrayName = call.args[0] as PtIdentifier
-        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
-        val code = VmCodeChunk()
-        val syscall =
-            when (array.dt) {
-                DataType.ARRAY_UB,
-                DataType.ARRAY_B -> Syscall.ANY_BYTE
-                DataType.ARRAY_UW,
-                DataType.ARRAY_W -> Syscall.ANY_WORD
-                DataType.ARRAY_F -> Syscall.ANY_FLOAT
-                else -> throw IllegalArgumentException("weird type")
-            }
-        code += exprGen.translateExpression(call.args[0], 0, -1)
-        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1 = 1, value = array.length)
-        code += VmCodeInstruction(Opcode.SYSCALL, value = syscall.ordinal)
-        if (resultRegister != 0)
-            code += VmCodeInstruction(Opcode.LOADR, VmDataType.BYTE, reg1 = resultRegister, reg2 = 0)
-        return code
-    }
-
-    private fun funcAll(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val arrayName = call.args[0] as PtIdentifier
-        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
-        val syscall =
-            when(array.dt) {
-                DataType.ARRAY_UB,
-                DataType.ARRAY_B -> Syscall.ALL_BYTE
-                DataType.ARRAY_UW,
-                DataType.ARRAY_W -> Syscall.ALL_WORD
-                DataType.ARRAY_F -> Syscall.ALL_FLOAT
-                else -> throw IllegalArgumentException("weird type")
-            }
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args[0], 0, -1)
-        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=1, value=array.length)
-        code += VmCodeInstruction(Opcode.SYSCALL, value=syscall.ordinal)
-        if(resultRegister!=0)
-            code += VmCodeInstruction(Opcode.LOADR, VmDataType.BYTE, reg1=resultRegister, reg2=0)
-        return code
-    }
-
-    private fun funcAbs(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        val sourceDt = call.args.single().type
-        if(sourceDt!=DataType.UWORD) {
-            code += exprGen.translateExpression(call.args[0], resultRegister, -1)
-            when (sourceDt) {
-                DataType.UBYTE -> {
-                    code += VmCodeInstruction(Opcode.EXT, VmDataType.BYTE, reg1=resultRegister)
-                }
-                DataType.BYTE -> {
-                    val notNegativeLabel = codeGen.createLabelName()
-                    val compareReg = codeGen.vmRegisters.nextFree()
-                    code += VmCodeInstruction(Opcode.LOADR, VmDataType.BYTE, reg1=compareReg, reg2=resultRegister)
-                    code += VmCodeInstruction(Opcode.AND, VmDataType.BYTE, reg1=compareReg, value=0x80)
-                    code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=compareReg, labelSymbol = notNegativeLabel)
-                    code += VmCodeInstruction(Opcode.NEG, VmDataType.BYTE, reg1=resultRegister)
-                    code += VmCodeInstruction(Opcode.EXT, VmDataType.BYTE, reg1=resultRegister)
-                    code += VmCodeLabel(notNegativeLabel)
-                }
-                DataType.WORD -> {
-                    val notNegativeLabel = codeGen.createLabelName()
-                    val compareReg = codeGen.vmRegisters.nextFree()
-                    code += VmCodeInstruction(Opcode.LOADR, VmDataType.WORD, reg1=compareReg, reg2=resultRegister)
-                    code += VmCodeInstruction(Opcode.AND, VmDataType.WORD, reg1=compareReg, value=0x8000)
-                    code += VmCodeInstruction(Opcode.BZ, VmDataType.WORD, reg1=compareReg, labelSymbol = notNegativeLabel)
-                    code += VmCodeInstruction(Opcode.NEG, VmDataType.WORD, reg1=resultRegister)
-                    code += VmCodeLabel(notNegativeLabel)
-                }
-                else -> throw AssemblyError("weird type")
-            }
-        }
-        return code
-    }
-
-    private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += exprGen.translateExpression(call.args.single(), reg, -1)
-        code += VmCodeInstruction(Opcode.SGN, codeGen.vmType(call.type), reg1=resultRegister, reg2=reg)
-        return code
-    }
-
-    private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += exprGen.translateExpression(call.args.single(), reg, -1)
-        code += VmCodeInstruction(Opcode.SQRT, VmDataType.WORD, reg1=resultRegister, reg2=reg)
-        return code
-    }
-
-    private fun funcPop(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=reg)
-        code += assignRegisterTo(call.args.single(), reg)
-        return code
-    }
-
-    private fun funcPopw(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += VmCodeInstruction(Opcode.POP, VmDataType.WORD, reg1=reg)
-        code += assignRegisterTo(call.args.single(), reg)
-        return code
-    }
-
-    private fun funcPush(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += exprGen.translateExpression(call.args.single(), reg, -1)
-        code += VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=reg)
-        return code
-    }
-
-    private fun funcPushw(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        val reg = codeGen.vmRegisters.nextFree()
-        code += exprGen.translateExpression(call.args.single(), reg, -1)
-        code += VmCodeInstruction(Opcode.PUSH, VmDataType.WORD, reg1=reg)
-        return code
-    }
-
-    private fun funcReverse(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val arrayName = call.args[0] as PtIdentifier
-        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
-        val sortSyscall =
-            when(array.dt) {
-                DataType.ARRAY_UB, DataType.ARRAY_B, DataType.STR -> Syscall.REVERSE_BYTES
-                DataType.ARRAY_UW, DataType.ARRAY_W -> Syscall.REVERSE_WORDS
-                DataType.ARRAY_F -> Syscall.REVERSE_FLOATS
-                else -> throw IllegalArgumentException("weird type to reverse")
-            }
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args[0], 0, -1)
-        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=1, value=array.length)
-        code += VmCodeInstruction(Opcode.SYSCALL, value=sortSyscall.ordinal)
-        return code
-    }
-
-    private fun funcSort(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val arrayName = call.args[0] as PtIdentifier
-        val array = codeGen.symbolTable.flat.getValue(arrayName.targetName) as StStaticVariable
-        val sortSyscall =
-            when(array.dt) {
-                DataType.ARRAY_UB -> Syscall.SORT_UBYTE
-                DataType.ARRAY_B -> Syscall.SORT_BYTE
-                DataType.ARRAY_UW -> Syscall.SORT_UWORD
-                DataType.ARRAY_W -> Syscall.SORT_WORD
-                DataType.STR -> Syscall.SORT_UBYTE
-                DataType.ARRAY_F -> throw IllegalArgumentException("sorting a floating point array is not supported")
-                else -> throw IllegalArgumentException("weird type to sort")
-            }
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args[0], 0, -1)
-        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=1, value=array.length)
-        code += VmCodeInstruction(Opcode.SYSCALL, value=sortSyscall.ordinal)
-        return code
-    }
-
-    private fun funcMkword(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val msbReg = codeGen.vmRegisters.nextFree()
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args[0], msbReg, -1)
-        code += exprGen.translateExpression(call.args[1], resultRegister, -1)
-        code += VmCodeInstruction(Opcode.CONCAT, VmDataType.BYTE, reg1=resultRegister, reg2=msbReg)
-        return code
-    }
-
-    private fun funcPokeW(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isZero(call.args[1])) {
-            if (call.args[0] is PtNumber) {
-                val address = (call.args[0] as PtNumber).number.toInt()
-                code += VmCodeInstruction(Opcode.STOREZM, VmDataType.WORD, value = address)
-            } else {
-                val addressReg = codeGen.vmRegisters.nextFree()
-                code += exprGen.translateExpression(call.args[0], addressReg, -1)
-                code += VmCodeInstruction(Opcode.STOREZI, VmDataType.WORD, reg2 = addressReg)
-            }
-        } else {
-            val valueReg = codeGen.vmRegisters.nextFree()
-            if (call.args[0] is PtNumber) {
-                val address = (call.args[0] as PtNumber).number.toInt()
-                code += exprGen.translateExpression(call.args[1], valueReg, -1)
-                code += VmCodeInstruction(Opcode.STOREM, VmDataType.WORD, reg1 = valueReg, value = address)
-            } else {
-                val addressReg = codeGen.vmRegisters.nextFree()
-                code += exprGen.translateExpression(call.args[0], addressReg, -1)
-                code += exprGen.translateExpression(call.args[1], valueReg, -1)
-                code += VmCodeInstruction(Opcode.STOREI, VmDataType.WORD, reg1 = valueReg, reg2 = addressReg)
-            }
-        }
-        return code
-    }
-
-    private fun funcPoke(call: PtBuiltinFunctionCall): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isZero(call.args[1])) {
-            if (call.args[0] is PtNumber) {
-                val address = (call.args[0] as PtNumber).number.toInt()
-                code += VmCodeInstruction(Opcode.STOREZM, VmDataType.BYTE, value = address)
-            } else {
-                val addressReg = codeGen.vmRegisters.nextFree()
-                code += exprGen.translateExpression(call.args[0], addressReg, -1)
-                code += VmCodeInstruction(Opcode.STOREZI, VmDataType.BYTE, reg2 = addressReg)
-            }
-        } else {
-            val valueReg = codeGen.vmRegisters.nextFree()
-            if (call.args[0] is PtNumber) {
-                val address = (call.args[0] as PtNumber).number.toInt()
-                code += exprGen.translateExpression(call.args[1], valueReg, -1)
-                code += VmCodeInstruction(Opcode.STOREM, VmDataType.BYTE, reg1 = valueReg, value = address)
-            } else {
-                val addressReg = codeGen.vmRegisters.nextFree()
-                code += exprGen.translateExpression(call.args[0], addressReg, -1)
-                code += exprGen.translateExpression(call.args[1], valueReg, -1)
-                code += VmCodeInstruction(Opcode.STOREI, VmDataType.BYTE, reg1 = valueReg, reg2 = addressReg)
-            }
-        }
-        return code
-    }
-
-    private fun funcPeekW(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(call.args[0] is PtNumber) {
-            val address = (call.args[0] as PtNumber).number.toInt()
-            code += VmCodeInstruction(Opcode.LOADM, VmDataType.WORD, reg1 = resultRegister, value = address)
-        } else {
-            val addressReg = codeGen.vmRegisters.nextFree()
-            code += exprGen.translateExpression(call.args.single(), addressReg, -1)
-            code += VmCodeInstruction(Opcode.LOADI, VmDataType.WORD, reg1 = resultRegister, reg2 = addressReg)
-        }
-        return code
-    }
-
-    private fun funcPeek(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(call.args[0] is PtNumber) {
-            val address = (call.args[0] as PtNumber).number.toInt()
-            code += VmCodeInstruction(Opcode.LOADM, VmDataType.BYTE, reg1 = resultRegister, value = address)
-        } else {
-            val addressReg = codeGen.vmRegisters.nextFree()
-            code += exprGen.translateExpression(call.args.single(), addressReg, -1)
-            code += VmCodeInstruction(Opcode.LOADI, VmDataType.BYTE, reg1 = resultRegister, reg2 = addressReg)
-        }
-        return code
-    }
-
-    private fun funcRnd(resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += VmCodeInstruction(Opcode.RND, VmDataType.BYTE, reg1=resultRegister)
-        return code
-    }
-
-    private fun funcRndw(resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += VmCodeInstruction(Opcode.RND, VmDataType.WORD, reg1=resultRegister)
-        return code
-    }
-
-    private fun funcMemory(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val name = (call.args[0] as PtString).value
-        val size = (call.args[1] as PtNumber).number.toUInt()
-        val align = (call.args[2] as PtNumber).number.toUInt()
-        val existing = codeGen.allocations.getMemorySlab(name)
-        val address = if(existing==null)
-            codeGen.allocations.allocateMemorySlab(name, size, align)
-        else if(existing.second!=size || existing.third!=align) {
-            codeGen.errors.err("memory slab '$name' already exists with a different size or alignment", call.position)
-            return VmCodeChunk()
-        }
-        else
-            existing.first
-        val code = VmCodeChunk()
-        code += VmCodeInstruction(Opcode.LOAD, VmDataType.WORD, reg1=resultRegister, value=address.toInt())
-        return code
-    }
-
-    private fun funcLsb(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args.single(), resultRegister, -1)
-        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
-        return code
-    }
-
-    private fun funcMsb(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args.single(), resultRegister, -1)
-        code += VmCodeInstruction(Opcode.MSIG, VmDataType.BYTE, reg1 = resultRegister, reg2=resultRegister)
-        // note: if a word result is needed, the upper byte is cleared by the typecast that follows. No need to do it here.
-        return code
-    }
-
-    private fun funcRolRor(opcode: Opcode, call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
-        val vmDt = codeGen.vmType(call.args[0].type)
-        val code = VmCodeChunk()
-        code += exprGen.translateExpression(call.args[0], resultRegister, -1)
-        code += VmCodeInstruction(opcode, vmDt, reg1=resultRegister)
-        code += assignRegisterTo(call.args[0], resultRegister)
-        return code
-    }
-
-    private fun assignRegisterTo(target: PtExpression, register: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        val assignment = PtAssignment(target.position)
-        val assignTarget = PtAssignTarget(target.position)
-        assignTarget.children.add(target)
-        assignment.children.add(assignTarget)
-        assignment.children.add(PtMachineRegister(register, target.type, target.position))
-        code += codeGen.translateNode(assignment)
-        return code
-    }
-}

codeGenVirtual/src/prog8/codegen/virtual/CodeGen.kt

@@ -1,814 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.StStaticVariable
-import prog8.code.SymbolTable
-import prog8.code.ast.*
-import prog8.code.core.*
-import prog8.vm.Opcode
-import prog8.vm.VmDataType
-import kotlin.math.pow
-
-
-internal class VmRegisterPool {
-    private var firstFree: Int=3        // integer registers 0,1,2 are reserved
-    private var firstFreeFloat: Int=0
-
-    fun peekNext() = firstFree
-    fun peekNextFloat() = firstFreeFloat
-
-    fun nextFree(): Int {
-        val result = firstFree
-        firstFree++
-        if(firstFree>65535)
-            throw AssemblyError("out of virtual registers (int)")
-        return result
-    }
-
-    fun nextFreeFloat(): Int {
-        val result = firstFreeFloat
-        firstFreeFloat++
-        if(firstFreeFloat>65535)
-            throw AssemblyError("out of virtual registers (fp)")
-        return result
-    }
-}
-
-
-class CodeGen(internal val program: PtProgram,
-              internal val symbolTable: SymbolTable,
-              internal val options: CompilationOptions,
-              internal val errors: IErrorReporter
-): IAssemblyGenerator {
-
-    internal val allocations = VariableAllocator(symbolTable, program)
-    private val expressionEval = ExpressionGen(this)
-    private val builtinFuncGen = BuiltinFuncGen(this, expressionEval)
-    private val assignmentGen = AssignmentGen(this, expressionEval)
-    internal val vmRegisters = VmRegisterPool()
-
-    override fun compileToAssembly(): IAssemblyProgram? {
-        val vmprog = AssemblyProgram(program.name, allocations)
-
-        if(!options.dontReinitGlobals) {
-            // collect global variables initializers
-            program.allBlocks().forEach {
-                val code = VmCodeChunk()
-                it.children.filterIsInstance<PtAssignment>().forEach { assign -> code += assignmentGen.translate(assign) }
-                vmprog.addGlobalInits(code)
-            }
-        }
-
-        if(options.symbolDefs.isNotEmpty())
-            throw AssemblyError("virtual target doesn't support symbols defined on the commandline")
-        if(options.evalStackBaseAddress!=null)
-            throw AssemblyError("virtual target doesn't use eval-stack")
-
-        for (block in program.allBlocks()) {
-            vmprog.addBlock(translate(block))
-        }
-
-        if(options.optimize) {
-            val optimizer = VmPeepholeOptimizer(vmprog)
-            optimizer.optimize()
-        }
-
-        println("Vm codegen: virtual registers=${vmRegisters.peekNext()} memory usage=${allocations.freeMem}")
-
-        return vmprog
-    }
-
-
-    internal fun translateNode(node: PtNode): VmCodeChunk {
-        val code = when(node) {
-            is PtBlock -> translate(node)
-            is PtSub -> translate(node)
-            is PtAsmSub -> translate(node)
-            is PtScopeVarsDecls -> VmCodeChunk() // vars should be looked up via symbol table
-            is PtVariable -> VmCodeChunk() // var should be looked up via symbol table
-            is PtMemMapped -> VmCodeChunk() // memmapped var should be looked up via symbol table
-            is PtConstant -> VmCodeChunk() // constants have all been folded into the code
-            is PtAssignment -> assignmentGen.translate(node)
-            is PtNodeGroup -> translateGroup(node.children)
-            is PtBuiltinFunctionCall -> translateBuiltinFunc(node, 0)
-            is PtFunctionCall -> expressionEval.translate(node, 0, 0)
-            is PtNop -> VmCodeChunk()
-            is PtReturn -> translate(node)
-            is PtJump -> translate(node)
-            is PtWhen -> translate(node)
-            is PtForLoop -> translate(node)
-            is PtIfElse -> translate(node)
-            is PtPostIncrDecr -> translate(node)
-            is PtRepeatLoop -> translate(node)
-            is PtLabel -> VmCodeChunk(VmCodeLabel(node.scopedName))
-            is PtBreakpoint -> VmCodeChunk(VmCodeInstruction(Opcode.BREAKPOINT))
-            is PtConditionalBranch -> translate(node)
-            is PtInlineAssembly -> VmCodeChunk(VmCodeInlineAsm(node.assembly))
-            is PtIncludeBinary -> VmCodeChunk(VmCodeInlineBinary(node.file, node.offset, node.length))
-            is PtAddressOf,
-            is PtContainmentCheck,
-            is PtMemoryByte,
-            is PtProgram,
-            is PtArrayIndexer,
-            is PtBinaryExpression,
-            is PtIdentifier,
-            is PtWhenChoice,
-            is PtPrefix,
-            is PtRange,
-            is PtAssignTarget,
-            is PtTypeCast,
-            is PtSubroutineParameter,
-            is PtNumber,
-            is PtArray,
-            is PtString -> throw AssemblyError("should not occur as separate statement node ${node.position}")
-            else -> TODO("missing codegen for $node")
-        }
-        if(code.lines.isNotEmpty() && node.position.line!=0)
-            code.lines.add(0, VmCodeComment(node.position.toString()))
-        return code
-    }
-
-    private fun translate(branch: PtConditionalBranch): VmCodeChunk {
-        val code = VmCodeChunk()
-        val elseLabel = createLabelName()
-        // note that the branch opcode used is the opposite as the branch condition, because the generated code jumps to the 'else' part
-        code += when(branch.condition) {
-            BranchCondition.CS -> VmCodeInstruction(Opcode.BSTCC, labelSymbol = elseLabel)
-            BranchCondition.CC -> VmCodeInstruction(Opcode.BSTCS, labelSymbol = elseLabel)
-            BranchCondition.EQ, BranchCondition.Z -> VmCodeInstruction(Opcode.BSTNE, labelSymbol = elseLabel)
-            BranchCondition.NE, BranchCondition.NZ -> VmCodeInstruction(Opcode.BSTEQ, labelSymbol = elseLabel)
-            BranchCondition.MI, BranchCondition.NEG -> VmCodeInstruction(Opcode.BSTPOS, labelSymbol = elseLabel)
-            BranchCondition.PL, BranchCondition.POS -> VmCodeInstruction(Opcode.BSTNEG, labelSymbol = elseLabel)
-            BranchCondition.VC,
-            BranchCondition.VS -> throw AssemblyError("conditional branch ${branch.condition} not supported in vm target due to lack of cpu V flag ${branch.position}")
-        }
-        code += translateNode(branch.trueScope)
-        if(branch.falseScope.children.isNotEmpty()) {
-            val endLabel = createLabelName()
-            code += VmCodeInstruction(Opcode.JUMP, labelSymbol = endLabel)
-            code += VmCodeLabel(elseLabel)
-            code += translateNode(branch.falseScope)
-            code += VmCodeLabel(endLabel)
-        } else {
-            code += VmCodeLabel(elseLabel)
-        }
-        return code
-    }
-
-    private fun translate(whenStmt: PtWhen): VmCodeChunk {
-        if(whenStmt.choices.children.isEmpty())
-            return VmCodeChunk()
-        val code = VmCodeChunk()
-        val valueReg = vmRegisters.nextFree()
-        val choiceReg = vmRegisters.nextFree()
-        val valueDt = vmType(whenStmt.value.type)
-        code += expressionEval.translateExpression(whenStmt.value, valueReg, -1)
-        val choices = whenStmt.choices.children.map {it as PtWhenChoice }
-        val endLabel = createLabelName()
-        for (choice in choices) {
-            if(choice.isElse) {
-                code += translateNode(choice.statements)
-            } else {
-                val skipLabel = createLabelName()
-                val values = choice.values.children.map {it as PtNumber}
-                if(values.size==1) {
-                    code += VmCodeInstruction(Opcode.LOAD, valueDt, reg1=choiceReg, value=values[0].number.toInt())
-                    code += VmCodeInstruction(Opcode.BNE, valueDt, reg1=valueReg, reg2=choiceReg, labelSymbol = skipLabel)
-                    code += translateNode(choice.statements)
-                    if(choice.statements.children.last() !is PtReturn)
-                        code += VmCodeInstruction(Opcode.JUMP, labelSymbol = endLabel)
-                } else {
-                    val matchLabel = createLabelName()
-                    for (value in values) {
-                        code += VmCodeInstruction(Opcode.LOAD, valueDt, reg1=choiceReg, value=value.number.toInt())
-                        code += VmCodeInstruction(Opcode.BEQ, valueDt, reg1=valueReg, reg2=choiceReg, labelSymbol = matchLabel)
-                    }
-                    code += VmCodeInstruction(Opcode.JUMP, labelSymbol = skipLabel)
-                    code += VmCodeLabel(matchLabel)
-                    code += translateNode(choice.statements)
-                    if(choice.statements.children.last() !is PtReturn)
-                        code += VmCodeInstruction(Opcode.JUMP, labelSymbol = endLabel)
-                }
-                code += VmCodeLabel(skipLabel)
-            }
-        }
-        code += VmCodeLabel(endLabel)
-        return code
-    }
-
-    private fun translate(forLoop: PtForLoop): VmCodeChunk {
-        val loopvar = symbolTable.lookup(forLoop.variable.targetName) as StStaticVariable
-        val iterable = forLoop.iterable
-        val code = VmCodeChunk()
-        when(iterable) {
-            is PtRange -> {
-                if(iterable.from is PtNumber && iterable.to is PtNumber)
-                    code += translateForInConstantRange(forLoop, loopvar)
-                else
-                    code += translateForInNonConstantRange(forLoop, loopvar)
-            }
-            is PtIdentifier -> {
-                val arrayAddress = allocations.get(iterable.targetName)
-                val iterableVar = symbolTable.lookup(iterable.targetName) as StStaticVariable
-                val loopvarAddress = allocations.get(loopvar.scopedName)
-                val indexReg = vmRegisters.nextFree()
-                val tmpReg = vmRegisters.nextFree()
-                val loopLabel = createLabelName()
-                val endLabel = createLabelName()
-                if(iterableVar.dt==DataType.STR) {
-                    // iterate over a zero-terminated string
-                    code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=indexReg, value=0)
-                    code += VmCodeLabel(loopLabel)
-                    code += VmCodeInstruction(Opcode.LOADX, VmDataType.BYTE, reg1=tmpReg, reg2=indexReg, value = arrayAddress)
-                    code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=tmpReg, labelSymbol = endLabel)
-                    code += VmCodeInstruction(Opcode.STOREM, VmDataType.BYTE, reg1=tmpReg, value = loopvarAddress)
-                    code += translateNode(forLoop.statements)
-                    code += VmCodeInstruction(Opcode.INC, VmDataType.BYTE, reg1=indexReg)
-                    code += VmCodeInstruction(Opcode.JUMP, labelSymbol = loopLabel)
-                    code += VmCodeLabel(endLabel)
-                } else {
-                    // iterate over array
-                    val elementDt = ArrayToElementTypes.getValue(iterable.type)
-                    val elementSize = program.memsizer.memorySize(elementDt)
-                    val lengthBytes = iterableVar.length!! * elementSize
-                    if(lengthBytes<256) {
-                        val lengthReg = vmRegisters.nextFree()
-                        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=indexReg, value=0)
-                        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=lengthReg, value=lengthBytes)
-                        code += VmCodeLabel(loopLabel)
-                        code += VmCodeInstruction(Opcode.LOADX, vmType(elementDt), reg1=tmpReg, reg2=indexReg, value=arrayAddress)
-                        code += VmCodeInstruction(Opcode.STOREM, vmType(elementDt), reg1=tmpReg, value = loopvarAddress)
-                        code += translateNode(forLoop.statements)
-                        code += addConstReg(VmDataType.BYTE, indexReg, elementSize)
-                        code += VmCodeInstruction(Opcode.BNE, VmDataType.BYTE, reg1=indexReg, reg2=lengthReg, labelSymbol = loopLabel)
-                    } else if(lengthBytes==256) {
-                        code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=indexReg, value=0)
-                        code += VmCodeLabel(loopLabel)
-                        code += VmCodeInstruction(Opcode.LOADX, vmType(elementDt), reg1=tmpReg, reg2=indexReg, value=arrayAddress)
-                        code += VmCodeInstruction(Opcode.STOREM, vmType(elementDt), reg1=tmpReg, value = loopvarAddress)
-                        code += translateNode(forLoop.statements)
-                        code += addConstReg(VmDataType.BYTE, indexReg, elementSize)
-                        code += VmCodeInstruction(Opcode.BNZ, VmDataType.BYTE, reg1=indexReg, labelSymbol = loopLabel)
-                    } else {
-                        throw AssemblyError("iterator length should never exceed 256")
-                    }
-                }
-            }
-            else -> throw AssemblyError("weird for iterable")
-        }
-        return code
-    }
-
-    private fun translateForInNonConstantRange(forLoop: PtForLoop, loopvar: StStaticVariable): VmCodeChunk {
-        val iterable = forLoop.iterable as PtRange
-        val step = iterable.step.number.toInt()
-        if (step==0)
-            throw AssemblyError("step 0")
-        val indexReg = vmRegisters.nextFree()
-        val endvalueReg = vmRegisters.nextFree()
-        val loopvarAddress = allocations.get(loopvar.scopedName)
-        val loopvarDt = vmType(loopvar.dt)
-        val loopLabel = createLabelName()
-        val code = VmCodeChunk()
-
-        code += expressionEval.translateExpression(iterable.to, endvalueReg, -1)
-        code += expressionEval.translateExpression(iterable.from, indexReg, -1)
-        code += VmCodeInstruction(Opcode.STOREM, loopvarDt, reg1=indexReg, value=loopvarAddress)
-        code += VmCodeLabel(loopLabel)
-        code += translateNode(forLoop.statements)
-        code += addConstMem(loopvarDt, loopvarAddress.toUInt(), step)
-        code += VmCodeInstruction(Opcode.LOADM, loopvarDt, reg1 = indexReg, value = loopvarAddress)
-        val branchOpcode = if(loopvar.dt in SignedDatatypes) Opcode.BLES else Opcode.BLE
-        code += VmCodeInstruction(branchOpcode, loopvarDt, reg1=indexReg, reg2=endvalueReg, labelSymbol=loopLabel)
-        return code
-    }
-
-    private fun translateForInConstantRange(forLoop: PtForLoop, loopvar: StStaticVariable): VmCodeChunk {
-        val loopLabel = createLabelName()
-        val loopvarAddress = allocations.get(loopvar.scopedName)
-        val indexReg = vmRegisters.nextFree()
-        val loopvarDt = vmType(loopvar.dt)
-        val iterable = forLoop.iterable as PtRange
-        val step = iterable.step.number.toInt()
-        val rangeStart = (iterable.from as PtNumber).number.toInt()
-        val rangeEndUntyped = (iterable.to as PtNumber).number.toInt() + step
-        if(step==0)
-            throw AssemblyError("step 0")
-        if(step>0 && rangeEndUntyped<rangeStart || step<0 && rangeEndUntyped>rangeStart)
-            throw AssemblyError("empty range")
-        val rangeEndWrapped = if(loopvarDt==VmDataType.BYTE) rangeEndUntyped and 255 else rangeEndUntyped and 65535
-        val code = VmCodeChunk()
-        val endvalueReg: Int
-        if(rangeEndWrapped!=0) {
-            endvalueReg = vmRegisters.nextFree()
-            code += VmCodeInstruction(Opcode.LOAD, loopvarDt, reg1 = endvalueReg, value = rangeEndWrapped)
-        } else {
-            endvalueReg = -1 // not used
-        }
-        code += VmCodeInstruction(Opcode.LOAD, loopvarDt, reg1=indexReg, value=rangeStart)
-        code += VmCodeInstruction(Opcode.STOREM, loopvarDt, reg1=indexReg, value=loopvarAddress)
-        code += VmCodeLabel(loopLabel)
-        code += translateNode(forLoop.statements)
-        code += addConstMem(loopvarDt, loopvarAddress.toUInt(), step)
-        code += VmCodeInstruction(Opcode.LOADM, loopvarDt, reg1 = indexReg, value = loopvarAddress)
-        code += if(rangeEndWrapped==0) {
-            VmCodeInstruction(Opcode.BNZ, loopvarDt, reg1 = indexReg, labelSymbol = loopLabel)
-        } else {
-            VmCodeInstruction(Opcode.BNE, loopvarDt, reg1 = indexReg, reg2 = endvalueReg, labelSymbol = loopLabel)
-        }
-        return code
-    }
-
-    private fun addConstReg(dt: VmDataType, reg: Int, value: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        when(value) {
-            0 -> { /* do nothing */ }
-            1 -> {
-                code += VmCodeInstruction(Opcode.INC, dt, reg1=reg)
-            }
-            2 -> {
-                code += VmCodeInstruction(Opcode.INC, dt, reg1=reg)
-                code += VmCodeInstruction(Opcode.INC, dt, reg1=reg)
-            }
-            -1 -> {
-                code += VmCodeInstruction(Opcode.DEC, dt, reg1=reg)
-            }
-            -2 -> {
-                code += VmCodeInstruction(Opcode.DEC, dt, reg1=reg)
-                code += VmCodeInstruction(Opcode.DEC, dt, reg1=reg)
-            }
-            else -> {
-                code += if(value>0) {
-                    VmCodeInstruction(Opcode.ADD, dt, reg1 = reg, value=value)
-                } else {
-                    VmCodeInstruction(Opcode.SUB, dt, reg1 = reg, value=-value)
-                }
-            }
-        }
-        return code
-    }
-
-    private fun addConstMem(dt: VmDataType, address: UInt, value: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        when(value) {
-            0 -> { /* do nothing */ }
-            1 -> {
-                code += VmCodeInstruction(Opcode.INCM, dt, value=address.toInt())
-            }
-            2 -> {
-                code += VmCodeInstruction(Opcode.INCM, dt, value=address.toInt())
-                code += VmCodeInstruction(Opcode.INCM, dt, value=address.toInt())
-            }
-            -1 -> {
-                code += VmCodeInstruction(Opcode.DECM, dt, value=address.toInt())
-            }
-            -2 -> {
-                code += VmCodeInstruction(Opcode.DECM, dt, value=address.toInt())
-                code += VmCodeInstruction(Opcode.DECM, dt, value=address.toInt())
-            }
-            else -> {
-                val valueReg = vmRegisters.nextFree()
-                if(value>0) {
-                    code += VmCodeInstruction(Opcode.LOAD, dt, reg1=valueReg, value=value)
-                    code += VmCodeInstruction(Opcode.ADDM, dt, reg1=valueReg, value=address.toInt())
-                }
-                else {
-                    code += VmCodeInstruction(Opcode.LOAD, dt, reg1=valueReg, value=-value)
-                    code += VmCodeInstruction(Opcode.SUBM, dt, reg1=valueReg, value=address.toInt())
-                }
-            }
-        }
-        return code
-    }
-
-    internal fun multiplyByConstFloat(fpReg: Int, factor: Float): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1f)
-            return code
-        code += if(factor==0f) {
-            VmCodeInstruction(Opcode.LOAD, VmDataType.FLOAT, fpReg1 = fpReg, fpValue = 0f)
-        } else {
-            VmCodeInstruction(Opcode.MUL, VmDataType.FLOAT, fpReg1 = fpReg, fpValue=factor)
-        }
-        return code
-    }
-
-    internal fun multiplyByConstFloatInplace(address: Int, factor: Float): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1f)
-            return code
-        if(factor==0f) {
-            code += VmCodeInstruction(Opcode.STOREZM, VmDataType.FLOAT, value = address)
-        } else {
-            val factorReg = vmRegisters.nextFreeFloat()
-            code += VmCodeInstruction(Opcode.LOAD, VmDataType.FLOAT, fpReg1=factorReg, fpValue = factor)
-            code += VmCodeInstruction(Opcode.MULM, VmDataType.FLOAT, fpReg1 = factorReg, value = address)
-        }
-        return code
-    }
-
-    internal val powersOfTwo = (0..16).map { 2.0.pow(it.toDouble()).toInt() }
-
-    internal fun multiplyByConst(dt: VmDataType, reg: Int, factor: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1)
-            return code
-        val pow2 = powersOfTwo.indexOf(factor)
-        if(pow2==1) {
-            // just shift 1 bit
-            code += VmCodeInstruction(Opcode.LSL, dt, reg1=reg)
-        }
-        else if(pow2>=1) {
-            // just shift multiple bits
-            val pow2reg = vmRegisters.nextFree()
-            code += VmCodeInstruction(Opcode.LOAD, dt, reg1=pow2reg, value=pow2)
-            code += VmCodeInstruction(Opcode.LSLN, dt, reg1=reg, reg2=pow2reg)
-        } else {
-            code += if (factor == 0) {
-                VmCodeInstruction(Opcode.LOAD, dt, reg1=reg, value=0)
-            } else {
-                VmCodeInstruction(Opcode.MUL, dt, reg1=reg, value=factor)
-            }
-        }
-        return code
-    }
-
-    internal fun multiplyByConstInplace(dt: VmDataType, address: Int, factor: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1)
-            return code
-        val pow2 = powersOfTwo.indexOf(factor)
-        if(pow2==1) {
-            // just shift 1 bit
-            code += VmCodeInstruction(Opcode.LSLM, dt, value = address)
-        }
-        else if(pow2>=1) {
-            // just shift multiple bits
-            val pow2reg = vmRegisters.nextFree()
-            code += VmCodeInstruction(Opcode.LOAD, dt, reg1=pow2reg, value=pow2)
-            code += VmCodeInstruction(Opcode.LSLNM, dt, reg1=pow2reg, value=address)
-        } else {
-            if (factor == 0) {
-                code += VmCodeInstruction(Opcode.STOREZM, dt, value=address)
-            }
-            else {
-                val factorReg = vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, dt, reg1=factorReg, value = factor)
-                code += VmCodeInstruction(Opcode.MULM, dt, reg1=factorReg, value = address)
-            }
-        }
-        return code
-    }
-
-    internal fun divideByConstFloat(fpReg: Int, factor: Float): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1f)
-            return code
-        code += if(factor==0f) {
-            VmCodeInstruction(Opcode.LOAD, VmDataType.FLOAT, fpReg1 = fpReg, fpValue = Float.MAX_VALUE)
-        } else {
-            VmCodeInstruction(Opcode.DIVS, VmDataType.FLOAT, fpReg1 = fpReg, fpValue=factor)
-        }
-        return code
-    }
-
-    internal fun divideByConstFloatInplace(address: Int, factor: Float): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1f)
-            return code
-        if(factor==0f) {
-            val maxvalueReg = vmRegisters.nextFreeFloat()
-            code += VmCodeInstruction(Opcode.LOAD, VmDataType.FLOAT, fpReg1 = maxvalueReg, fpValue = Float.MAX_VALUE)
-            code += VmCodeInstruction(Opcode.STOREM, VmDataType.FLOAT, fpReg1 = maxvalueReg, value=address)
-        } else {
-            val factorReg = vmRegisters.nextFreeFloat()
-            code += VmCodeInstruction(Opcode.LOAD, VmDataType.FLOAT, fpReg1=factorReg, fpValue = factor)
-            code += VmCodeInstruction(Opcode.DIVSM, VmDataType.FLOAT, fpReg1 = factorReg, value=address)
-        }
-        return code
-    }
-
-    internal fun divideByConst(dt: VmDataType, reg: Int, factor: Int, signed: Boolean): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1)
-            return code
-        val pow2 = powersOfTwo.indexOf(factor)
-        if(pow2==1 && !signed) {
-            code += VmCodeInstruction(Opcode.LSR, dt, reg1=reg)     // simple single bit shift
-        }
-        else if(pow2>=1 &&!signed) {
-            // just shift multiple bits
-            val pow2reg = vmRegisters.nextFree()
-            code += VmCodeInstruction(Opcode.LOAD, dt, reg1=pow2reg, value=pow2)
-            code += if(signed)
-                VmCodeInstruction(Opcode.ASRN, dt, reg1=reg, reg2=pow2reg)
-            else
-                VmCodeInstruction(Opcode.LSRN, dt, reg1=reg, reg2=pow2reg)
-        } else {
-            code += if (factor == 0) {
-                VmCodeInstruction(Opcode.LOAD, dt, reg1=reg, value=0xffff)
-            } else {
-                if(signed)
-                    VmCodeInstruction(Opcode.DIVS, dt, reg1=reg, value=factor)
-                else
-                    VmCodeInstruction(Opcode.DIV, dt, reg1=reg, value=factor)
-            }
-        }
-        return code
-    }
-
-    internal fun divideByConstInplace(dt: VmDataType, address: Int, factor: Int, signed: Boolean): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(factor==1)
-            return code
-        val pow2 = powersOfTwo.indexOf(factor)
-        if(pow2==1 && !signed) {
-            code += VmCodeInstruction(Opcode.LSRM, dt, value=address)       // just simple bit shift
-        }
-        else if(pow2>=1 && !signed) {
-            // just shift multiple bits
-            val pow2reg = vmRegisters.nextFree()
-            code += VmCodeInstruction(Opcode.LOAD, dt, reg1=pow2reg, value=pow2)
-            code += if(signed)
-                VmCodeInstruction(Opcode.ASRNM, dt, reg1=pow2reg, value=address)
-            else
-                VmCodeInstruction(Opcode.LSRNM, dt, reg1=pow2reg, value=address)
-        } else {
-            if (factor == 0) {
-                val reg = vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, dt, reg1=reg, value=0xffff)
-                code += VmCodeInstruction(Opcode.STOREM, dt, reg1=reg, value=address)
-            }
-            else {
-                val factorReg = vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, dt, reg1=factorReg, value= factor)
-                code += if(signed)
-                    VmCodeInstruction(Opcode.DIVSM, dt, reg1=factorReg, value=address)
-                else
-                    VmCodeInstruction(Opcode.DIVM, dt, reg1=factorReg, value=address)
-            }
-        }
-        return code
-    }
-
-    private fun translate(ifElse: PtIfElse): VmCodeChunk {
-        if(ifElse.condition.operator !in ComparisonOperators)
-            throw AssemblyError("if condition should only be a binary comparison expression")
-
-        val signed = ifElse.condition.left.type in arrayOf(DataType.BYTE, DataType.WORD, DataType.FLOAT)
-        val vmDt = vmType(ifElse.condition.left.type)
-        val code = VmCodeChunk()
-
-        fun translateNonZeroComparison(): VmCodeChunk {
-            val elseBranch = when(ifElse.condition.operator) {
-                "==" -> Opcode.BNE
-                "!=" -> Opcode.BEQ
-                "<" -> if(signed) Opcode.BGES else Opcode.BGE
-                ">" -> if(signed) Opcode.BLES else Opcode.BLE
-                "<=" -> if(signed) Opcode.BGTS else Opcode.BGT
-                ">=" -> if(signed) Opcode.BLTS else Opcode.BLT
-                else -> throw AssemblyError("invalid comparison operator")
-            }
-
-            val leftReg = vmRegisters.nextFree()
-            val rightReg = vmRegisters.nextFree()
-            code += expressionEval.translateExpression(ifElse.condition.left, leftReg, -1)
-            code += expressionEval.translateExpression(ifElse.condition.right, rightReg, -1)
-            if(ifElse.elseScope.children.isNotEmpty()) {
-                // if and else parts
-                val elseLabel = createLabelName()
-                val afterIfLabel = createLabelName()
-                code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, reg2=rightReg, labelSymbol = elseLabel)
-                code += translateNode(ifElse.ifScope)
-                code += VmCodeInstruction(Opcode.JUMP, labelSymbol = afterIfLabel)
-                code += VmCodeLabel(elseLabel)
-                code += translateNode(ifElse.elseScope)
-                code += VmCodeLabel(afterIfLabel)
-            } else {
-                // only if part
-                val afterIfLabel = createLabelName()
-                code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, reg2=rightReg, labelSymbol = afterIfLabel)
-                code += translateNode(ifElse.ifScope)
-                code += VmCodeLabel(afterIfLabel)
-            }
-            return code
-        }
-
-        fun translateZeroComparison(): VmCodeChunk {
-            fun equalOrNotEqualZero(elseBranch: Opcode): VmCodeChunk {
-                val leftReg = vmRegisters.nextFree()
-                code += expressionEval.translateExpression(ifElse.condition.left, leftReg, -1)
-                if(ifElse.elseScope.children.isNotEmpty()) {
-                    // if and else parts
-                    val elseLabel = createLabelName()
-                    val afterIfLabel = createLabelName()
-                    code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, labelSymbol = elseLabel)
-                    code += translateNode(ifElse.ifScope)
-                    code += VmCodeInstruction(Opcode.JUMP, labelSymbol = afterIfLabel)
-                    code += VmCodeLabel(elseLabel)
-                    code += translateNode(ifElse.elseScope)
-                    code += VmCodeLabel(afterIfLabel)
-                } else {
-                    // only if part
-                    val afterIfLabel = createLabelName()
-                    code += VmCodeInstruction(elseBranch, vmDt, reg1=leftReg, labelSymbol = afterIfLabel)
-                    code += translateNode(ifElse.ifScope)
-                    code += VmCodeLabel(afterIfLabel)
-                }
-                return code
-            }
-
-            return when (ifElse.condition.operator) {
-                "==" -> {
-                    // if X==0 ...   so we just branch on left expr is Not-zero.
-                    equalOrNotEqualZero(Opcode.BNZ)
-                }
-                "!=" -> {
-                    // if X!=0 ...   so we just branch on left expr is Zero.
-                    equalOrNotEqualZero(Opcode.BZ)
-                }
-                else -> {
-                    // another comparison against 0, just use regular codegen for this.
-                    translateNonZeroComparison()
-                }
-            }
-        }
-
-        return if(constValue(ifElse.condition.right)==0.0)
-            translateZeroComparison()
-        else
-            translateNonZeroComparison()
-    }
-
-
-    private fun translate(postIncrDecr: PtPostIncrDecr): VmCodeChunk {
-        val code = VmCodeChunk()
-        val operationMem: Opcode
-        val operationRegister: Opcode
-        when(postIncrDecr.operator) {
-            "++" -> {
-                operationMem = Opcode.INCM
-                operationRegister = Opcode.INC
-            }
-            "--" -> {
-                operationMem = Opcode.DECM
-                operationRegister = Opcode.DEC
-            }
-            else -> throw AssemblyError("weird operator")
-        }
-        val ident = postIncrDecr.target.identifier
-        val memory = postIncrDecr.target.memory
-        val array = postIncrDecr.target.array
-        val vmDt = vmType(postIncrDecr.target.type)
-        if(ident!=null) {
-            val address = allocations.get(ident.targetName)
-            code += VmCodeInstruction(operationMem, vmDt, value = address)
-        } else if(memory!=null) {
-            if(memory.address is PtNumber) {
-                val address = (memory.address as PtNumber).number.toInt()
-                code += VmCodeInstruction(operationMem, vmDt, value = address)
-            } else {
-                val incReg = vmRegisters.nextFree()
-                val addressReg = vmRegisters.nextFree()
-                code += expressionEval.translateExpression(memory.address, addressReg, -1)
-                code += VmCodeInstruction(Opcode.LOADI, vmDt, reg1 = incReg, reg2 = addressReg)
-                code += VmCodeInstruction(operationRegister, vmDt, reg1 = incReg)
-                code += VmCodeInstruction(Opcode.STOREI, vmDt, reg1 = incReg, reg2 = addressReg)
-            }
-        } else if (array!=null) {
-            val variable = array.variable.targetName
-            var variableAddr = allocations.get(variable)
-            val itemsize = program.memsizer.memorySize(array.type)
-            val fixedIndex = constIntValue(array.index)
-            if(fixedIndex!=null) {
-                variableAddr += fixedIndex*itemsize
-                code += VmCodeInstruction(operationMem, vmDt, value=variableAddr)
-            } else {
-                val incReg = vmRegisters.nextFree()
-                val indexReg = vmRegisters.nextFree()
-                code += expressionEval.translateExpression(array.index, indexReg, -1)
-                code += VmCodeInstruction(Opcode.LOADX, vmDt, reg1=incReg, reg2=indexReg, value=variableAddr)
-                code += VmCodeInstruction(operationRegister, vmDt, reg1=incReg)
-                code += VmCodeInstruction(Opcode.STOREX, vmDt, reg1=incReg, reg2=indexReg, value=variableAddr)
-            }
-        } else
-            throw AssemblyError("weird assigntarget")
-
-        return code
-    }
-
-    private fun translate(repeat: PtRepeatLoop): VmCodeChunk {
-        when (constIntValue(repeat.count)) {
-            0 -> return VmCodeChunk()
-            1 -> return translateGroup(repeat.children)
-            256 -> {
-                // 256 iterations can still be done with just a byte counter if you set it to zero as starting value.
-                repeat.children[0] = PtNumber(DataType.UBYTE, 0.0, repeat.count.position)
-            }
-        }
-
-        val code = VmCodeChunk()
-        val counterReg = vmRegisters.nextFree()
-        val vmDt = vmType(repeat.count.type)
-        code += expressionEval.translateExpression(repeat.count, counterReg, -1)
-        val repeatLabel = createLabelName()
-        code += VmCodeLabel(repeatLabel)
-        code += translateNode(repeat.statements)
-        code += VmCodeInstruction(Opcode.DEC, vmDt, reg1=counterReg)
-        code += VmCodeInstruction(Opcode.BNZ, vmDt, reg1=counterReg, labelSymbol = repeatLabel)
-        return code
-    }
-
-    private fun translate(jump: PtJump): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(jump.address!=null)
-            throw AssemblyError("cannot jump to memory location in the vm target")
-        code += if(jump.generatedLabel!=null)
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = listOf(jump.generatedLabel!!))
-        else if(jump.identifier!=null)
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = jump.identifier!!.targetName)
-        else
-            throw AssemblyError("weird jump")
-        return code
-    }
-
-    private fun translateGroup(group: List<PtNode>): VmCodeChunk {
-        val code = VmCodeChunk()
-        group.forEach { code += translateNode(it) }
-        return code
-    }
-
-    private fun translate(ret: PtReturn): VmCodeChunk {
-        val code = VmCodeChunk()
-        val value = ret.value
-        if(value!=null) {
-            // Call Convention: return value is always returned in r0 (or fr0 if float)
-            code += if(value.type==DataType.FLOAT)
-                expressionEval.translateExpression(value, -1, 0)
-            else
-                expressionEval.translateExpression(value, 0, -1)
-        }
-        code += VmCodeInstruction(Opcode.RETURN)
-        return code
-    }
-
-    private fun translate(sub: PtSub): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += VmCodeComment("SUB: ${sub.scopedName} -> ${sub.returntype}")
-        code += VmCodeLabel(sub.scopedName)
-        for (child in sub.children) {
-            code += translateNode(child)
-        }
-        code += VmCodeComment("SUB-END '${sub.name}'")
-        return code
-    }
-
-    private fun translate(sub: PtAsmSub): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += VmCodeComment("ASMSUB: ${sub.scopedName}")
-        code += VmCodeLabel(sub.scopedName)
-        for (child in sub.children) {
-            code += translateNode(child)
-        }
-        code += VmCodeComment("ASMSUB-END '${sub.name}'")
-        return code
-    }
-
-    private fun translate(block: PtBlock): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += VmCodeComment("BLOCK '${block.name}'  addr=${block.address}  lib=${block.library}")
-        for (child in block.children) {
-            if(child !is PtAssignment) // global variable initialization is done elsewhere
-                code += translateNode(child)
-        }
-        code += VmCodeComment("BLOCK-END '${block.name}'")
-        return code
-    }
-
-
-    internal fun vmType(type: DataType): VmDataType {
-        return when(type) {
-            DataType.BOOL,
-            DataType.UBYTE,
-            DataType.BYTE -> VmDataType.BYTE
-            DataType.UWORD,
-            DataType.WORD -> VmDataType.WORD
-            DataType.FLOAT -> VmDataType.FLOAT
-            in PassByReferenceDatatypes -> VmDataType.WORD
-            else -> throw AssemblyError("no vm datatype for $type")
-        }
-    }
-
-    private var labelSequenceNumber = 0
-    internal fun createLabelName(): List<String> {
-        labelSequenceNumber++
-        return listOf("prog8_label_gen_$labelSequenceNumber")
-    }
-
-    internal fun translateBuiltinFunc(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk =
-        builtinFuncGen.translate(call, resultRegister)
-
-    internal fun isZero(expression: PtExpression): Boolean = expression is PtNumber && expression.number==0.0
-
-    internal fun isOne(expression: PtExpression): Boolean = expression is PtNumber && expression.number==1.0
-}
-

codeGenVirtual/src/prog8/codegen/virtual/ExpressionGen.kt

@@ -1,865 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.StRomSub
-import prog8.code.StStaticVariable
-import prog8.code.StSub
-import prog8.code.StSubroutineParameter
-import prog8.code.ast.*
-import prog8.code.core.*
-import prog8.vm.Opcode
-import prog8.vm.VmDataType
-
-
-internal class ExpressionGen(private val codeGen: CodeGen) {
-    fun translateExpression(expr: PtExpression, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        require(codeGen.vmRegisters.peekNext() > resultRegister)
-
-        val code = VmCodeChunk()
-
-        when (expr) {
-            is PtMachineRegister -> {
-                if(resultRegister!=expr.register) {
-                    val vmDt = codeGen.vmType(expr.type)
-                    code += VmCodeInstruction(Opcode.LOADR, vmDt, reg1=resultRegister, reg2=expr.register)
-                }
-            }
-            is PtNumber -> {
-                val vmDt = codeGen.vmType(expr.type)
-                code += if(vmDt==VmDataType.FLOAT)
-                    VmCodeInstruction(Opcode.LOAD, vmDt, fpReg1 = resultFpRegister, fpValue = expr.number.toFloat())
-                else
-                    VmCodeInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, value=expr.number.toInt())
-            }
-            is PtIdentifier -> {
-                val vmDt = codeGen.vmType(expr.type)
-                val mem = codeGen.allocations.get(expr.targetName)
-                code += if (expr.type in PassByValueDatatypes) {
-                    if(vmDt==VmDataType.FLOAT)
-                        VmCodeInstruction(Opcode.LOADM, vmDt, fpReg1 = resultFpRegister, value = mem)
-                    else
-                        VmCodeInstruction(Opcode.LOADM, vmDt, reg1 = resultRegister, value = mem)
-                } else {
-                    // for strings and arrays etc., load the *address* of the value instead
-                    VmCodeInstruction(Opcode.LOAD, vmDt, reg1 = resultRegister, value = mem)
-                }
-            }
-            is PtAddressOf -> {
-                val vmDt = codeGen.vmType(expr.type)
-                val mem = codeGen.allocations.get(expr.identifier.targetName)
-                code += VmCodeInstruction(Opcode.LOAD, vmDt, reg1=resultRegister, value=mem)
-            }
-            is PtMemoryByte -> {
-                if(expr.address is PtNumber) {
-                    val address = (expr.address as PtNumber).number.toInt()
-                    code += VmCodeInstruction(Opcode.LOADM, VmDataType.BYTE, reg1=resultRegister, value = address)
-                } else {
-                    val addressRegister = codeGen.vmRegisters.nextFree()
-                    code += translateExpression(expr.address, addressRegister, -1)
-                    code += VmCodeInstruction(Opcode.LOADI, VmDataType.BYTE, reg1=resultRegister, reg2=addressRegister)
-                }
-            }
-            is PtTypeCast -> code += translate(expr, resultRegister, resultFpRegister)
-            is PtPrefix -> code += translate(expr, resultRegister)
-            is PtArrayIndexer -> code += translate(expr, resultRegister, resultFpRegister)
-            is PtBinaryExpression -> code += translate(expr, resultRegister, resultFpRegister)
-            is PtBuiltinFunctionCall -> code += codeGen.translateBuiltinFunc(expr, resultRegister)
-            is PtFunctionCall -> code += translate(expr, resultRegister, resultFpRegister)
-            is PtContainmentCheck -> code += translate(expr, resultRegister, resultFpRegister)
-            is PtRange,
-            is PtArray,
-            is PtString -> throw AssemblyError("range/arrayliteral/string should no longer occur as expression")
-            else -> throw AssemblyError("weird expression")
-        }
-        return code
-    }
-
-    private fun translate(check: PtContainmentCheck, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += translateExpression(check.element, resultRegister, -1)   // load the element to check in resultRegister
-        val iterable = codeGen.symbolTable.flat.getValue(check.iterable.targetName) as StStaticVariable
-        when(iterable.dt) {
-            DataType.STR -> {
-                val call = PtFunctionCall(listOf("prog8_lib", "string_contains"), false, DataType.UBYTE, check.position)
-                call.children.add(check.element)
-                call.children.add(check.iterable)
-                code += translate(call, resultRegister, resultFpRegister)
-            }
-            DataType.ARRAY_UB, DataType.ARRAY_B -> {
-                val call = PtFunctionCall(listOf("prog8_lib", "bytearray_contains"), false, DataType.UBYTE, check.position)
-                call.children.add(check.element)
-                call.children.add(check.iterable)
-                call.children.add(PtNumber(DataType.UBYTE, iterable.length!!.toDouble(), iterable.position))
-                code += translate(call, resultRegister, resultFpRegister)
-            }
-            DataType.ARRAY_UW, DataType.ARRAY_W -> {
-                val call = PtFunctionCall(listOf("prog8_lib", "wordarray_contains"), false, DataType.UBYTE, check.position)
-                call.children.add(check.element)
-                call.children.add(check.iterable)
-                call.children.add(PtNumber(DataType.UBYTE, iterable.length!!.toDouble(), iterable.position))
-                code += translate(call, resultRegister, resultFpRegister)
-            }
-            DataType.ARRAY_F -> throw AssemblyError("containment check in float-array not supported")
-            else -> throw AssemblyError("weird iterable dt ${iterable.dt} for ${check.iterable.targetName}")
-        }
-        return code
-    }
-
-    private fun translate(arrayIx: PtArrayIndexer, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val eltSize = codeGen.program.memsizer.memorySize(arrayIx.type)
-        val vmDt = codeGen.vmType(arrayIx.type)
-        val code = VmCodeChunk()
-        val idxReg = codeGen.vmRegisters.nextFree()
-        val arrayLocation = codeGen.allocations.get(arrayIx.variable.targetName)
-
-        if(arrayIx.variable.type==DataType.UWORD) {
-            // indexing a pointer var instead of a real array or string
-            if(eltSize!=1)
-                throw AssemblyError("non-array var indexing requires bytes dt")
-            if(arrayIx.index.type!=DataType.UBYTE)
-                throw AssemblyError("non-array var indexing requires bytes index")
-            code += translateExpression(arrayIx.index, idxReg, -1)
-            code += VmCodeInstruction(Opcode.LOADIX, vmDt, reg1=resultRegister, reg2=idxReg, value = arrayLocation)
-            return code
-        }
-
-        if(arrayIx.index is PtNumber) {
-            // optimized code when index is known - just calculate the memory address here
-            val memOffset = (arrayIx.index as PtNumber).number.toInt() * eltSize
-            if(vmDt==VmDataType.FLOAT)
-                code += VmCodeInstruction(Opcode.LOADM, VmDataType.FLOAT, fpReg1=resultFpRegister, value=arrayLocation+memOffset)
-            else
-                code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1=resultRegister, value=arrayLocation+memOffset)
-        } else {
-            code += translateExpression(arrayIx.index, idxReg, -1)
-            if(eltSize>1)
-                code += codeGen.multiplyByConst(VmDataType.BYTE, idxReg, eltSize)
-            if(vmDt==VmDataType.FLOAT)
-                code += VmCodeInstruction(Opcode.LOADX, VmDataType.FLOAT, fpReg1 = resultFpRegister, reg1=idxReg, value = arrayLocation)
-            else
-                code += VmCodeInstruction(Opcode.LOADX, vmDt, reg1=resultRegister, reg2=idxReg, value = arrayLocation)
-        }
-        return code
-    }
-
-    private fun translate(expr: PtPrefix, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        code += translateExpression(expr.value, resultRegister, -1)
-        val vmDt = codeGen.vmType(expr.type)
-        when(expr.operator) {
-            "+" -> { }
-            "-" -> {
-                code += VmCodeInstruction(Opcode.NEG, vmDt, reg1=resultRegister)
-            }
-            "~" -> {
-                val mask = if(vmDt==VmDataType.BYTE) 0x00ff else 0xffff
-                code += VmCodeInstruction(Opcode.XOR, vmDt, reg1=resultRegister, value=mask)
-            }
-            else -> throw AssemblyError("weird prefix operator")
-        }
-        return code
-    }
-
-    private fun translate(cast: PtTypeCast, predefinedResultRegister: Int, predefinedResultFpRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(cast.type==cast.value.type)
-            return code
-        val actualResultFpReg = if(predefinedResultFpRegister>=0) predefinedResultFpRegister else codeGen.vmRegisters.nextFreeFloat()
-        val actualResultReg = if(predefinedResultRegister>=0) predefinedResultRegister else codeGen.vmRegisters.nextFree()
-        if(cast.value.type==DataType.FLOAT) {
-            // a cast from float to integer, so evaluate the value into a float register first
-            code += translateExpression(cast.value, -1, actualResultFpReg)
-        }
-        else
-            code += translateExpression(cast.value, actualResultReg, -1)
-        when(cast.type) {
-            DataType.UBYTE -> {
-                when(cast.value.type) {
-                    DataType.BYTE, DataType.UWORD, DataType.WORD -> { /* just keep the LSB as it is */ }
-                    DataType.FLOAT -> code += VmCodeInstruction(Opcode.FTOUB, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    else -> throw AssemblyError("weird cast value type")
-                }
-            }
-            DataType.BYTE -> {
-                when(cast.value.type) {
-                    DataType.UBYTE, DataType.UWORD, DataType.WORD -> { /* just keep the LSB as it is */ }
-                    DataType.FLOAT -> code += VmCodeInstruction(Opcode.FTOSB, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    else -> throw AssemblyError("weird cast value type")
-                }
-            }
-            DataType.UWORD -> {
-                when(cast.value.type) {
-                    DataType.BYTE -> {
-                        // byte -> uword:   sign extend
-                        code += VmCodeInstruction(Opcode.EXTS, type = VmDataType.BYTE, reg1 = actualResultReg)
-                    }
-                    DataType.UBYTE -> {
-                        // ubyte -> uword:   sign extend
-                        code += VmCodeInstruction(Opcode.EXT, type = VmDataType.BYTE, reg1 = actualResultReg)
-                    }
-                    DataType.WORD -> { }
-                    DataType.FLOAT -> {
-                        code += VmCodeInstruction(Opcode.FTOUW, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    else -> throw AssemblyError("weird cast value type")
-                }
-            }
-            DataType.WORD -> {
-                when(cast.value.type) {
-                    DataType.BYTE -> {
-                        // byte -> word:   sign extend
-                        code += VmCodeInstruction(Opcode.EXTS, type = VmDataType.BYTE, reg1 = actualResultReg)
-                    }
-                    DataType.UBYTE -> {
-                        // byte -> word:   sign extend
-                        code += VmCodeInstruction(Opcode.EXT, type = VmDataType.BYTE, reg1 = actualResultReg)
-                    }
-                    DataType.UWORD -> { }
-                    DataType.FLOAT -> {
-                        code += VmCodeInstruction(Opcode.FTOSW, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    else -> throw AssemblyError("weird cast value type")
-                }
-            }
-            DataType.FLOAT -> {
-                code += when(cast.value.type) {
-                    DataType.UBYTE -> {
-                        VmCodeInstruction(Opcode.FFROMUB, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    DataType.BYTE -> {
-                        VmCodeInstruction(Opcode.FFROMSB, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    DataType.UWORD -> {
-                        VmCodeInstruction(Opcode.FFROMUW, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    DataType.WORD -> {
-                        VmCodeInstruction(Opcode.FFROMSW, VmDataType.FLOAT, reg1=actualResultReg, fpReg1 = actualResultFpReg)
-                    }
-                    else -> throw AssemblyError("weird cast value type")
-                }
-            }
-            else -> throw AssemblyError("weird cast type")
-        }
-        return code
-    }
-
-    private fun translate(binExpr: PtBinaryExpression, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val vmDt = codeGen.vmType(binExpr.left.type)
-        val signed = binExpr.left.type in SignedDatatypes
-        return when(binExpr.operator) {
-            "+" -> operatorPlus(binExpr, vmDt, resultRegister, resultFpRegister)
-            "-" -> operatorMinus(binExpr, vmDt, resultRegister, resultFpRegister)
-            "*" -> operatorMultiply(binExpr, vmDt, resultRegister, resultFpRegister)
-            "/" -> operatorDivide(binExpr, vmDt, resultRegister, resultFpRegister, signed)
-            "%" -> operatorModulo(binExpr, vmDt, resultRegister)
-            "|" -> operatorOr(binExpr, vmDt, resultRegister)
-            "&" -> operatorAnd(binExpr, vmDt, resultRegister)
-            "^" -> operatorXor(binExpr, vmDt, resultRegister)
-            "<<" -> operatorShiftLeft(binExpr, vmDt, resultRegister)
-            ">>" -> operatorShiftRight(binExpr, vmDt, resultRegister, signed)
-            "==" -> operatorEquals(binExpr, vmDt, resultRegister, false)
-            "!=" -> operatorEquals(binExpr, vmDt, resultRegister, true)
-            "<" -> operatorLessThan(binExpr, vmDt, resultRegister, signed, false)
-            ">" -> operatorGreaterThan(binExpr, vmDt, resultRegister, signed, false)
-            "<=" -> operatorLessThan(binExpr, vmDt, resultRegister, signed, true)
-            ">=" -> operatorGreaterThan(binExpr, vmDt, resultRegister, signed, true)
-            else -> throw AssemblyError("weird operator ${binExpr.operator}")
-        }
-    }
-
-    private fun operatorGreaterThan(
-        binExpr: PtBinaryExpression,
-        vmDt: VmDataType,
-        resultRegister: Int,
-        signed: Boolean,
-        greaterEquals: Boolean
-    ): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            val leftFpReg = codeGen.vmRegisters.nextFreeFloat()
-            val rightFpReg = codeGen.vmRegisters.nextFreeFloat()
-            val zeroRegister = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, -1, leftFpReg)
-            code += translateExpression(binExpr.right, -1, rightFpReg)
-            code += VmCodeInstruction(Opcode.FCOMP, VmDataType.FLOAT, reg1=resultRegister, fpReg1 = leftFpReg, fpReg2 = rightFpReg)
-            code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=zeroRegister, value=0)
-            val ins = if (signed) {
-                if (greaterEquals) Opcode.SGES else Opcode.SGTS
-            } else {
-                if (greaterEquals) Opcode.SGE else Opcode.SGT
-            }
-            code += VmCodeInstruction(ins, VmDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister)
-        } else {
-            if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
-                val comparisonCall = PtFunctionCall(listOf("prog8_lib", "string_compare"), false, DataType.BYTE, Position.DUMMY)
-                comparisonCall.children.add(binExpr.left)
-                comparisonCall.children.add(binExpr.right)
-                code += translate(comparisonCall, resultRegister, -1)
-                val zeroRegister = codeGen.vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=zeroRegister, value=0)
-                code += if(greaterEquals)
-                    VmCodeInstruction(Opcode.SGES, VmDataType.BYTE, reg1=resultRegister, reg2=zeroRegister)
-                else
-                    VmCodeInstruction(Opcode.SGTS, VmDataType.BYTE, reg1=resultRegister, reg2=zeroRegister)
-            } else {
-                val rightResultReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += translateExpression(binExpr.right, rightResultReg, -1)
-                val ins = if (signed) {
-                    if (greaterEquals) Opcode.SGES else Opcode.SGTS
-                } else {
-                    if (greaterEquals) Opcode.SGE else Opcode.SGT
-                }
-                code += VmCodeInstruction(ins, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-            }
-        }
-        return code
-    }
-
-    private fun operatorLessThan(
-        binExpr: PtBinaryExpression,
-        vmDt: VmDataType,
-        resultRegister: Int,
-        signed: Boolean,
-        lessEquals: Boolean
-    ): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            val leftFpReg = codeGen.vmRegisters.nextFreeFloat()
-            val rightFpReg = codeGen.vmRegisters.nextFreeFloat()
-            val zeroRegister = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, -1, leftFpReg)
-            code += translateExpression(binExpr.right, -1, rightFpReg)
-            code += VmCodeInstruction(Opcode.FCOMP, VmDataType.FLOAT, reg1=resultRegister, fpReg1 = leftFpReg, fpReg2 = rightFpReg)
-            code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=zeroRegister, value=0)
-            val ins = if (signed) {
-                if (lessEquals) Opcode.SLES else Opcode.SLTS
-            } else {
-                if (lessEquals) Opcode.SLE else Opcode.SLT
-            }
-            code += VmCodeInstruction(ins, VmDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister)
-        } else {
-            if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
-                val comparisonCall = PtFunctionCall(listOf("prog8_lib", "string_compare"), false, DataType.BYTE, Position.DUMMY)
-                comparisonCall.children.add(binExpr.left)
-                comparisonCall.children.add(binExpr.right)
-                code += translate(comparisonCall, resultRegister, -1)
-                val zeroRegister = codeGen.vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=zeroRegister, value=0)
-                code += if(lessEquals)
-                    VmCodeInstruction(Opcode.SLES, VmDataType.BYTE, reg1=resultRegister, reg2=zeroRegister)
-                else
-                    VmCodeInstruction(Opcode.SLTS, VmDataType.BYTE, reg1=resultRegister, reg2=zeroRegister)
-            } else {
-                val rightResultReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += translateExpression(binExpr.right, rightResultReg, -1)
-                val ins = if (signed) {
-                    if (lessEquals) Opcode.SLES else Opcode.SLTS
-                } else {
-                    if (lessEquals) Opcode.SLE else Opcode.SLT
-                }
-                code += VmCodeInstruction(ins, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-            }
-        }
-        return code
-    }
-
-    private fun operatorEquals(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int, notEquals: Boolean): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            val leftFpReg = codeGen.vmRegisters.nextFreeFloat()
-            val rightFpReg = codeGen.vmRegisters.nextFreeFloat()
-            code += translateExpression(binExpr.left, -1, leftFpReg)
-            code += translateExpression(binExpr.right, -1, rightFpReg)
-            if (notEquals) {
-                code += VmCodeInstruction(Opcode.FCOMP, VmDataType.FLOAT, reg1=resultRegister, fpReg1 = leftFpReg, fpReg2 = rightFpReg)
-            } else {
-                val label = codeGen.createLabelName()
-                val valueReg = codeGen.vmRegisters.nextFree()
-                code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=resultRegister, value=1)
-                code += VmCodeInstruction(Opcode.FCOMP, VmDataType.FLOAT, reg1=valueReg, fpReg1 = leftFpReg, fpReg2 = rightFpReg)
-                code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=valueReg, labelSymbol = label)
-                code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=resultRegister, value=0)
-                code += VmCodeLabel(label)
-            }
-        } else {
-            if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
-                val comparisonCall = PtFunctionCall(listOf("prog8_lib", "string_compare"), false, DataType.BYTE, Position.DUMMY)
-                comparisonCall.children.add(binExpr.left)
-                comparisonCall.children.add(binExpr.right)
-                code += translate(comparisonCall, resultRegister, -1)
-                if(!notEquals)
-                    code += VmCodeInstruction(Opcode.INV, vmDt, reg1=resultRegister)
-                code += VmCodeInstruction(Opcode.AND, vmDt, reg1=resultRegister, value=1)
-            } else {
-                val rightResultReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += translateExpression(binExpr.right, rightResultReg, -1)
-                val opcode = if (notEquals) Opcode.SNE else Opcode.SEQ
-                code += VmCodeInstruction(opcode, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-            }
-        }
-        return code
-    }
-
-    private fun operatorShiftRight(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int, signed: Boolean): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isOne(binExpr.right)) {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            val opc = if (signed) Opcode.ASR else Opcode.LSR
-            code += VmCodeInstruction(opc, vmDt, reg1 = resultRegister)
-        } else {
-            val rightResultReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            val opc = if (signed) Opcode.ASRN else Opcode.LSRN
-            code += VmCodeInstruction(opc, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-        }
-        return code
-    }
-
-    internal fun operatorShiftRightInplace(address: Int, vmDt: VmDataType,  signed: Boolean, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isOne(operand)) {
-            val opc = if (signed) Opcode.ASRM else Opcode.LSRM
-            code += VmCodeInstruction(opc, vmDt, value=address)
-        } else {
-            val operandReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(operand, operandReg, -1)
-            val opc = if (signed) Opcode.ASRNM else Opcode.LSRNM
-            code += VmCodeInstruction(opc, vmDt, reg1 = operandReg, value=address)
-        }
-        return code
-    }
-
-    private fun operatorShiftLeft(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isOne(binExpr.right)){
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += VmCodeInstruction(Opcode.LSL, vmDt, reg1=resultRegister)
-        } else {
-            val rightResultReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            code += VmCodeInstruction(Opcode.LSLN, vmDt, reg1=resultRegister, rightResultReg)
-        }
-        return code
-    }
-
-    internal fun operatorShiftLeftInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(codeGen.isOne(operand)){
-            code += VmCodeInstruction(Opcode.LSLM, vmDt, value=address)
-        } else {
-            val operandReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(operand, operandReg, -1)
-            code += VmCodeInstruction(Opcode.LSLNM, vmDt, reg1=operandReg, value=address)
-        }
-        return code
-    }
-
-    private fun operatorXor(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(binExpr.right is PtNumber) {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += VmCodeInstruction(Opcode.XOR, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-        } else {
-            val rightResultReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            code += VmCodeInstruction(Opcode.XORR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-        }
-        return code
-    }
-
-    internal fun operatorXorInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        val operandReg = codeGen.vmRegisters.nextFree()
-        code += translateExpression(operand, operandReg, -1)
-        code += VmCodeInstruction(Opcode.XORM, vmDt, reg1=operandReg, value = address)
-        return code
-    }
-
-    private fun operatorAnd(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(binExpr.right is PtNumber) {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += VmCodeInstruction(Opcode.AND, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-        } else {
-            val rightResultReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            code += VmCodeInstruction(Opcode.ANDR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-        }
-        return code
-    }
-
-    internal  fun operatorAndInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        val operandReg = codeGen.vmRegisters.nextFree()
-        code += translateExpression(operand, operandReg, -1)
-        code += VmCodeInstruction(Opcode.ANDM, vmDt, reg1=operandReg, value=address)
-        return code
-    }
-
-    private fun operatorOr(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(binExpr.right is PtNumber) {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += VmCodeInstruction(Opcode.OR, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-        } else {
-            val rightResultReg = codeGen.vmRegisters.nextFree()
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            code += VmCodeInstruction(Opcode.ORR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-        }
-        return code
-    }
-
-    internal fun operatorOrInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        val operandReg = codeGen.vmRegisters.nextFree()
-        code += translateExpression(operand, operandReg, -1)
-        code += VmCodeInstruction(Opcode.ORM, vmDt, reg1=operandReg, value = address)
-        return code
-    }
-
-    private fun operatorModulo(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int): VmCodeChunk {
-        if(vmDt==VmDataType.FLOAT)
-            throw IllegalArgumentException("floating-point modulo not supported")
-        val code = VmCodeChunk()
-        val rightResultReg = codeGen.vmRegisters.nextFree()
-        if(binExpr.right is PtNumber) {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += VmCodeInstruction(Opcode.MOD, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-        } else {
-            code += translateExpression(binExpr.left, resultRegister, -1)
-            code += translateExpression(binExpr.right, rightResultReg, -1)
-            code += VmCodeInstruction(Opcode.MODR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-        }
-        return code
-    }
-
-    private fun operatorDivide(binExpr: PtBinaryExpression,
-                               vmDt: VmDataType,
-                               resultRegister: Int,
-                               resultFpRegister: Int,
-                               signed: Boolean): VmCodeChunk {
-        val code = VmCodeChunk()
-        val constFactorRight = binExpr.right as? PtNumber
-        if(vmDt==VmDataType.FLOAT) {
-            if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                val factor = constFactorRight.number.toFloat()
-                code += codeGen.divideByConstFloat(resultFpRegister, factor)
-            } else {
-                val rightResultFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                code += translateExpression(binExpr.right, -1, rightResultFpReg)
-                code += if(signed)
-                    VmCodeInstruction(Opcode.DIVSR, vmDt, fpReg1 = resultFpRegister, fpReg2=rightResultFpReg)
-                else
-                    VmCodeInstruction(Opcode.DIVR, vmDt, fpReg1 = resultFpRegister, fpReg2=rightResultFpReg)
-            }
-        } else {
-            if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                val factor = constFactorRight.number.toInt()
-                code += codeGen.divideByConst(vmDt, resultRegister, factor, signed)
-            } else {
-                val rightResultReg = codeGen.vmRegisters.nextFree()
-                if(binExpr.right is PtNumber) {
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += if (signed)
-                        VmCodeInstruction(Opcode.DIVS, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-                    else
-                        VmCodeInstruction(Opcode.DIV, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-                } else {
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += translateExpression(binExpr.right, rightResultReg, -1)
-                    code += if (signed)
-                        VmCodeInstruction(Opcode.DIVSR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-                    else
-                        VmCodeInstruction(Opcode.DIVR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-                }
-            }
-        }
-        return code
-    }
-
-    internal fun operatorDivideInplace(address: Int, vmDt: VmDataType, signed: Boolean, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        val constFactorRight = operand as? PtNumber
-        if(vmDt==VmDataType.FLOAT) {
-            if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                val factor = constFactorRight.number.toFloat()
-                code += codeGen.divideByConstFloatInplace(address, factor)
-            } else {
-                val operandFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(operand, -1, operandFpReg)
-                code += if(signed)
-                    VmCodeInstruction(Opcode.DIVSM, vmDt, fpReg1 = operandFpReg, value=address)
-                else
-                    VmCodeInstruction(Opcode.DIVM, vmDt, fpReg1 = operandFpReg, value=address)
-            }
-        } else {
-            if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                val factor = constFactorRight.number.toInt()
-                code += codeGen.divideByConstInplace(vmDt, address, factor, signed)
-            } else {
-                val operandReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(operand, operandReg, -1)
-                code += if(signed)
-                    VmCodeInstruction(Opcode.DIVSM, vmDt, reg1=operandReg, value = address)
-                else
-                    VmCodeInstruction(Opcode.DIVM, vmDt, reg1=operandReg, value = address)
-            }
-        }
-        return code
-    }
-
-    private fun operatorMultiply(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        val constFactorLeft = binExpr.left as? PtNumber
-        val constFactorRight = binExpr.right as? PtNumber
-        if(vmDt==VmDataType.FLOAT) {
-            if(constFactorLeft!=null) {
-                code += translateExpression(binExpr.right, -1, resultFpRegister)
-                val factor = constFactorLeft.number.toFloat()
-                code += codeGen.multiplyByConstFloat(resultFpRegister, factor)
-            } else if(constFactorRight!=null) {
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                val factor = constFactorRight.number.toFloat()
-                code += codeGen.multiplyByConstFloat(resultFpRegister, factor)
-            } else {
-                val rightResultFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                code += translateExpression(binExpr.right, -1, rightResultFpReg)
-                code += VmCodeInstruction(Opcode.MULR, vmDt, fpReg1 = resultFpRegister, fpReg2 = rightResultFpReg)
-            }
-        } else {
-            if(constFactorLeft!=null && constFactorLeft.type!=DataType.FLOAT) {
-                code += translateExpression(binExpr.right, resultRegister, -1)
-                val factor = constFactorLeft.number.toInt()
-                code += codeGen.multiplyByConst(vmDt, resultRegister, factor)
-            } else if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                val factor = constFactorRight.number.toInt()
-                code += codeGen.multiplyByConst(vmDt, resultRegister, factor)
-            } else {
-                val rightResultReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += translateExpression(binExpr.right, rightResultReg, -1)
-                code += VmCodeInstruction(Opcode.MULR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-            }
-        }
-        return code
-    }
-
-    internal fun operatorMultiplyInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        val constFactorRight = operand as? PtNumber
-        if(vmDt==VmDataType.FLOAT) {
-            if(constFactorRight!=null) {
-                val factor = constFactorRight.number.toFloat()
-                code += codeGen.multiplyByConstFloatInplace(address, factor)
-            } else {
-                val operandFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(operand, -1, operandFpReg)
-                code += VmCodeInstruction(Opcode.MULM, vmDt, fpReg1 = operandFpReg, value = address)
-            }
-        } else {
-            if(constFactorRight!=null && constFactorRight.type!=DataType.FLOAT) {
-                val factor = constFactorRight.number.toInt()
-                code += codeGen.multiplyByConstInplace(vmDt, address, factor)
-            } else {
-                val operandReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(operand, operandReg, -1)
-                code += VmCodeInstruction(Opcode.MULM, vmDt, reg1=operandReg, value = address)
-            }
-        }
-        return code
-    }
-
-    private fun operatorMinus(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            if((binExpr.right as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                code += VmCodeInstruction(Opcode.DEC, vmDt, fpReg1 = resultFpRegister)
-            }
-            else {
-                if(binExpr.right is PtNumber) {
-                    code += translateExpression(binExpr.left, -1, resultFpRegister)
-                    code += VmCodeInstruction(Opcode.SUB, vmDt, fpReg1 = resultFpRegister, fpValue = (binExpr.right as PtNumber).number.toFloat())
-                } else {
-                    val rightResultFpReg = codeGen.vmRegisters.nextFreeFloat()
-                    code += translateExpression(binExpr.left, -1, resultFpRegister)
-                    code += translateExpression(binExpr.right, -1, rightResultFpReg)
-                    code += VmCodeInstruction(Opcode.SUBR, vmDt, fpReg1 = resultFpRegister, fpReg2 = rightResultFpReg)
-                }
-            }
-        } else {
-            if((binExpr.right as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += VmCodeInstruction(Opcode.DEC, vmDt, reg1=resultRegister)
-            }
-            else {
-                if(binExpr.right is PtNumber) {
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += VmCodeInstruction(Opcode.SUB, vmDt, reg1 = resultRegister, value = (binExpr.right as PtNumber).number.toInt())
-                } else {
-                    val rightResultReg = codeGen.vmRegisters.nextFree()
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += translateExpression(binExpr.right, rightResultReg, -1)
-                    code += VmCodeInstruction(Opcode.SUBR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-                }
-            }
-        }
-        return code
-    }
-
-    internal fun operatorMinusInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            if((operand as? PtNumber)?.number==1.0) {
-                code += VmCodeInstruction(Opcode.DECM, vmDt, value=address)
-            }
-            else {
-                val operandFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(operand, -1, operandFpReg)
-                code += VmCodeInstruction(Opcode.SUBM, vmDt, fpReg1=operandFpReg, value=address)
-            }
-        } else {
-            if((operand as? PtNumber)?.number==1.0) {
-                code += VmCodeInstruction(Opcode.DECM, vmDt, value=address)
-            }
-            else {
-                val operandReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(operand, operandReg, -1)
-                code += VmCodeInstruction(Opcode.SUBM, vmDt, reg1=operandReg, value = address)
-            }
-        }
-        return code
-    }
-
-    private fun operatorPlus(binExpr: PtBinaryExpression, vmDt: VmDataType, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            if((binExpr.left as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.right, -1, resultFpRegister)
-                code += VmCodeInstruction(Opcode.INC, vmDt, fpReg1=resultFpRegister)
-            }
-            else if((binExpr.right as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.left, -1, resultFpRegister)
-                code += VmCodeInstruction(Opcode.INC, vmDt, fpReg1=resultFpRegister)
-            }
-            else {
-                if(binExpr.right is PtNumber) {
-                    code += translateExpression(binExpr.left, -1, resultFpRegister)
-                    code += VmCodeInstruction(Opcode.ADD, vmDt, fpReg1 = resultFpRegister, fpValue = (binExpr.right as PtNumber).number.toFloat())
-                } else {
-                    val rightResultFpReg = codeGen.vmRegisters.nextFreeFloat()
-                    code += translateExpression(binExpr.left, -1, resultFpRegister)
-                    code += translateExpression(binExpr.right, -1, rightResultFpReg)
-                    code += VmCodeInstruction(Opcode.ADDR, vmDt, fpReg1 = resultFpRegister, fpReg2 = rightResultFpReg)
-                }
-            }
-        } else {
-            if((binExpr.left as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.right, resultRegister, -1)
-                code += VmCodeInstruction(Opcode.INC, vmDt, reg1=resultRegister)
-            }
-            else if((binExpr.right as? PtNumber)?.number==1.0) {
-                code += translateExpression(binExpr.left, resultRegister, -1)
-                code += VmCodeInstruction(Opcode.INC, vmDt, reg1=resultRegister)
-            }
-            else {
-                if(binExpr.right is PtNumber) {
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += VmCodeInstruction(Opcode.ADD, vmDt, reg1 = resultRegister, value=(binExpr.right as PtNumber).number.toInt())
-                } else {
-                    val rightResultReg = codeGen.vmRegisters.nextFree()
-                    code += translateExpression(binExpr.left, resultRegister, -1)
-                    code += translateExpression(binExpr.right, rightResultReg, -1)
-                    code += VmCodeInstruction(Opcode.ADDR, vmDt, reg1 = resultRegister, reg2 = rightResultReg)
-                }
-            }
-        }
-        return code
-    }
-
-    internal fun operatorPlusInplace(address: Int, vmDt: VmDataType, operand: PtExpression): VmCodeChunk {
-        val code = VmCodeChunk()
-        if(vmDt==VmDataType.FLOAT) {
-            if((operand as? PtNumber)?.number==1.0) {
-                code += VmCodeInstruction(Opcode.INCM, vmDt, value = address)
-            }
-            else {
-                val operandFpReg = codeGen.vmRegisters.nextFreeFloat()
-                code += translateExpression(operand, -1, operandFpReg)
-                code += VmCodeInstruction(Opcode.ADDM, vmDt, fpReg1=operandFpReg, value=address)
-            }
-        } else {
-            if((operand as? PtNumber)?.number==1.0) {
-                code += VmCodeInstruction(Opcode.INCM, vmDt, value = address)
-            }
-            else {
-                val operandReg = codeGen.vmRegisters.nextFree()
-                code += translateExpression(operand, operandReg, -1)
-                code += VmCodeInstruction(Opcode.ADDM, vmDt, reg1=operandReg, value=address)
-            }
-        }
-        return code
-    }
-
-    fun translate(fcall: PtFunctionCall, resultRegister: Int, resultFpRegister: Int): VmCodeChunk {
-        when (val callTarget = codeGen.symbolTable.flat.getValue(fcall.functionName)) {
-            is StSub -> {
-                val code = VmCodeChunk()
-                for ((arg, parameter) in fcall.args.zip(callTarget.parameters)) {
-                    val paramDt = codeGen.vmType(parameter.type)
-                    if(codeGen.isZero(arg)) {
-                        if (paramDt == VmDataType.FLOAT) {
-                            val mem = codeGen.allocations.get(fcall.functionName + parameter.name)
-                            code += VmCodeInstruction(Opcode.STOREZM, paramDt, value = mem)
-                        } else {
-                            val mem = codeGen.allocations.get(fcall.functionName + parameter.name)
-                            code += VmCodeInstruction(Opcode.STOREZM, paramDt, value = mem)
-                        }
-                    } else {
-                        if (paramDt == VmDataType.FLOAT) {
-                            val argFpReg = codeGen.vmRegisters.nextFreeFloat()
-                            code += translateExpression(arg, -1, argFpReg)
-                            val mem = codeGen.allocations.get(fcall.functionName + parameter.name)
-                            code += VmCodeInstruction(Opcode.STOREM, paramDt, fpReg1 = argFpReg, value = mem)
-                        } else {
-                            val argReg = codeGen.vmRegisters.nextFree()
-                            code += translateExpression(arg, argReg, -1)
-                            val mem = codeGen.allocations.get(fcall.functionName + parameter.name)
-                            code += VmCodeInstruction(Opcode.STOREM, paramDt, reg1 = argReg, value = mem)
-                        }
-                    }
-                }
-                code += VmCodeInstruction(Opcode.CALL, labelSymbol=fcall.functionName)
-                if(fcall.type==DataType.FLOAT) {
-                    if (!fcall.void && resultFpRegister != 0) {
-                        // Call convention: result value is in fr0, so put it in the required register instead.
-                        code += VmCodeInstruction(Opcode.LOADR, VmDataType.FLOAT, fpReg1 = resultFpRegister, fpReg2 = 0)
-                    }
-                } else {
-                    if (!fcall.void && resultRegister != 0) {
-                        // Call convention: result value is in r0, so put it in the required register instead.
-                        code += VmCodeInstruction(Opcode.LOADR, codeGen.vmType(fcall.type), reg1 = resultRegister, reg2 = 0)
-                    }
-                }
-                return code
-            }
-            is StRomSub -> {
-                throw AssemblyError("virtual machine doesn't yet support calling romsub $fcall")
-            }
-            else -> throw AssemblyError("invalid node type")
-        }
-    }
-
-}

codeGenVirtual/src/prog8/codegen/virtual/VariableAllocator.kt

@@ -1,122 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.code.SymbolTable
-import prog8.code.ast.PtProgram
-import prog8.code.core.*
-
-class VariableAllocator(private val st: SymbolTable, private val program: PtProgram) {
-
-    private val allocations = mutableMapOf<List<String>, Int>()
-    private var freeMemoryStart: Int
-
-    val freeMem: Int
-        get() = freeMemoryStart
-
-    init {
-        var nextLocation = 0
-        for (variable in st.allVariables) {
-            val memsize =
-                when (variable.dt) {
-                    DataType.STR -> variable.initialStringValue!!.first.length + 1  // include the zero byte
-                    in NumericDatatypes -> program.memsizer.memorySize(variable.dt)
-                    in ArrayDatatypes -> program.memsizer.memorySize(variable.dt, variable.length!!)
-                    else -> throw InternalCompilerException("weird dt")
-                }
-
-            allocations[variable.scopedName] = nextLocation
-            nextLocation += memsize
-        }
-        for (memvar in st.allMemMappedVariables) {
-            // TODO virtual machine doesn't have memory mapped variables, so treat them as regular allocated variables for now
-            val memsize =
-                when (memvar.dt) {
-                    in NumericDatatypes -> program.memsizer.memorySize(memvar.dt)
-                    in ArrayDatatypes -> program.memsizer.memorySize(memvar.dt, memvar.length!!)
-                    else -> throw InternalCompilerException("weird dt")
-                }
-
-            allocations[memvar.scopedName] = nextLocation
-            nextLocation += memsize
-        }
-
-        freeMemoryStart = nextLocation
-    }
-
-    fun get(name: List<String>) = allocations.getValue(name)
-
-    fun asVmMemory(): List<Pair<List<String>, String>> {
-        val mm = mutableListOf<Pair<List<String>, String>>()
-        for (variable in st.allVariables) {
-            val location = allocations.getValue(variable.scopedName)
-            val typeStr = when(variable.dt) {
-                DataType.UBYTE, DataType.ARRAY_UB, DataType.STR -> "ubyte"
-                DataType.BYTE, DataType.ARRAY_B -> "byte"
-                DataType.UWORD, DataType.ARRAY_UW -> "uword"
-                DataType.WORD, DataType.ARRAY_W -> "word"
-                DataType.FLOAT, DataType.ARRAY_F -> "float"
-                else -> throw InternalCompilerException("weird dt")
-            }
-            val value = when(variable.dt) {
-                DataType.FLOAT -> (variable.initialNumericValue ?: 0.0).toString()
-                in NumericDatatypes -> (variable.initialNumericValue ?: 0).toHex()
-                DataType.STR -> {
-                    val encoded = program.encoding.encodeString(variable.initialStringValue!!.first, variable.initialStringValue!!.second) + listOf(0u)
-                    encoded.joinToString(",") { it.toInt().toHex() }
-                }
-                DataType.ARRAY_F -> {
-                    if(variable.initialArrayValue!=null) {
-                        variable.initialArrayValue!!.joinToString(",") { it.number!!.toString() }
-                    } else {
-                        (1..variable.length!!).joinToString(",") { "0" }
-                    }
-                }
-                in ArrayDatatypes -> {
-                    if(variable.initialArrayValue!==null) {
-                        variable.initialArrayValue!!.joinToString(",") { it.number!!.toHex() }
-                    } else {
-                        (1..variable.length!!).joinToString(",") { "0" }
-                    }
-                }
-                else -> throw InternalCompilerException("weird dt")
-            }
-            mm.add(Pair(variable.scopedName, "$location $typeStr $value"))
-        }
-        for (variable in st.allMemMappedVariables) {
-            val location = allocations.getValue(variable.scopedName)
-            val typeStr = when(variable.dt) {
-                DataType.UBYTE, DataType.ARRAY_UB, DataType.STR -> "ubyte"
-                DataType.BYTE, DataType.ARRAY_B -> "byte"
-                DataType.UWORD, DataType.ARRAY_UW -> "uword"
-                DataType.WORD, DataType.ARRAY_W -> "word"
-                DataType.FLOAT, DataType.ARRAY_F -> "float"
-                else -> throw InternalCompilerException("weird dt")
-            }
-            val value = when(variable.dt) {
-                DataType.FLOAT -> "0.0"
-                in NumericDatatypes -> "0"
-                DataType.ARRAY_F -> (1..variable.length!!).joinToString(",") { "0.0" }
-                in ArrayDatatypes -> (1..variable.length!!).joinToString(",") { "0" }
-                else -> throw InternalCompilerException("weird dt for mem mapped var")
-            }
-            mm.add(Pair(variable.scopedName, "$location $typeStr $value"))
-        }
-        return mm
-    }
-
-    private val memorySlabsInternal = mutableMapOf<String, Triple<UInt, UInt, UInt>>()
-    internal val memorySlabs: Map<String, Triple<UInt, UInt, UInt>> = memorySlabsInternal
-
-    fun allocateMemorySlab(name: String, size: UInt, align: UInt): UInt {
-        val address =
-            if(align==0u || align==1u)
-                freeMemoryStart.toUInt()
-            else
-                (freeMemoryStart.toUInt() + align-1u) and (0xffffffffu xor (align-1u))
-
-        memorySlabsInternal[name] = Triple(address, size, align)
-        freeMemoryStart = (address + size).toInt()
-        return address
-    }
-
-    fun getMemorySlab(name: String): Triple<UInt, UInt, UInt>? = memorySlabsInternal[name]
-}

codeGenVirtual/src/prog8/codegen/virtual/VmPeepholeOptimizer.kt

@@ -1,188 +0,0 @@
-package prog8.codegen.virtual
-
-import prog8.vm.Instruction
-import prog8.vm.Opcode
-import prog8.vm.VmDataType
-
-
-class VmPeepholeOptimizer(private val vmprog: AssemblyProgram) {
-    fun optimize() {
-        vmprog.getBlocks().forEach { block ->
-            do {
-                val indexedInstructions = block.lines.withIndex()
-                    .filter { it.value is VmCodeInstruction }
-                    .map { IndexedValue(it.index, (it.value as VmCodeInstruction).ins) }
-                val changed = removeNops(block, indexedInstructions)
-                        || removeDoubleLoadsAndStores(block, indexedInstructions)       // TODO not yet implemented
-                        || removeUselessArithmetic(block, indexedInstructions)
-                        || removeWeirdBranches(block, indexedInstructions)
-                        || removeDoubleSecClc(block, indexedInstructions)
-                        || cleanupPushPop(block, indexedInstructions)
-                // TODO other optimizations:
-                //  more complex optimizations such as unused registers
-            } while(changed)
-        }
-    }
-
-    private fun cleanupPushPop(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        //  push followed by pop to same target, or different target->replace with load
-        var changed = false
-        indexedInstructions.reversed().forEach { (idx, ins) ->
-            if(ins.opcode==Opcode.PUSH) {
-                if(idx < block.lines.size-1) {
-                    val insAfter = block.lines[idx+1] as? VmCodeInstruction
-                    if(insAfter!=null && insAfter.ins.opcode ==Opcode.POP) {
-                        if(ins.reg1==insAfter.ins.reg1) {
-                            block.lines.removeAt(idx)
-                            block.lines.removeAt(idx)
-                        } else {
-                            block.lines[idx] = VmCodeInstruction(Opcode.LOADR, ins.type, reg1=insAfter.ins.reg1, reg2=ins.reg1)
-                            block.lines.removeAt(idx+1)
-                        }
-                        changed = true
-                    }
-                }
-            }
-        }
-        return changed
-    }
-
-
-    private fun removeDoubleSecClc(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        //  double sec, clc
-        //  sec+clc or clc+sec
-        var changed = false
-        indexedInstructions.reversed().forEach { (idx, ins) ->
-            if(ins.opcode==Opcode.SEC || ins.opcode==Opcode.CLC) {
-                if(idx < block.lines.size-1) {
-                    val insAfter = block.lines[idx+1] as? VmCodeInstruction
-                    if(insAfter?.ins?.opcode == ins.opcode) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                    else if(ins.opcode==Opcode.SEC && insAfter?.ins?.opcode==Opcode.CLC) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                    else if(ins.opcode==Opcode.CLC && insAfter?.ins?.opcode==Opcode.SEC) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-            }
-        }
-        return changed
-    }
-
-    private fun removeWeirdBranches(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        //  jump/branch to label immediately below
-        var changed = false
-        indexedInstructions.reversed().forEach { (idx, ins) ->
-            if(ins.opcode==Opcode.JUMP && ins.labelSymbol!=null) {
-                // if jumping to label immediately following this
-                if(idx < block.lines.size-1) {
-                    val label = block.lines[idx+1] as? VmCodeLabel
-                    if(label?.name == ins.labelSymbol) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-            }
-        }
-        return changed
-    }
-
-    private fun removeUselessArithmetic(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        // note: this is hard to solve for the non-immediate instructions atm because the values are loaded into registers first
-        var changed = false
-        indexedInstructions.reversed().forEach { (idx, ins) ->
-            when (ins.opcode) {
-                Opcode.DIV, Opcode.DIVS, Opcode.MUL, Opcode.MOD -> {
-                    if (ins.value == 1) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-                Opcode.ADD, Opcode.SUB -> {
-                    if (ins.value == 1) {
-                        block.lines[idx] = VmCodeInstruction(
-                            if (ins.opcode == Opcode.ADD) Opcode.INC else Opcode.DEC,
-                            ins.type,
-                            ins.reg1
-                        )
-                        changed = true
-                    } else if (ins.value == 0) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-                Opcode.AND -> {
-                    if (ins.value == 0) {
-                        block.lines[idx] = VmCodeInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = 0)
-                        changed = true
-                    } else if (ins.value == 255 && ins.type == VmDataType.BYTE) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    } else if (ins.value == 65535 && ins.type == VmDataType.WORD) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-                Opcode.OR -> {
-                    if (ins.value == 0) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    } else if ((ins.value == 255 && ins.type == VmDataType.BYTE) || (ins.value == 65535 && ins.type == VmDataType.WORD)) {
-                        block.lines[idx] = VmCodeInstruction(Opcode.LOAD, ins.type, reg1 = ins.reg1, value = ins.value)
-                        changed = true
-                    }
-                }
-                Opcode.XOR -> {
-                    if (ins.value == 0) {
-                        block.lines.removeAt(idx)
-                        changed = true
-                    }
-                }
-                else -> {}
-            }
-        }
-        return changed
-    }
-
-    private fun removeNops(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        var changed = false
-        indexedInstructions.reversed().forEach { (idx, ins) ->
-            if (ins.opcode == Opcode.NOP) {
-                changed = true
-                block.lines.removeAt(idx)
-            }
-        }
-        return changed
-    }
-
-    private fun removeDoubleLoadsAndStores(block: VmCodeChunk, indexedInstructions: List<IndexedValue<Instruction>>): Boolean {
-        var changed = false
-        indexedInstructions.forEach { (idx, ins) ->
-
-            // TODO: detect multiple loads to the same target registers, only keep first (if source is not I/O memory)
-            // TODO: detect multiple stores to the same target, only keep first (if target is not I/O memory)
-            // TODO: detect multiple float ffrom/fto to the same target, only keep first
-            // TODO: detect multiple sequential rnd with same reg1, only keep one
-            // TODO: detect subsequent same xors/nots/negs, remove the pairs completely as they cancel out
-            // TODO: detect multiple same ands, ors; only keep first
-            // TODO: (hard) detect multiple registers being assigned the same value (and not changed) - use only 1 of them
-            // ...
-        }
-        return changed
-    }
-}
-
-private interface ICodeChange { // TODO not used? remove?
-    fun perform(block: VmCodeChunk)
-
-    class Remove(val idx: Int): ICodeChange {
-        override fun perform(block: VmCodeChunk) {
-            block.lines.removeAt(idx)
-        }
-    }
-}

codeGenVirtual/test/TestVmPeepholeOpt.kt

@@ -1,170 +0,0 @@
-package prog8tests.vm
-
-import io.kotest.core.spec.style.FunSpec
-import io.kotest.matchers.shouldBe
-import prog8.code.SymbolTable
-import prog8.code.ast.PtProgram
-import prog8.codegen.virtual.*
-import prog8.vm.Opcode
-import prog8.vm.VmDataType
-import prog8tests.vm.helpers.DummyMemsizer
-import prog8tests.vm.helpers.DummyStringEncoder
-
-class TestVmPeepholeOpt: FunSpec({
-    fun makeVmProgram(lines: List<VmCodeLine>): Pair<AssemblyProgram, VariableAllocator> {
-        val st = SymbolTable()
-        val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
-        val allocations = VariableAllocator(st, program)
-        val asm = AssemblyProgram("test", allocations)
-        val block = VmCodeChunk()
-        for(line in lines)
-            block += line
-        asm.addBlock(block)
-        return Pair(asm, allocations)
-    }
-
-    fun AssemblyProgram.lines(): List<VmCodeLine> = this.getBlocks().flatMap { it.lines }
-
-    test("remove nops") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = listOf("dummy")),
-            VmCodeInstruction(Opcode.NOP),
-            VmCodeInstruction(Opcode.NOP)
-        ))
-        asm.lines().size shouldBe 3
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        asm.lines().size shouldBe 1
-    }
-
-    test("remove jmp to label below") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = listOf("label")),  // removed
-            VmCodeLabel(listOf("label")),
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = listOf("label2")), // removed
-            VmCodeInstruction(Opcode.NOP),  // removed
-            VmCodeLabel(listOf("label2")),
-            VmCodeInstruction(Opcode.JUMP, labelSymbol = listOf("label3")),
-            VmCodeInstruction(Opcode.INC, VmDataType.BYTE, reg1=1),
-            VmCodeLabel(listOf("label3"))
-        ))
-        asm.lines().size shouldBe 8
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 5
-        (lines[0] as VmCodeLabel).name shouldBe listOf("label")
-        (lines[1] as VmCodeLabel).name shouldBe listOf("label2")
-        (lines[2] as VmCodeInstruction).ins.opcode shouldBe Opcode.JUMP
-        (lines[3] as VmCodeInstruction).ins.opcode shouldBe Opcode.INC
-        (lines[4] as VmCodeLabel).name shouldBe listOf("label3")
-    }
-
-    test("remove double sec/clc") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.SEC),
-            VmCodeInstruction(Opcode.SEC),
-            VmCodeInstruction(Opcode.SEC),
-            VmCodeInstruction(Opcode.CLC),
-            VmCodeInstruction(Opcode.CLC),
-            VmCodeInstruction(Opcode.CLC)
-        ))
-        asm.lines().size shouldBe 6
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 1
-        (lines[0] as VmCodeInstruction).ins.opcode shouldBe Opcode.CLC
-    }
-
-    test("push followed by pop") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=42),
-            VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=42),
-            VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=99),
-            VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=222)
-        ))
-        asm.lines().size shouldBe 4
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 1
-        (lines[0] as VmCodeInstruction).ins.opcode shouldBe Opcode.LOADR
-        (lines[0] as VmCodeInstruction).ins.reg1 shouldBe 222
-        (lines[0] as VmCodeInstruction).ins.reg2 shouldBe 99
-    }
-
-    test("remove useless div/mul, add/sub") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.DIV, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.DIVS, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.MUL, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.MOD, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.DIV, VmDataType.BYTE, reg1=42, value = 2),
-            VmCodeInstruction(Opcode.DIVS, VmDataType.BYTE, reg1=42, value = 2),
-            VmCodeInstruction(Opcode.MUL, VmDataType.BYTE, reg1=42, value = 2),
-            VmCodeInstruction(Opcode.MOD, VmDataType.BYTE, reg1=42, value = 2),
-            VmCodeInstruction(Opcode.ADD, VmDataType.BYTE, reg1=42, value = 0),
-            VmCodeInstruction(Opcode.SUB, VmDataType.BYTE, reg1=42, value = 0)
-        ))
-        asm.lines().size shouldBe 10
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 4
-    }
-
-    test("replace add/sub 1 by inc/dec") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.ADD, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.SUB, VmDataType.BYTE, reg1=42, value = 1)
-        ))
-        asm.lines().size shouldBe 2
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 2
-        (lines[0] as VmCodeInstruction).ins.opcode shouldBe Opcode.INC
-        (lines[1] as VmCodeInstruction).ins.opcode shouldBe Opcode.DEC
-    }
-
-    test("remove useless and/or/xor") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.AND, VmDataType.BYTE, reg1=42, value = 255),
-            VmCodeInstruction(Opcode.AND, VmDataType.WORD, reg1=42, value = 65535),
-            VmCodeInstruction(Opcode.OR, VmDataType.BYTE, reg1=42, value = 0),
-            VmCodeInstruction(Opcode.XOR, VmDataType.BYTE, reg1=42, value = 0),
-            VmCodeInstruction(Opcode.AND, VmDataType.BYTE, reg1=42, value = 200),
-            VmCodeInstruction(Opcode.AND, VmDataType.WORD, reg1=42, value = 60000),
-            VmCodeInstruction(Opcode.OR, VmDataType.BYTE, reg1=42, value = 1),
-            VmCodeInstruction(Opcode.XOR, VmDataType.BYTE, reg1=42, value = 1)
-        ))
-        asm.lines().size shouldBe 8
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 4
-    }
-
-    test("replace and/or/xor by constant number") {
-        val(asm, _) = makeVmProgram(listOf(
-            VmCodeInstruction(Opcode.AND, VmDataType.BYTE, reg1=42, value = 0),
-            VmCodeInstruction(Opcode.AND, VmDataType.WORD, reg1=42, value = 0),
-            VmCodeInstruction(Opcode.OR, VmDataType.BYTE, reg1=42, value = 255),
-            VmCodeInstruction(Opcode.OR, VmDataType.WORD, reg1=42, value = 65535)
-        ))
-        asm.lines().size shouldBe 4
-        val opt = VmPeepholeOptimizer(asm)
-        opt.optimize()
-        val lines = asm.lines()
-        lines.size shouldBe 4
-        (lines[0] as VmCodeInstruction).ins.opcode shouldBe Opcode.LOAD
-        (lines[1] as VmCodeInstruction).ins.opcode shouldBe Opcode.LOAD
-        (lines[2] as VmCodeInstruction).ins.opcode shouldBe Opcode.LOAD
-        (lines[3] as VmCodeInstruction).ins.opcode shouldBe Opcode.LOAD
-        (lines[0] as VmCodeInstruction).ins.value shouldBe 0
-        (lines[1] as VmCodeInstruction).ins.value shouldBe 0
-        (lines[2] as VmCodeInstruction).ins.value shouldBe 255
-        (lines[3] as VmCodeInstruction).ins.value shouldBe 65535
-    }
-})

codeOptimizers/src/prog8/optimizer/ExpressionSimplifier.kt

@@ -6,7 +6,10 @@ import prog8.ast.Program
 import prog8.ast.base.FatalAstException
 import prog8.ast.expressions.*
 import prog8.ast.maySwapOperandOrder
-import prog8.ast.statements.*
+import prog8.ast.statements.AnonymousScope
+import prog8.ast.statements.Assignment
+import prog8.ast.statements.IfElse
+import prog8.ast.statements.Jump
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
 import prog8.code.core.*
@@ -17,7 +20,9 @@ import kotlin.math.pow
 
 // TODO add more peephole expression optimizations? Investigate what optimizations binaryen has, also see  https://egorbo.com/peephole-optimizations.html
 
-class ExpressionSimplifier(private val program: Program, private val compTarget: ICompilationTarget) : AstWalker() {
+class ExpressionSimplifier(private val program: Program,
+                           private val errors: IErrorReporter,
+                           private val compTarget: ICompilationTarget) : AstWalker() {
     private val powersOfTwo = (1..16).map { (2.0).pow(it) }.toSet()
     private val negativePowersOfTwo = powersOfTwo.map { -it }.toSet()
 
@@ -583,11 +588,13 @@ class ExpressionSimplifier(private val program: Program, private val compTarget:
         when (val targetDt = targetIDt.getOr(DataType.UNDEFINED)) {
             DataType.UBYTE, DataType.BYTE -> {
                 if (amount >= 8) {
+                    errors.warn("shift always results in 0", expr.position)
                     return NumericLiteral(targetDt, 0.0, expr.position)
                 }
             }
             DataType.UWORD, DataType.WORD -> {
                 if (amount >= 16) {
+                    errors.warn("shift always results in 0", expr.position)
                     return NumericLiteral(targetDt, 0.0, expr.position)
                 }
                 else if(amount==8) {
@@ -622,6 +629,7 @@ class ExpressionSimplifier(private val program: Program, private val compTarget:
         when (idt.getOr(DataType.UNDEFINED)) {
             DataType.UBYTE -> {
                 if (amount >= 8) {
+                    errors.warn("shift always results in 0", expr.position)
                     return NumericLiteral.optimalInteger(0, expr.position)
                 }
             }
@@ -633,6 +641,7 @@ class ExpressionSimplifier(private val program: Program, private val compTarget:
             }
             DataType.UWORD -> {
                 if (amount >= 16) {
+                    errors.warn("shift always results in 0", expr.position)
                     return NumericLiteral.optimalInteger(0, expr.position)
                 }
                 else if(amount==8) {

codeOptimizers/src/prog8/optimizer/Extensions.kt

@@ -60,8 +60,8 @@ fun Program.inlineSubroutines(): Int {
     return inliner.applyModifications()
 }
 
-fun Program.simplifyExpressions(target: ICompilationTarget) : Int {
-    val opti = ExpressionSimplifier(this, target)
+fun Program.simplifyExpressions(errors: IErrorReporter, target: ICompilationTarget) : Int {
+    val opti = ExpressionSimplifier(this, errors, target)
     opti.visit(this)
     return opti.applyModifications()
 }

codeOptimizers/src/prog8/optimizer/Inliner.kt

@@ -38,6 +38,8 @@ class Inliner(val program: Program): AstWalker() {
                                 is Return -> {
                                     if(stmt.value is NumericLiteral)
                                         true
+                                    else if(stmt.value==null)
+                                        true
                                     else if (stmt.value is IdentifierReference) {
                                         makeFullyScoped(stmt.value as IdentifierReference)
                                         true

codeOptimizers/src/prog8/optimizer/StatementOptimizer.kt

@@ -97,11 +97,13 @@ class StatementOptimizer(private val program: Program,
         if(constvalue!=null) {
             return if(constvalue.asBooleanValue){
                 // always true -> keep only if-part
-                errors.warn("condition is always true", ifElse.condition.position)
+                if(!ifElse.definingModule.isLibrary)
+                    errors.warn("condition is always true", ifElse.condition.position)
                 listOf(IAstModification.ReplaceNode(ifElse, ifElse.truepart, parent))
             } else {
                 // always false -> keep only else-part
-                errors.warn("condition is always false", ifElse.condition.position)
+                if(!ifElse.definingModule.isLibrary)
+                    errors.warn("condition is always false", ifElse.condition.position)
                 listOf(IAstModification.ReplaceNode(ifElse, ifElse.elsepart, parent))
             }
         }
@@ -291,9 +293,9 @@ class StatementOptimizer(private val program: Program,
         val bexpr=assignment.value as? BinaryExpression
         if(bexpr!=null) {
             val rightCv = bexpr.right.constValue(program)?.number
-            if(bexpr.operator=="-" && rightCv==null) {
-                if(bexpr.right isSameAs assignment.target) {
-                    // X = value - X  -->  X = -X ; X += value  (to avoid need of stack-evaluation)
+            if(bexpr.operator=="-" && rightCv==null && targetIDt.isInteger) {
+                if(bexpr.right.isSimple && bexpr.right isSameAs assignment.target) {
+                    // X = value - X  -->  X = -X ; X += value  (to avoid need of stack-evaluation, for integers)
                     val negation = PrefixExpression("-", bexpr.right.copy(), bexpr.position)
                     val addValue = Assignment(assignment.target.copy(), BinaryExpression(bexpr.right, "+", bexpr.left, bexpr.position), AssignmentOrigin.OPTIMIZER, assignment.position)
                     return listOf(

compiler/build.gradle

@@ -27,13 +27,13 @@ compileTestKotlin {
 def prog8version = rootProject.file('compiler/res/version.txt').text.trim()
 
 dependencies {
-    implementation project(':codeAst')
     implementation project(':codeCore')
     implementation project(':codeOptimizers')
     implementation project(':compilerAst')
     implementation project(':codeGenCpu6502')
-    implementation project(':codeGenVirtual')
+    implementation project(':codeGenIntermediate')
     implementation project(':codeGenExperimental')
+    implementation project(':virtualmachine')
     implementation 'org.antlr:antlr4-runtime:4.10.1'
     implementation "org.jetbrains.kotlin:kotlin-stdlib-jdk8"
     // implementation "org.jetbrains.kotlin:kotlin-reflect"

compiler/compiler.iml

@@ -17,11 +17,11 @@
     <orderEntry type="library" name="io.kotest.runner.junit5.jvm" level="project" />
     <orderEntry type="library" name="antlr.antlr4" level="project" />
     <orderEntry type="module" module-name="codeCore" />
-    <orderEntry type="module" module-name="codeAst" />
     <orderEntry type="module" module-name="compilerAst" />
     <orderEntry type="module" module-name="codeOptimizers" />
     <orderEntry type="module" module-name="codeGenCpu6502" />
     <orderEntry type="module" module-name="codeGenExperimental" />
-    <orderEntry type="module" module-name="codeGenVirtual" />
+    <orderEntry type="module" module-name="codeGenIntermediate" />
+    <orderEntry type="module" module-name="virtualmachine" />
   </component>
 </module>

compiler/res/prog8lib/c128/floats.p8

@@ -56,7 +56,8 @@ romsub $af4b = ROUND() clobbers(A,X,Y)                      ; round fac1
 romsub $af4e = ABS() clobbers(A,X,Y)                        ; fac1 = ABS(fac1)
 romsub $af51 = SIGN() clobbers(X,Y) -> ubyte @ A            ; SIGN(fac1) to A, $ff, $0, $1 for negative, zero, positive
 romsub $af54 = FCOMP(uword mflpt @ AY) clobbers(X,Y) -> ubyte @ A   ; A = compare fac1 to mflpt in A/Y, 0=equal 1=fac1 is greater, 255=fac1 is less than
-romsub $af57 = RND_0() clobbers(A,X,Y)                      ; fac1 = RND(fac1) float random number generator  NOTE: special cx16 setup required, use RND() stub instead!!
+romsub $af57 = RND_0() clobbers(A,X,Y)                      ; fac1 = RND(fac1) float random number generator
+romsub $af57 = RND() clobbers(A,X,Y)                        ; alias for RND_0
 romsub $af5a = CONUPK(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory  in A/Y into fac2
 romsub $af5d = ROMUPK(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory in current bank in A/Y into fac2
 romsub $af60 = MOVFRM(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory in A/Y into fac1  (use MOVFM instead)
@@ -151,6 +152,17 @@ asmsub  FREADUY (ubyte value @Y) {
 
 &uword AYINT_facmo = $66      ; $66/$67 contain result of AYINT
 
+sub rndf() -> float {
+    %asm {{
+        stx  P8ZP_SCRATCH_REG
+        lda  #1
+        jsr  RND_0
+        ldx  P8ZP_SCRATCH_REG
+        rts
+    }}
+}
+
+
 %asminclude "library:c128/floats.asm"
 %asminclude "library:c64/floats_funcs.asm"
 

compiler/res/prog8lib/c64/floats.p8

@@ -171,6 +171,18 @@ asmsub  GETADRAY  () clobbers(X) -> uword @ AY  {
 
 &uword AYINT_facmo = $64      ; $64/$65 contain result of AYINT
 
+sub rndf() -> float {
+    %asm {{
+        stx  P8ZP_SCRATCH_REG
+        lda  #1
+        jsr  FREADSA
+        jsr  RND		; rng into fac1
+        ldx  P8ZP_SCRATCH_REG
+        rts
+    }}
+}
+
+
 %asminclude "library:c64/floats.asm"
 %asminclude "library:c64/floats_funcs.asm"
 

compiler/res/prog8lib/cx16/cx16diskio.p8

@@ -37,14 +37,19 @@ cx16diskio {
     asmsub vload(str name @R0, ubyte device @Y, ubyte bank @A, uword address @R1) -> ubyte @A {
         ; -- like the basic command VLOAD "filename",device,bank,address
         ;    loads a file into Vera's video memory in the given bank:address, returns success in A
+        ;    the file has to have the usual 2 byte header (which will be skipped)
         %asm {{
-            ; -- load a file into video ram
+            clc
+internal_vload:
             phx
             pha
             tya
             tax
-            lda  #1
-            ldy  #0
+            bcc +
+            ldy  #%00000010     ; headerless load mode
+            bne  ++
++           ldy  #0             ; normal load mode
++           lda  #1
             jsr  c64.SETLFS
             lda  cx16.r0
             ldy  cx16.r0+1
@@ -71,6 +76,15 @@ cx16diskio {
         }}
     }
 
+    asmsub vload_raw(str name @R0, ubyte device @Y, ubyte bank @A, uword address @R1) -> ubyte @A {
+        ; -- like the basic command BVLOAD "filename",device,bank,address
+        ;    loads a file into Vera's video memory in the given bank:address, returns success in A
+        ;    the file is read fully including the first two bytes.
+        %asm {{
+            sec
+            jmp  vload.internal_vload
+        }}
+    }
 
     ; replacement function that makes use of fast block read capability of the X16
     ; use this in place of regular diskio.f_read()
@@ -97,7 +111,7 @@ cx16diskio {
             size = 255
             if num_bytes<size
                 size = num_bytes
-            size = cx16.macptr(lsb(size), bufferpointer)
+            size = cx16.macptr(lsb(size), bufferpointer, false)
             if_cs
                 goto byte_read_loop     ; macptr block read not supported, do fallback loop
             diskio.list_blocks += size

compiler/res/prog8lib/cx16/floats.p8

@@ -57,7 +57,8 @@ romsub $fe4b = ROUND() clobbers(A,X,Y)                      ; round fac1
 romsub $fe4e = ABS() clobbers(A,X,Y)                        ; fac1 = ABS(fac1)
 romsub $fe51 = SIGN() clobbers(X,Y) -> ubyte @ A            ; SIGN(fac1) to A, $ff, $0, $1 for negative, zero, positive
 romsub $fe54 = FCOMP(uword mflpt @ AY) clobbers(X,Y) -> ubyte @ A   ; A = compare fac1 to mflpt in A/Y, 0=equal 1=fac1 is greater, 255=fac1 is less than
-romsub $fe57 = RND_0() clobbers(A,X,Y)                      ; fac1 = RND(fac1) float random number generator  NOTE: special cx16 setup required, use RND() stub instead!!
+romsub $fe57 = RND_0() clobbers(A,X,Y)                      ; fac1 = RND(fac1) float random number generator  NOTE: incompatible with C64's RND routine
+romsub $fe57 = RND() clobbers(A,X,Y)                        ; alias for RND_0
 romsub $fe5a = CONUPK(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory in A/Y into fac2
 romsub $fe5d = ROMUPK(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory in current bank in A/Y into fac2
 romsub $fe60 = MOVFRM(uword mflpt @ AY) clobbers(A,X,Y)     ; load mflpt value from memory in A/Y into fac1  (use MOVFM instead)
@@ -147,19 +148,21 @@ asmsub  FREADUY (ubyte value @Y) {
     }}
 }
 
-asmsub  RND() clobbers(A,X,Y) {
-    %asm {{
-        lda  #0
-        php
-        jsr  cx16.entropy_get
-        plp
-        jmp  RND_0
-    }}
-}
 
 &uword AYINT_facmo = $c6      ; $c6/$c7 contain result of AYINT
 
+sub rndf() -> float {
+    %asm {{
+        phx
+        lda  #1
+        jsr  RND_0
+        plx
+        rts
+    }}
+}
+
 %asminclude "library:c64/floats.asm"
 %asminclude "library:c64/floats_funcs.asm"
 
+
 }

compiler/res/prog8lib/cx16/gfx2.p8

@@ -366,7 +366,7 @@ _done
                 position2(x,y,true)
                 set_both_strides(13)    ; 160 increment = 1 line in 640 px 4c mode
                 color &= 3
-                color <<= gfx2.plot.shift4c[lsb(x) & 3]
+                color <<= gfx2.plot.shift4c[lsb(x) & 3]         ; TODO with lookup table
                 ubyte @shared mask = gfx2.plot.mask4c[lsb(x) & 3]
                 repeat lheight {
                     %asm {{
@@ -561,7 +561,11 @@ _done
                     and  #1
                 }}
                 if_nz {
-                    cx16.r0L = lsb(x) & 7       ; xbits
+                    %asm {{
+                        lda  x
+                        and  #7
+                        pha     ; xbits
+                    }}
                     x /= 8
                     x += y*(320/8)
                     %asm {{
@@ -571,7 +575,7 @@ _done
                         sta  cx16.VERA_ADDR_M
                         lda  x
                         sta  cx16.VERA_ADDR_L
-                        ldy  cx16.r0L       ; xbits
+                        ply         ; xbits
                         lda  bits,y
                         ldy  color
                         beq  +
@@ -608,7 +612,11 @@ _done
                     and  #1
                 }}
                 if_nz {
-                    cx16.r0L = lsb(x) & 7       ; xbits
+                    %asm {{
+                        lda  x
+                        and  #7
+                        pha     ; xbits
+                    }}
                     x /= 8
                     x += y*(640/8)
                     %asm {{
@@ -618,7 +626,7 @@ _done
                         sta  cx16.VERA_ADDR_M
                         lda  x
                         sta  cx16.VERA_ADDR_L
-                        ldy  cx16.r0L           ; xbits
+                        ply     ; xbits
                         lda  bits,y
                         ldy  color
                         beq  +
@@ -635,7 +643,7 @@ _done
                 void addr_mul_24_for_highres_4c(y, x)      ; 24 bits result is in r0 and r1L (highest byte)
                 cx16.r2L = lsb(x) & 3       ; xbits
                 color &= 3
-                color <<= shift4c[cx16.r2L]
+                color <<= shift4c[cx16.r2L]     ; TODO with lookup table
                 %asm {{
                     stz  cx16.VERA_CTRL
                     lda  cx16.r1L
@@ -654,6 +662,93 @@ _done
         }
     }
 
+    sub pget(uword @zp x, uword y) -> ubyte {
+        when active_mode {
+            1 -> {
+                ; lores monochrome
+                %asm {{
+                    lda  x
+                    and  #7
+                    pha     ; xbits
+                }}
+                x /= 8
+                x += y*(320/8)
+                %asm {{
+                    stz  cx16.VERA_CTRL
+                    stz  cx16.VERA_ADDR_H
+                    lda  x+1
+                    sta  cx16.VERA_ADDR_M
+                    lda  x
+                    sta  cx16.VERA_ADDR_L
+                    ply         ; xbits
+                    lda  plot.bits,y
+                    and  cx16.VERA_DATA0
+                    beq  +
+                    lda  #1
++
+                }}
+            }
+            ; TODO mode 2 and 3
+            4 -> {
+                ; lores 256c
+                void addr_mul_24_for_lores_256c(y, x)      ; 24 bits result is in r0 and r1L (highest byte)
+                %asm {{
+                    stz  cx16.VERA_CTRL
+                    lda  cx16.r1
+                    sta  cx16.VERA_ADDR_H
+                    lda  cx16.r0+1
+                    sta  cx16.VERA_ADDR_M
+                    lda  cx16.r0
+                    sta  cx16.VERA_ADDR_L
+                    lda  cx16.VERA_DATA0
+                }}
+            }
+            5 -> {
+                ; hires monochrome
+                %asm {{
+                    lda  x
+                    and  #7
+                    pha     ; xbits
+                }}
+                x /= 8
+                x += y*(640/8)
+                %asm {{
+                    stz  cx16.VERA_CTRL
+                    stz  cx16.VERA_ADDR_H
+                    lda  x+1
+                    sta  cx16.VERA_ADDR_M
+                    lda  x
+                    sta  cx16.VERA_ADDR_L
+                    ply     ; xbits
+                    lda  plot.bits,y
+                    and  cx16.VERA_DATA0
+                    beq  +
+                    lda  #1
++
+                }}
+            }
+            6 -> {
+                ; hires 4c
+                void addr_mul_24_for_highres_4c(y, x)      ; 24 bits result is in r0 and r1L (highest byte)
+                %asm {{
+                    stz  cx16.VERA_CTRL
+                    lda  cx16.r1L
+                    sta  cx16.VERA_ADDR_H
+                    lda  cx16.r0H
+                    sta  cx16.VERA_ADDR_M
+                    lda  cx16.r0L
+                    sta  cx16.VERA_ADDR_L
+                    lda  cx16.VERA_DATA0
+                    sta  cx16.r0L
+                }}
+                cx16.r1L = lsb(x) & 3
+                cx16.r0L >>= gfx2.plot.shift4c[cx16.r1L]        ; TODO with lookup table
+                return cx16.r0L & 3
+            }
+            else -> return 0
+        }
+    }
+
     sub position(uword @zp x, uword y) {
         ubyte bank
         when active_mode {
@@ -844,25 +939,28 @@ _done
             }
             6 -> {
                 ; hires 4c
+                ; we're going to use a few cx16 registers to make sure every variable is in zeropage in the inner loop.
+                cx16.r11L = color
+                cx16.r8 = y
                 while @(sctextptr) {
                     chardataptr = charset_addr + (@(sctextptr) as uword)*8
                     repeat 8 {
                         ; TODO rewrite this inner loop partly in assembly
                         ;      requires expanding the charbits to 2-bits per pixel (based on color)
                         ;      also it's way more efficient to draw whole horizontal spans instead of per-character
-                        ubyte charbits = cx16.vpeek(charset_bank, chardataptr)
+                        cx16.r9L = cx16.vpeek(charset_bank, chardataptr)  ; get the 8 horizontal character bits
+                        cx16.r7 = x
                         repeat 8 {
-                            charbits <<= 1
+                            cx16.r9L <<= 1
                             if_cs
-                                plot(x, y, color)
-                            x++
+                                plot(cx16.r7, cx16.r8, cx16.r11L)
+                            cx16.r7++
                         }
-                        x-=8
                         chardataptr++
-                        y++
+                        cx16.r8++
                     }
                     x+=8
-                    y-=8
+                    cx16.r8-=8
                     sctextptr++
                 }
             }

compiler/res/prog8lib/cx16/palette.p8

@@ -26,7 +26,7 @@ palette {
     }
 
     sub set_rgb(uword palette_words_ptr, uword num_colors) {
-        ; 1 word per color entry (in little endian format as layed out in video memory, so $gb0r)
+        ; 1 word per color entry (in little endian format as layed out in video memory, so $gb;$0r)
         vera_palette_ptr = $fa00
         repeat num_colors*2 {
             cx16.vpoke(1, vera_palette_ptr, @(palette_words_ptr))

compiler/res/prog8lib/cx16/psg.p8

@@ -15,6 +15,12 @@ psg {
     const ubyte RIGHT    = %10000000
 
     sub voice(ubyte voice_num, ubyte channel, ubyte volume, ubyte waveform, ubyte pulsewidth) {
+        ; -- Enables a 'voice' on the PSG.
+        ;    voice_num = 0-15, the voice number.
+        ;    channel = either LEFT or RIGHT or (LEFT|RIGHT). Specifies the stereo channel(s) to use.
+        ;    volume = 0-63, the starting volume for the voice
+        ;    waveform = one of PULSE,SAWTOOTH,TRIANGLE,NOISE.
+        ;    pulsewidth = 0-63.  Specifies the pulse width for waveform=PULSE.
         envelope_states[voice_num] = 255
         cx16.r0 = $f9c2 + voice_num * 4
         cx16.VERA_CTRL = 0
@@ -30,12 +36,15 @@ psg {
 
 ;    sub freq_hz(ubyte voice_num, float hertz) {
 ;        ; this would rely on floating point math to convert hertz to vera frequency
-;        ; TODO should be replaced by integer math maybe with a lookup table?
+;        ; could be replaced by integer math maybe with a lookup table?
 ;        uword vera_freq = (hertz / 0.3725290298461914) as uword
 ;        freq(voice_num, vera_freq)
 ;    }
 
     sub freq(ubyte voice_num, uword vera_freq) {
+        ; -- Changes the frequency of the voice's sound.
+        ;    voice_num = 0-15,  vera_freq = 0-65535  calculate this via the formula given in the Vera's PSG documentation.
+        ;    (https://github.com/commanderx16/x16-docs/blob/master/VERA%20Programmer's%20Reference.md)
         cx16.r0 = $f9c0 + voice_num * 4
         cx16.VERA_CTRL = 0
         cx16.VERA_ADDR_L = lsb(cx16.r0)
@@ -47,6 +56,8 @@ psg {
     }
 
     sub volume(ubyte voice_num, ubyte vol) {
+        ; -- Modifies the volume of this voice.
+        ;    voice_num = 0-15, vol = 0-63 where 0=silent, 63=loudest.
         cx16.r0 = $f9c2 + voice_num * 4
         cx16.vpoke(1, cx16.r0, cx16.vpeek(1, cx16.r0) & %11000000 | vol)
         envelope_volumes[voice_num] = mkword(vol, 0)
@@ -54,11 +65,18 @@ psg {
     }
 
     sub pulse_width(ubyte voice_num, ubyte pw) {
+        ; -- Modifies the pulse width of this voice (when waveform=PULSE)
+        ;    voice_num = 0-15, pw = 0-63  where 0=narrow, 63=50%cycle so square wave.
         cx16.r0 = $f9c3 + voice_num * 4
         cx16.vpoke(1, cx16.r0, cx16.vpeek(1, cx16.r0) & %11000000 | pw)
     }
 
     sub envelope(ubyte voice_num, ubyte maxvolume, ubyte attack, ubyte sustain, ubyte release) {
+        ; -- Enables AttackSustainRelease volume envelope for a voice.
+        ;    Note: this requires setting up envelopes_irq() as well, read its description.
+        ;    voice_num = 0-15   maxvolume = 0-63
+        ;    attack, sustain, release = 0-255 that determine the speed of the A/D/R.
+        ;    TODO describe how the speeds are calculated. For now, experiment. Higher values means *slower* enveloping.
         envelope_states[voice_num] = 255
         envelope_attacks[voice_num] = attack
         envelope_sustains[voice_num] = sustain
@@ -73,6 +91,7 @@ psg {
     }
 
     sub silent() {
+        ; -- Shut down all PSG voices.
         for cx16.r1L in 0 to 15 {
             envelope_states[cx16.r1L] = 255
             envelope_volumes[cx16.r1L] = 0

compiler/res/prog8lib/cx16/syslib.p8

@@ -363,12 +363,13 @@ romsub $fed5 = console_set_paging_message(uword msgptr @R0)  clobbers(A,X,Y)
 romsub $fecf = entropy_get() -> ubyte @A, ubyte @X, ubyte @Y
 romsub $fecc = monitor()  clobbers(A,X,Y)
 
-romsub $ff44 = macptr(ubyte length @A, uword buffer @XY)  clobbers(A) -> ubyte @Pc, uword @XY
+romsub $ff44 = macptr(ubyte length @A, uword buffer @XY, bool dontAdvance @Pc)  clobbers(A) -> bool @Pc, uword @XY
 romsub $ff47 = enter_basic(ubyte cold_or_warm @Pc)  clobbers(A,X,Y)
 romsub $ff4d = clock_set_date_time(uword yearmonth @R0, uword dayhours @R1, uword minsecs @R2, ubyte jiffies @R3)  clobbers(A, X, Y)
 romsub $ff50 = clock_get_date_time()  clobbers(A, X, Y)  -> uword @R0, uword @R1, uword @R2, ubyte @R3   ; result registers see clock_set_date_time()
 
 ; keyboard, mouse, joystick
+; note: also see the kbdbuf_clear() helper routine below!
 romsub $febd = kbdbuf_peek() -> ubyte @A, ubyte @X     ; key in A, queue length in X
 romsub $febd = kbdbuf_peek2() -> uword @AX             ; alternative to above to not have the hassle to deal with multiple return values
 romsub $fec0 = kbdbuf_get_modifiers() -> ubyte @A
@@ -380,12 +381,22 @@ romsub $ff53 = joystick_scan()  clobbers(A, X, Y)
 romsub $ff56 = joystick_get(ubyte joynr @A) -> ubyte @A, ubyte @X, ubyte @Y
 romsub $ff56 = joystick_get2(ubyte joynr @A) clobbers(Y) -> uword @AX   ; alternative to above to not have the hassle to deal with multiple return values
 
+asmsub kbdbuf_clear() {
+    ; -- convenience helper routine to clear the keyboard buffer
+    %asm {{
+-       jsr  c64.GETIN
+        bne  -
+        rts
+    }}
+}
+
 asmsub mouse_config2(ubyte shape @A) clobbers (A, X, Y) {
     ; -- convenience wrapper function that handles the screen resolution for mouse_config() for you
     %asm {{
+        pha                         ; save shape
         sec
         jsr  cx16.screen_mode       ; set current screen mode and res in A, X, Y
-        lda  #1
+        pla                         ; get shape back
         jmp  cx16.mouse_config
     }}
 }

compiler/res/prog8lib/floats_functions.p8

@@ -221,13 +221,18 @@ sub ceil(float value) -> float {
     }}
 }
 
-sub rndf() -> float {
+sub rndseedf(float seed) {
+    if seed>0
+        seed = -seed    ; make sure fp seed is always negative
+
     %asm {{
-        stx  P8ZP_SCRATCH_REG
-        lda  #1
-        jsr  FREADSA
-        jsr  RND		; rng into fac1
-        ldx  P8ZP_SCRATCH_REG
+        stx  floats_store_reg
+        lda  #<seed
+        ldy  #>seed
+        jsr  MOVFM		; load float into fac1
+        lda  #-1
+        jsr  floats.RND
+        ldx  floats_store_reg
         rts
     }}
 }

compiler/res/prog8lib/math.asm

@@ -229,60 +229,32 @@ _divisor	.word 0
 		.pend
 
 
-randseed	.proc
-	; -- reset the random seeds for the byte and word random generators
-	;    arguments: uword seed in A/Y   clobbers A
-	;    (default starting values are:  A=$2c Y=$9e)
-		sta  randword._seed
-		sty  randword._seed+1
-		clc
-		adc  #14
-		sta  randbyte._seed
-		rts
-		.pend
-
-
-randbyte        .proc
-	; -- 8 bit pseudo random number generator into A (by just reusing randword)
-		jmp  randword
-		.pend
-
 randword	.proc
 	; -- 16 bit pseudo random number generator into AY
-
-		; rand64k       ;Factors of 65535: 3 5 17 257
-		lda sr1+1
-		asl a
-		asl a
-		eor sr1+1
-		asl a
-		eor sr1+1
-		asl a
-		asl a
-		eor sr1+1
-		asl a
-		rol sr1         ;shift this left, "random" bit comes from low
-		rol sr1+1
-		; rand32k       ;Factors of 32767: 7 31 151 are independent and can be combined
-		lda sr2+1
-		asl a
-		eor sr2+1
-		asl a
-		asl a
-		ror sr2         ;shift this right, random bit comes from high - nicer when eor with sr1
-		rol sr2+1
-		lda sr1+1         ;can be left out
-		eor sr2+1         ;if you dont use
-		tay               ;y as suggested
-		lda sr1           ;mix up lowbytes of SR1
-		eor sr2           ;and SR2 to combine both
+	;    default seed = $00c2 $1137
+        ;    routine from https://codebase64.org/doku.php?id=base:x_abc_random_number_generator_8_16_bit
+		inc x1
+		clc
+x1=*+1
+		lda #$00	;x1
+c1=*+1
+		eor #$c2	;c1
+a1=*+1
+		eor #$11	;a1
+		sta a1
+b1=*+1
+		adc #$37	;b1
+		sta b1
+		lsr a
+		eor a1
+		adc c1
+		sta c1
+		ldy b1
 		rts
-
-sr1     	.word $a55a
-sr2     	.word $7653
-
 		.pend
 
+randbyte = randword    ; -- 8 bit pseudo random number generator into A (by just reusing randword)
+
 
 ; ----------- optimized multiplications (stack) : ---------
 stack_mul_byte_3	.proc

compiler/res/prog8lib/math.p8

@@ -37,60 +37,6 @@ _sinecos8	.char  trunc(127.0 * sin(range(256+64) * rad(360.0/256.0)))
         }}
     }
 
-    asmsub sin16(ubyte angle @A) -> word @AY {
-        %asm {{
-		tay
-		lda  _sinecos8lo,y
-		pha
-		lda  _sinecos8hi,y
-		tay
-		pla
-		rts
-_  :=  trunc(32767.0 * sin(range(256+64) * rad(360.0/256.0)))
-_sinecos8lo     .byte  <_
-_sinecos8hi     .byte  >_
-        }}
-    }
-
-    asmsub cos16(ubyte angle @A) -> word @AY {
-        %asm {{
-		tay
-		lda  sin16._sinecos8lo+64,y
-		pha
-		lda  sin16._sinecos8hi+64,y
-		tay
-		pla
-		rts
-        }}
-    }
-
-    asmsub sin16u(ubyte angle @A) -> uword @AY {
-        %asm {{
-		tay
-		lda  _sinecos8ulo,y
-		pha
-		lda  _sinecos8uhi,y
-		tay
-		pla
-		rts
-_  :=  trunc(32768.0 + 32767.5 * sin(range(256+64) * rad(360.0/256.0)))
-_sinecos8ulo     .byte  <_
-_sinecos8uhi     .byte  >_
-        }}
-    }
-
-    asmsub cos16u(ubyte angle @A) -> uword @AY {
-        %asm {{
-		tay
-		lda  sin16u._sinecos8ulo+64,y
-		pha
-		lda  sin16u._sinecos8uhi+64,y
-		tay
-		pla
-		rts
-        }}
-    }
-
     asmsub sinr8u(ubyte radians @A) clobbers(Y) -> ubyte @A {
         %asm {{
 		tay
@@ -125,57 +71,28 @@ _sinecosR8	.char  trunc(127.0 * sin(range(180+45) * rad(360.0/180.0)))
         }}
     }
 
-    asmsub sinr16(ubyte radians @A) -> word @AY {
+    asmsub rnd() -> ubyte @A {
         %asm {{
-		tay
-		lda  _sinecosR8lo,y
-		pha
-		lda  _sinecosR8hi,y
-		tay
-		pla
-		rts
-_  :=  trunc(32767.0 * sin(range(180+45) * rad(360.0/180.0)))
-_sinecosR8lo     .byte  <_
-_sinecosR8hi     .byte  >_
+            jmp  math.randbyte
         }}
     }
 
-    asmsub cosr16(ubyte radians @A) -> word @AY {
+    asmsub rndw() -> uword @AY {
         %asm {{
-		tay
-		lda  sinr16._sinecosR8lo+45,y
-		pha
-		lda  sinr16._sinecosR8hi+45,y
-		tay
-		pla
-		rts
+            jmp  math.randword
         }}
     }
 
-    asmsub sinr16u(ubyte radians @A) -> uword @AY {
+    asmsub rndseed(uword seed1 @AY, uword seed2 @R0) clobbers(A,Y) {
+        ; -- set new pseudo RNG's seed values. Defaults are: $00c2, $1137
         %asm {{
-		tay
-		lda  _sinecosR8ulo,y
-		pha
-		lda  _sinecosR8uhi,y
-		tay
-		pla
-		rts
-_  :=  trunc(32768.0 + 32767.5 * sin(range(180+45) * rad(360.0/180.0)))
-_sinecosR8ulo     .byte  <_
-_sinecosR8uhi     .byte  >_
-        }}
-    }
-
-    asmsub cosr16u(ubyte radians @A) -> uword @AY {
-        %asm {{
-		tay
-		lda  sinr16u._sinecosR8ulo+45,y
-		pha
-		lda  sinr16u._sinecosR8uhi+45,y
-		tay
-		pla
-		rts
+            sta  math.randword.x1
+            sty  math.randword.c1
+            lda  cx16.r0L
+            sta  math.randword.a1
+            lda  cx16.r0H
+            sta  math.randword.b1
+            rts
         }}
     }
 }

compiler/res/prog8lib/prog8_funcs.asm

@@ -244,24 +244,6 @@ func_sqrt16_into_A	.proc
 		rts
 		.pend
 
-func_rnd_stack	.proc
-	; -- put a random ubyte on the estack
-		jsr  math.randbyte
-		sta  P8ESTACK_LO,x
-		dex
-		rts
-		.pend
-
-func_rndw_stack	.proc
-	; -- put a random uword on the estack
-		jsr  math.randword
-		sta  P8ESTACK_LO,x
-		tya
-		sta  P8ESTACK_HI,x
-		dex
-		rts
-		.pend
-
 
 func_sort_ub	.proc
 		; 8bit unsigned sort

compiler/res/prog8lib/string.p8

@@ -224,6 +224,29 @@ _done       rts
         }}
     }
 
+    asmsub lowerchar(ubyte char @A) -> ubyte @A {
+        %asm {{
+            and  #$7f
+            cmp  #97
+            bcc  +
+            cmp  #123
+            bcs  +
+            and  #%11011111
++           rts
+        }}
+    }
+
+    asmsub upperchar(ubyte char @A) -> ubyte @A {
+        %asm {{
+            cmp  #65
+            bcc  +
+            cmp  #91
+            bcs  +
+            ora  #%00100000
++           rts
+        }}
+    }
+
     sub startswith(str st, str prefix) -> bool {
         ubyte prefix_len = length(prefix)
         ubyte str_len = length(st)

compiler/res/prog8lib/virtual/conv.p8

@@ -195,8 +195,8 @@ sub  str2uword(str string) -> uword {
     ; -- returns the unsigned word value of the string number argument in AY
     ;    the number may NOT be preceded by a + sign and may NOT contain spaces
     ;    (any non-digit character will terminate the number string that is parsed)
-    %asm {{
-        loadm.w r0, {conv.str2uword.string}
+    %ir {{
+        loadm.w r65500,conv.str2uword.string
         syscall 11
         return
     }}
@@ -206,8 +206,8 @@ sub  str2word(str string) -> word {
     ; -- returns the signed word value of the string number argument in AY
     ;    the number may be preceded by a + or - sign but may NOT contain spaces
     ;    (any non-digit character will terminate the number string that is parsed)
-    %asm {{
-        loadm.w r0, {conv.str2word.string}
+    %ir {{
+        loadm.w r65500,conv.str2word.string
         syscall 12
         return
     }}

compiler/res/prog8lib/virtual/floats.p8

@@ -9,81 +9,81 @@ floats {
 
 sub print_f(float value) {
     ; ---- prints the floating point value (without a newline).
-    %asm {{
-        loadm.f fr0,{floats.print_f.value}
+    %ir {{
+        loadm.f fr65500,floats.print_f.value
         syscall 25
         return
     }}
 }
 
 sub pow(float value, float power) -> float {
-    %asm {{
-        loadm.f fr0,{floats.pow.value}
-        loadm.f fr1,{floats.pow.power}
+    %ir {{
+        loadm.f fr0,floats.pow.value
+        loadm.f fr1,floats.pow.power
         fpow.f fr0,fr1
         return
     }}
 }
 
 sub fabs(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.fabs.value}
+    %ir {{
+        loadm.f fr0,floats.fabs.value
         fabs.f fr0,fr0
         return
     }}
 }
 
 sub sin(float angle) -> float {
-    %asm {{
-        loadm.f fr0,{floats.sin.angle}
+    %ir {{
+        loadm.f fr0,floats.sin.angle
         fsin.f fr0,fr0
         return
     }}
 }
 
 sub cos(float angle) -> float {
-    %asm {{
-        loadm.f fr0,{floats.cos.angle}
+    %ir {{
+        loadm.f fr0,floats.cos.angle
         fcos.f fr0,fr0
         return
     }}
 }
 
 sub tan(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.tan.value}
+    %ir {{
+        loadm.f fr0,floats.tan.value
         ftan.f fr0,fr0
         return
     }}
 }
 
 sub atan(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.atan.value}
+    %ir {{
+        loadm.f fr0,floats.atan.value
         fatan.f fr0,fr0
         return
     }}
 }
 
 sub ln(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.ln.value}
+    %ir {{
+        loadm.f fr0,floats.ln.value
         fln.f fr0,fr0
         return
     }}
 }
 
 sub log2(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.log2.value}
+    %ir {{
+        loadm.f fr0,floats.log2.value
         flog.f fr0,fr0
         return
     }}
 }
 
 sub sqrt(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.sqrt.value}
+    %ir {{
+        loadm.f fr0,floats.sqrt.value
         sqrt.f fr0,fr0
         return
     }}
@@ -100,16 +100,16 @@ sub deg(float angle) -> float {
 }
 
 sub round(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.round.value}
+    %ir {{
+        loadm.f fr0,floats.round.value
         fround.f fr0,fr0
         return
     }}
 }
 
 sub floor(float value) -> float {
-    %asm {{
-        loadm.f fr0,{floats.floor.value}
+    %ir {{
+        loadm.f fr0,floats.floor.value
         ffloor.f fr0,fr0
         return
     }}
@@ -117,17 +117,25 @@ sub floor(float value) -> float {
 
 sub ceil(float value) -> float {
     ; -- ceil: tr = int(f); if tr==f -> return  else return tr+1
-    %asm {{
-        loadm.f fr0,{floats.ceil.value}
+    %ir {{
+        loadm.f fr0,floats.ceil.value
         fceil.f fr0,fr0
         return
     }}
 }
 
 sub rndf() -> float {
-    %asm {{
-        rnd.f fr0
+    %ir {{
+        syscall 35
         return
     }}
 }
+
+sub rndseedf(float seed) {
+    %ir {{
+        loadm.f  fr65500,floats.rndseedf.seed
+        syscall 32
+    }}
+}
+
 }

compiler/res/prog8lib/virtual/math.p8

@@ -19,7 +19,7 @@ math {
                              $0f, $11, $12, $14, $15, $17, $19, $1b, $1d, $1f, $21, $23, $25, $28, $2a, $2c,
                              $2f, $31, $34, $36, $39, $3b, $3e, $41, $43, $46, $49, $4c, $4f, $52, $55, $58,
                              $5a, $5d, $61, $64, $67, $6a, $6d, $70, $73, $76, $79, $7c]
-       return sintab[angle]
+        return sintab[angle]
     }
 
     sub cos8u(ubyte angle) -> ubyte {
@@ -40,31 +40,53 @@ math {
                              $bc, $be, $c1, $c4, $c6, $c9, $cb, $ce, $d0, $d3, $d5, $d7, $da, $dc, $de, $e0,
                              $e2, $e4, $e6, $e8, $ea, $eb, $ed, $ee, $f0, $f1, $f3, $f4, $f5, $f6, $f8, $f9,
                              $fa, $fa, $fb, $fc, $fd, $fd, $fe, $fe, $fe, $ff, $ff, $ff ]
-       return costab[angle]
+        return costab[angle]
     }
 
     sub sin8(ubyte angle) -> byte {
-        return 42     ; TODO
+        ubyte[256] sintab = [
+            $00, $03, $06, $09,
+            $0c, $0f, $12, $15, $18, $1b, $1e, $21, $24, $27, $2a, $2d, $30, $33, $36, $39,
+            $3b, $3e, $41, $43, $46, $49, $4b, $4e, $50, $52, $55, $57, $59, $5b, $5e, $60,
+            $62, $64, $66, $67, $69, $6b, $6c, $6e, $70, $71, $72, $74, $75, $76, $77, $78,
+            $79, $7a, $7b, $7b, $7c, $7d, $7d, $7e, $7e, $7e, $7e, $7e, $7f, $7e, $7e, $7e,
+            $7e, $7e, $7d, $7d, $7c, $7b, $7b, $7a, $79, $78, $77, $76, $75, $74, $72, $71,
+            $70, $6e, $6c, $6b, $69, $67, $66, $64, $62, $60, $5e, $5b, $59, $57, $55, $52,
+            $50, $4e, $4b, $49, $46, $43, $41, $3e, $3b, $39, $36, $33, $30, $2d, $2a, $27,
+            $24, $21, $1e, $1b, $18, $15, $12, $0f, $0c, $09, $06, $03, $00, $fd, $fa, $f7,
+            $f4, $f1, $ee, $eb, $e8, $e5, $e2, $df, $dc, $d9, $d6, $d3, $d0, $cd, $ca, $c7,
+            $c5, $c2, $bf, $bd, $ba, $b7, $b5, $b2, $b0, $ae, $ab, $a9, $a7, $a5, $a2, $a0,
+            $9e, $9c, $9a, $99, $97, $95, $94, $92, $90, $8f, $8e, $8c, $8b, $8a, $89, $88,
+            $87, $86, $85, $85, $84, $83, $83, $82, $82, $82, $82, $82, $81, $82, $82, $82,
+            $82, $82, $83, $83, $84, $85, $85, $86, $87, $88, $89, $8a, $8b, $8c, $8e, $8f,
+            $90, $92, $94, $95, $97, $99, $9a, $9c, $9e, $a0, $a2, $a5, $a7, $a9, $ab, $ae,
+            $b0, $b2, $b5, $b7, $ba, $bd, $bf, $c2, $c5, $c7, $ca, $cd, $d0, $d3, $d6, $d9,
+            $dc, $df, $e2, $e5, $e8, $eb, $ee, $f1, $f4, $f7, $fa, $fd
+        ]
+        return sintab[angle] as byte
     }
 
     sub cos8(ubyte angle) -> byte {
-        return 42     ; TODO
-    }
-
-    sub sin16(ubyte angle) -> word {
-        return 4242     ; TODO
-    }
-
-    sub cos16(ubyte angle) -> word {
-        return 4242     ; TODO
-    }
-
-    sub sin16u(ubyte angle) -> uword {
-        return 4242     ; TODO
-    }
-
-    sub cos16u(ubyte angle) -> uword {
-        return 4242     ; TODO
+        ubyte[256] costab = [
+            $7f, $7e, $7e, $7e,
+            $7e, $7e, $7d, $7d, $7c, $7b, $7b, $7a, $79, $78, $77, $76, $75, $74, $72, $71,
+            $70, $6e, $6c, $6b, $69, $67, $66, $64, $62, $60, $5e, $5b, $59, $57, $55, $52,
+            $50, $4e, $4b, $49, $46, $43, $41, $3e, $3b, $39, $36, $33, $30, $2d, $2a, $27,
+            $24, $21, $1e, $1b, $18, $15, $12, $0f, $0c, $09, $06, $03, $00, $fd, $fa, $f7,
+            $f4, $f1, $ee, $eb, $e8, $e5, $e2, $df, $dc, $d9, $d6, $d3, $d0, $cd, $ca, $c7,
+            $c5, $c2, $bf, $bd, $ba, $b7, $b5, $b2, $b0, $ae, $ab, $a9, $a7, $a5, $a2, $a0,
+            $9e, $9c, $9a, $99, $97, $95, $94, $92, $90, $8f, $8e, $8c, $8b, $8a, $89, $88,
+            $87, $86, $85, $85, $84, $83, $83, $82, $82, $82, $82, $82, $81, $82, $82, $82,
+            $82, $82, $83, $83, $84, $85, $85, $86, $87, $88, $89, $8a, $8b, $8c, $8e, $8f,
+            $90, $92, $94, $95, $97, $99, $9a, $9c, $9e, $a0, $a2, $a5, $a7, $a9, $ab, $ae,
+            $b0, $b2, $b5, $b7, $ba, $bd, $bf, $c2, $c5, $c7, $ca, $cd, $d0, $d3, $d6, $d9,
+            $dc, $df, $e2, $e5, $e8, $eb, $ee, $f1, $f4, $f7, $fa, $fd, $00, $03, $06, $09,
+            $0c, $0f, $12, $15, $18, $1b, $1e, $21, $24, $27, $2a, $2d, $30, $33, $36, $39,
+            $3b, $3e, $41, $43, $46, $49, $4b, $4e, $50, $52, $55, $57, $59, $5b, $5e, $60,
+            $62, $64, $66, $67, $69, $6b, $6c, $6e, $70, $71, $72, $74, $75, $76, $77, $78,
+            $79, $7a, $7b, $7b, $7c, $7d, $7d, $7e, $7e, $7e, $7e, $7e
+        ]
+        return costab[angle] as byte
     }
 
     sub sinr8u(ubyte radians) -> ubyte {
@@ -102,26 +124,62 @@ math {
     }
 
     sub sinr8(ubyte radians) -> byte {
-        return 42     ; TODO
+        ubyte[180] sintab = [
+            $00, $04, $08, $0d,
+            $11, $16, $1a, $1e, $23, $27, $2b, $2f, $33, $37, $3b, $3f, $43, $47, $4a, $4e,
+            $51, $54, $58, $5b, $5e, $61, $64, $66, $69, $6b, $6d, $70, $72, $74, $75, $77,
+            $78, $7a, $7b, $7c, $7d, $7d, $7e, $7e, $7e, $7f, $7e, $7e, $7e, $7d, $7d, $7c,
+            $7b, $7a, $78, $77, $75, $74, $72, $70, $6d, $6b, $69, $66, $64, $61, $5e, $5b,
+            $58, $54, $51, $4e, $4a, $47, $43, $3f, $3b, $37, $33, $2f, $2b, $27, $23, $1e,
+            $1a, $16, $11, $0d, $08, $04, $00, $fc, $f8, $f3, $ef, $ea, $e6, $e2, $dd, $d9,
+            $d5, $d1, $cd, $c9, $c5, $c1, $bd, $b9, $b6, $b2, $af, $ac, $a8, $a5, $a2, $9f,
+            $9c, $9a, $97, $95, $93, $90, $8e, $8c, $8b, $89, $88, $86, $85, $84, $83, $83,
+            $82, $82, $82, $81, $82, $82, $82, $83, $83, $84, $85, $86, $88, $89, $8b, $8c,
+            $8e, $90, $93, $95, $97, $9a, $9c, $9f, $a2, $a5, $a8, $ac, $af, $b2, $b6, $b9,
+            $bd, $c1, $c5, $c9, $cd, $d1, $d5, $d9, $dd, $e2, $e6, $ea, $ef, $f3, $f8, $fc
+        ]
+        return sintab[radians] as byte
     }
 
     sub cosr8(ubyte radians) -> byte {
-        return 42     ; TODO
+        ubyte[180] costab = [
+            $7f, $7e, $7e, $7e, $7d, $7d, $7c,
+            $7b, $7a, $78, $77, $75, $74, $72, $70, $6d, $6b, $69, $66, $64, $61, $5e, $5b,
+            $58, $54, $51, $4e, $4a, $47, $43, $3f, $3b, $37, $33, $2f, $2b, $27, $23, $1e,
+            $1a, $16, $11, $0d, $08, $04, $00, $fc, $f8, $f3, $ef, $ea, $e6, $e2, $dd, $d9,
+            $d5, $d1, $cd, $c9, $c5, $c1, $bd, $b9, $b6, $b2, $af, $ac, $a8, $a5, $a2, $9f,
+            $9c, $9a, $97, $95, $93, $90, $8e, $8c, $8b, $89, $88, $86, $85, $84, $83, $83,
+            $82, $82, $82, $81, $82, $82, $82, $83, $83, $84, $85, $86, $88, $89, $8b, $8c,
+            $8e, $90, $93, $95, $97, $9a, $9c, $9f, $a2, $a5, $a8, $ac, $af, $b2, $b6, $b9,
+            $bd, $c1, $c5, $c9, $cd, $d1, $d5, $d9, $dd, $e2, $e6, $ea, $ef, $f3, $f8, $fc,
+            $00, $04, $08, $0d, $11, $16, $1a, $1e, $23, $27, $2b, $2f, $33, $37, $3b, $3f,
+            $43, $47, $4a, $4e, $51, $54, $58, $5b, $5e, $61, $64, $66, $69, $6b, $6d, $70,
+            $72, $74, $75, $77, $78, $7a, $7b, $7c, $7d, $7d, $7e, $7e, $7e
+        ]
+        return costab[radians] as byte
     }
 
-    sub sinr16(ubyte radians) -> word {
-        return 4242     ; TODO
+    sub rnd() -> ubyte {
+        %ir {{
+            syscall 33
+            return
+        }}
     }
 
-    sub cosr16(ubyte radians) -> word {
-        return 4242     ; TODO
+    sub rndw() -> uword {
+        %ir {{
+            syscall 34
+            return
+        }}
     }
 
-    sub sinr16u(ubyte radians) -> uword {
-        return 4242     ; TODO
-    }
-
-    sub cosr16u(ubyte radians) -> uword {
-        return 4242     ; TODO
+    sub rndseed(uword seed1, uword seed2) {
+        ; -- reset the pseudo RNG's seed values. Defaults are: $a55a, $7653.
+        %ir {{
+            loadm.w r65500,math.rndseed.seed1
+            loadm.w r65501,math.rndseed.seed2
+            syscall 31
+            return
+        }}
     }
 }

compiler/res/prog8lib/virtual/prog8_lib.p8

@@ -1,53 +1,6 @@
 ; Internal library routines - always included by the compiler
 
-%import textio
-
 prog8_lib {
     %option force_output
 
-    sub string_contains(ubyte needle, str haystack) -> ubyte {
-        repeat {
-            if @(haystack)==0
-                return false
-            if @(haystack)==needle
-                return true
-            haystack++
-        }
-    }
-
-    sub bytearray_contains(ubyte needle, uword haystack_ptr, ubyte num_elements) -> ubyte {
-        haystack_ptr--
-        while num_elements {
-            if haystack_ptr[num_elements]==needle
-                return true
-            num_elements--
-        }
-        return false
-    }
-
-    sub wordarray_contains(ubyte needle, uword haystack_ptr, ubyte num_elements) -> ubyte {
-        haystack_ptr += (num_elements-1) * 2
-        while num_elements {
-            if peekw(haystack_ptr)==needle
-                return true
-            haystack_ptr -= 2
-            num_elements--
-        }
-        return false
-    }
-
-    sub string_compare(str st1, str st2) -> byte {
-        ; Compares two strings for sorting.
-        ; Returns -1 (255), 0 or 1 depending on wether string1 sorts before, equal or after string2.
-        ; Note that you can also directly compare strings and string values with eachother using
-        ; comparison operators ==, < etcetera (it will use strcmp for you under water automatically).
-        %asm {{
-            loadm.w r0, {prog8_lib.string_compare.st1}
-            loadm.w r1, {prog8_lib.string_compare.st2}
-            syscall 29
-            return
-        }}
-    }
-
 }
-

compiler/res/prog8lib/virtual/string.p8

@@ -83,7 +83,12 @@ string {
         ; Returns -1 (255), 0 or 1 depending on wether string1 sorts before, equal or after string2.
         ; Note that you can also directly compare strings and string values with eachother using
         ; comparison operators ==, < etcetera (it will use strcmp for you under water automatically).
-        return prog8_lib.string_compare(st1, st2)
+        %ir {{
+            loadm.w r65500,string.compare.st1
+            loadm.w r65501,string.compare.st2
+            syscall 29
+            return
+        }}
     }
 
     sub lower(str st) -> ubyte {
@@ -114,6 +119,18 @@ string {
         }
     }
 
+    sub lowerchar(ubyte char) -> ubyte {
+        if char >= 'A' and char <= 'Z'
+            char |= %00100000
+        return char
+    }
+
+    sub upperchar(ubyte char) -> ubyte {
+        if char >= 'a' and char <= 'z'
+            char &= %11011111
+        return char
+    }
+
     sub startswith(str st, str prefix) -> bool {
         ubyte prefix_len = length(prefix)
         ubyte str_len = length(st)

compiler/res/prog8lib/virtual/syslib.p8

@@ -7,22 +7,22 @@ sys {
 
     sub  reset_system()  {
         ; Soft-reset the system back to initial power-on Basic prompt.
-        %asm {{
+        %ir {{
             syscall 0
         }}
     }
 
     sub wait(uword jiffies) {
         ; --- wait approximately the given number of jiffies (1/60th seconds)
-        %asm {{
-            loadm.w r0, {sys.wait.jiffies}
+        %ir {{
+            loadm.w r65500,sys.wait.jiffies
             syscall 13
         }}
     }
 
     sub waitvsync() {
         ; --- busy wait till the next vsync has occurred (approximately), without depending on custom irq handling.
-        %asm {{
+        %ir {{
             syscall 14
         }}
     }
@@ -61,45 +61,52 @@ sys {
 
     sub exit(ubyte returnvalue) {
         ; -- immediately exit the program with a return code in the A register
-        %asm {{
-            loadm.b r0,{sys.exit.returnvalue}
+        %ir {{
+            loadm.b r65500,sys.exit.returnvalue
             syscall 1
         }}
     }
 
     sub set_carry() {
-        %asm {{
+        %ir {{
             sec
         }}
     }
 
     sub clear_carry() {
-        %asm {{
+        %ir {{
             clc
         }}
     }
 
 
     sub gfx_enable(ubyte mode) {
-        %asm {{
-            loadm.b r0, {sys.gfx_enable.mode}
+        %ir {{
+            loadm.b r65500,sys.gfx_enable.mode
             syscall 8
         }}
     }
 
+    sub gfx_clear(ubyte color) {
+        %ir {{
+            loadm.b r65500,sys.gfx_clear.color
+            syscall 9
+        }}
+    }
+
     sub gfx_plot(uword xx, uword yy, ubyte color) {
-        %asm {{
-            loadm.w r0, {sys.gfx_plot.xx}
-            loadm.w r1, {sys.gfx_plot.yy}
-            loadm.b r2, {sys.gfx_plot.color}
+        %ir {{
+            loadm.w r65500,sys.gfx_plot.xx
+            loadm.w r65501,sys.gfx_plot.yy
+            loadm.b r65502,sys.gfx_plot.color
             syscall 10
         }}
     }
 
     sub gfx_getpixel(uword xx, uword yy) -> ubyte {
-        %asm {{
-            loadm.w r0, {sys.gfx_getpixel.xx}
-            loadm.w r1, {sys.gfx_getpixel.yy}
+        %ir {{
+            loadm.w r65500,sys.gfx_getpixel.xx
+            loadm.w r65501,sys.gfx_getpixel.yy
             syscall 30
             return
         }}
@@ -110,105 +117,105 @@ cx16 {
 
     ; the sixteen virtual 16-bit registers that the CX16 has defined in the zeropage
     ; they are simulated on the VirtualMachine as well but their location in memory is different
-    &uword r0  = $0002
-    &uword r1  = $0004
-    &uword r2  = $0006
-    &uword r3  = $0008
-    &uword r4  = $000a
-    &uword r5  = $000c
-    &uword r6  = $000e
-    &uword r7  = $0010
-    &uword r8  = $0012
-    &uword r9  = $0014
-    &uword r10 = $0016
-    &uword r11 = $0018
-    &uword r12 = $001a
-    &uword r13 = $001c
-    &uword r14 = $001e
-    &uword r15 = $0020
+    &uword r0  = $ff02
+    &uword r1  = $ff04
+    &uword r2  = $ff06
+    &uword r3  = $ff08
+    &uword r4  = $ff0a
+    &uword r5  = $ff0c
+    &uword r6  = $ff0e
+    &uword r7  = $ff10
+    &uword r8  = $ff12
+    &uword r9  = $ff14
+    &uword r10 = $ff16
+    &uword r11 = $ff18
+    &uword r12 = $ff1a
+    &uword r13 = $ff1c
+    &uword r14 = $ff1e
+    &uword r15 = $ff20
 
-    &word r0s  = $0002
-    &word r1s  = $0004
-    &word r2s  = $0006
-    &word r3s  = $0008
-    &word r4s  = $000a
-    &word r5s  = $000c
-    &word r6s  = $000e
-    &word r7s  = $0010
-    &word r8s  = $0012
-    &word r9s  = $0014
-    &word r10s = $0016
-    &word r11s = $0018
-    &word r12s = $001a
-    &word r13s = $001c
-    &word r14s = $001e
-    &word r15s = $0020
+    &word r0s  = $ff02
+    &word r1s  = $ff04
+    &word r2s  = $ff06
+    &word r3s  = $ff08
+    &word r4s  = $ff0a
+    &word r5s  = $ff0c
+    &word r6s  = $ff0e
+    &word r7s  = $ff10
+    &word r8s  = $ff12
+    &word r9s  = $ff14
+    &word r10s = $ff16
+    &word r11s = $ff18
+    &word r12s = $ff1a
+    &word r13s = $ff1c
+    &word r14s = $ff1e
+    &word r15s = $ff20
 
-    &ubyte r0L  = $0002
-    &ubyte r1L  = $0004
-    &ubyte r2L  = $0006
-    &ubyte r3L  = $0008
-    &ubyte r4L  = $000a
-    &ubyte r5L  = $000c
-    &ubyte r6L  = $000e
-    &ubyte r7L  = $0010
-    &ubyte r8L  = $0012
-    &ubyte r9L  = $0014
-    &ubyte r10L = $0016
-    &ubyte r11L = $0018
-    &ubyte r12L = $001a
-    &ubyte r13L = $001c
-    &ubyte r14L = $001e
-    &ubyte r15L = $0020
+    &ubyte r0L  = $ff02
+    &ubyte r1L  = $ff04
+    &ubyte r2L  = $ff06
+    &ubyte r3L  = $ff08
+    &ubyte r4L  = $ff0a
+    &ubyte r5L  = $ff0c
+    &ubyte r6L  = $ff0e
+    &ubyte r7L  = $ff10
+    &ubyte r8L  = $ff12
+    &ubyte r9L  = $ff14
+    &ubyte r10L = $ff16
+    &ubyte r11L = $ff18
+    &ubyte r12L = $ff1a
+    &ubyte r13L = $ff1c
+    &ubyte r14L = $ff1e
+    &ubyte r15L = $ff20
 
-    &ubyte r0H  = $0003
-    &ubyte r1H  = $0005
-    &ubyte r2H  = $0007
-    &ubyte r3H  = $0009
-    &ubyte r4H  = $000b
-    &ubyte r5H  = $000d
-    &ubyte r6H  = $000f
-    &ubyte r7H  = $0011
-    &ubyte r8H  = $0013
-    &ubyte r9H  = $0015
-    &ubyte r10H = $0017
-    &ubyte r11H = $0019
-    &ubyte r12H = $001b
-    &ubyte r13H = $001d
-    &ubyte r14H = $001f
-    &ubyte r15H = $0021
+    &ubyte r0H  = $ff03
+    &ubyte r1H  = $ff05
+    &ubyte r2H  = $ff07
+    &ubyte r3H  = $ff09
+    &ubyte r4H  = $ff0b
+    &ubyte r5H  = $ff0d
+    &ubyte r6H  = $ff0f
+    &ubyte r7H  = $ff11
+    &ubyte r8H  = $ff13
+    &ubyte r9H  = $ff15
+    &ubyte r10H = $ff17
+    &ubyte r11H = $ff19
+    &ubyte r12H = $ff1b
+    &ubyte r13H = $ff1d
+    &ubyte r14H = $ff1f
+    &ubyte r15H = $ff21
 
-    &byte r0sL  = $0002
-    &byte r1sL  = $0004
-    &byte r2sL  = $0006
-    &byte r3sL  = $0008
-    &byte r4sL  = $000a
-    &byte r5sL  = $000c
-    &byte r6sL  = $000e
-    &byte r7sL  = $0010
-    &byte r8sL  = $0012
-    &byte r9sL  = $0014
-    &byte r10sL = $0016
-    &byte r11sL = $0018
-    &byte r12sL = $001a
-    &byte r13sL = $001c
-    &byte r14sL = $001e
-    &byte r15sL = $0020
+    &byte r0sL  = $ff02
+    &byte r1sL  = $ff04
+    &byte r2sL  = $ff06
+    &byte r3sL  = $ff08
+    &byte r4sL  = $ff0a
+    &byte r5sL  = $ff0c
+    &byte r6sL  = $ff0e
+    &byte r7sL  = $ff10
+    &byte r8sL  = $ff12
+    &byte r9sL  = $ff14
+    &byte r10sL = $ff16
+    &byte r11sL = $ff18
+    &byte r12sL = $ff1a
+    &byte r13sL = $ff1c
+    &byte r14sL = $ff1e
+    &byte r15sL = $ff20
 
-    &byte r0sH  = $0003
-    &byte r1sH  = $0005
-    &byte r2sH  = $0007
-    &byte r3sH  = $0009
-    &byte r4sH  = $000b
-    &byte r5sH  = $000d
-    &byte r6sH  = $000f
-    &byte r7sH  = $0011
-    &byte r8sH  = $0013
-    &byte r9sH  = $0015
-    &byte r10sH = $0017
-    &byte r11sH = $0019
-    &byte r12sH = $001b
-    &byte r13sH = $001d
-    &byte r14sH = $001f
-    &byte r15sH = $0021
+    &byte r0sH  = $ff03
+    &byte r1sH  = $ff05
+    &byte r2sH  = $ff07
+    &byte r3sH  = $ff09
+    &byte r4sH  = $ff0b
+    &byte r5sH  = $ff0d
+    &byte r6sH  = $ff0f
+    &byte r7sH  = $ff11
+    &byte r8sH  = $ff13
+    &byte r9sH  = $ff15
+    &byte r10sH = $ff17
+    &byte r11sH = $ff19
+    &byte r12sH = $ff1b
+    &byte r13sH = $ff1d
+    &byte r14sH = $ff1f
+    &byte r15sH = $ff21
 }

compiler/res/prog8lib/virtual/textio.p8

@@ -6,8 +6,8 @@ txt {
 
 sub  clear_screen() {
     str @shared sequence = "\x1b[2J\x1B[H"
-    %asm {{
-        load.w r0, {txt.clear_screen.sequence}
+    %ir {{
+        load.w r65500,txt.clear_screen.sequence
         syscall 3
     }}
 }
@@ -29,15 +29,15 @@ sub uppercase() {
 }
 
 sub chrout(ubyte char) {
-    %asm {{
-        loadm.b r0, {txt.chrout.char}
+    %ir {{
+        loadm.b r65500,txt.chrout.char
         syscall 2
     }}
 }
 
 sub  print (str text) {
-    %asm {{
-        loadm.w r0, {txt.print.text}
+    %ir {{
+        loadm.w r65500,txt.print.text
         syscall 3
     }}
 }
@@ -113,11 +113,26 @@ sub  print_w  (word value) {
 sub  input_chars  (uword buffer) -> ubyte  {
     ; ---- Input a string (max. 80 chars) from the keyboard. Returns length of input. (string is terminated with a 0 byte as well)
     ;      It assumes the keyboard is selected as I/O channel!
-    %asm {{
-        loadm.w r0,{txt.input_chars.buffer}
+    %ir {{
+        loadm.w r65500,txt.input_chars.buffer
         syscall 6
         return
     }}
 }
 
+sub  plot  (ubyte col, ubyte row) {
+    ; use ANSI escape sequence to position the cursor
+    txt.chrout(27)
+    txt.chrout('[')
+    txt.print_ub(row)
+    txt.chrout(';')
+    txt.print_ub(col)
+    txt.chrout('H')
+}
+
+sub setchr (ubyte col, ubyte row, ubyte char) {
+    plot(col, row)
+    txt.chrout(char)
+}
+
 }

compiler/res/version.txt

@@ -1 +1 @@
-8.4
+8.7

compiler/src/prog8/CompilerMain.kt

@@ -10,8 +10,12 @@ import prog8.compiler.CompilationResult
 import prog8.compiler.CompilerArguments
 import prog8.compiler.compileProgram
 import java.io.File
-import java.nio.file.*
+import java.nio.file.FileSystems
+import java.nio.file.Path
+import java.nio.file.StandardWatchEventKinds
+import java.nio.file.WatchKey
 import java.time.LocalDateTime
+import kotlin.io.path.Path
 import kotlin.system.exitProcess
 
 
@@ -31,23 +35,24 @@ fun pathFrom(stringPath: String, vararg rest: String): Path  = FileSystems.getDe
 
 private fun compileMain(args: Array<String>): Boolean {
     val cli = ArgParser("prog8compiler", prefixStyle = ArgParser.OptionPrefixStyle.JVM)
+    val asmListfile by cli.option(ArgType.Boolean, fullName = "asmlist", description = "make the assembler produce a listing file as well")
+    val symbolDefs by cli.option(ArgType.String, fullName = "D", description = "define assembly symbol(s) with -D SYMBOL=VALUE").multiple()
+    val evalStackAddrString by cli.option(ArgType.String, fullName = "esa", description = "override the eval-stack base address (must be page aligned)")
     val startEmulator1 by cli.option(ArgType.Boolean, fullName = "emu", description = "auto-start emulator after successful compilation")
     val startEmulator2 by cli.option(ArgType.Boolean, fullName = "emu2", description = "auto-start alternative emulator after successful compilation")
-    val outputDir by cli.option(ArgType.String, fullName = "out", description = "directory for output files instead of current directory").default(".")
+    val experimentalCodegen by cli.option(ArgType.Boolean, fullName = "expericodegen", description = "use experimental/alternative codegen")
+    val keepIR by cli.option(ArgType.Boolean, fullName = "keepIR", description = "keep the IR code file (for targets that use it)")
     val dontWriteAssembly by cli.option(ArgType.Boolean, fullName = "noasm", description="don't create assembly code")
     val dontOptimize by cli.option(ArgType.Boolean, fullName = "noopt", description = "don't perform any optimizations")
     val dontReinitGlobals by cli.option(ArgType.Boolean, fullName = "noreinit", description = "don't create code to reinitialize globals on multiple runs of the program (experimental!)")
+    val outputDir by cli.option(ArgType.String, fullName = "out", description = "directory for output files instead of current directory").default(".")
     val optimizeFloatExpressions by cli.option(ArgType.Boolean, fullName = "optfloatx", description = "optimize float expressions (warning: can increase program size)")
-    val watchMode by cli.option(ArgType.Boolean, fullName = "watch", description = "continuous compilation mode (watch for file changes)")
-    val slowCodegenWarnings by cli.option(ArgType.Boolean, fullName = "slowwarn", description="show debug warnings about slow/problematic assembly code generation")
     val quietAssembler by cli.option(ArgType.Boolean, fullName = "quietasm", description = "don't print assembler output results")
-    val asmListfile by cli.option(ArgType.Boolean, fullName = "asmlist", description = "make the assembler produce a listing file as well")
-    val experimentalCodegen by cli.option(ArgType.Boolean, fullName = "expericodegen", description = "use experimental/alternative codegen")
-    val compilationTarget by cli.option(ArgType.String, fullName = "target", description = "target output of the compiler (one of '${C64Target.NAME}', '${C128Target.NAME}', '${Cx16Target.NAME}', '${AtariTarget.NAME}', '${VMTarget.NAME}')").default(C64Target.NAME)
+    val slowCodegenWarnings by cli.option(ArgType.Boolean, fullName = "slowwarn", description="show debug warnings about slow/problematic assembly code generation")
     val sourceDirs by cli.option(ArgType.String, fullName="srcdirs", description = "list of extra paths, separated with ${File.pathSeparator}, to search in for imported modules").multiple().delimiter(File.pathSeparator)
-    val startVm by cli.option(ArgType.Boolean, fullName = "vm", description = "load and run a p8-virt listing in the VM instead")
-    val symbolDefs by cli.option(ArgType.String, fullName = "D", description = "define assembly symbol(s) with -D SYMBOL=VALUE").multiple()
-    val evalStackAddrString by cli.option(ArgType.String, fullName = "esa", description = "override the eval-stack base address (must be page aligned)")
+    val compilationTarget by cli.option(ArgType.String, fullName = "target", description = "target output of the compiler (one of '${C64Target.NAME}', '${C128Target.NAME}', '${Cx16Target.NAME}', '${AtariTarget.NAME}', '${VMTarget.NAME}')").default(C64Target.NAME)
+    val startVm by cli.option(ArgType.Boolean, fullName = "vm", description = "load and run a .p8ir IR source file in the VM")
+    val watchMode by cli.option(ArgType.Boolean, fullName = "watch", description = "continuous compilation mode (watch for file changes)")
     val moduleFiles by cli.argument(ArgType.String, fullName = "modules", description = "main module file(s) to compile").multiple(999)
 
     try {
@@ -122,6 +127,7 @@ private fun compileMain(args: Array<String>): Boolean {
                     quietAssembler == true,
                     asmListfile == true,
                     experimentalCodegen == true,
+                    keepIR == true,
                     compilationTarget,
                     evalStackAddr,
                     processedSymbols,
@@ -140,7 +146,7 @@ private fun compileMain(args: Array<String>): Boolean {
             for (importedFile in allImportedFiles) {
                 print("  ")
                 println(importedFile)
-                val watchDir = importedFile.parent ?: Path.of("")
+                val watchDir = importedFile.parent ?: Path("")
                 watchDir.register(watchservice, StandardWatchEventKinds.ENTRY_MODIFY)
             }
             println("[${LocalDateTime.now().withNano(0)}]  Waiting for file changes.")
@@ -186,6 +192,7 @@ private fun compileMain(args: Array<String>): Boolean {
                     quietAssembler == true,
                     asmListfile == true,
                     experimentalCodegen == true,
+                    keepIR == true,
                     compilationTarget,
                     evalStackAddr,
                     processedSymbols,
@@ -241,13 +248,9 @@ private fun processSymbolDefs(symbolDefs: List<String>): Map<String, String>? {
     return result
 }
 
-fun runVm(listingFilename: String): Boolean {
-    val name =
-        if(listingFilename.endsWith(".p8virt"))
-            listingFilename.substring(0, listingFilename.length-7)
-        else
-            listingFilename
+fun runVm(irFilename: String): Boolean {
+    val irFile = Path(irFilename)
     val vmdef = VirtualMachineDefinition()
-    vmdef.launchEmulator(0, Paths.get(name))
+    vmdef.launchEmulator(0, irFile)
     return true
 }

compiler/src/prog8/compiler/Compiler.kt

@@ -14,6 +14,7 @@ import prog8.ast.walk.IAstVisitor
 import prog8.code.SymbolTable
 import prog8.code.core.*
 import prog8.code.target.*
+import prog8.codegen.vm.VmCodeGen
 import prog8.compiler.astprocessing.*
 import prog8.optimizer.*
 import prog8.parser.ParseError
@@ -37,6 +38,7 @@ class CompilerArguments(val filepath: Path,
                         val quietAssembler: Boolean,
                         val asmListfile: Boolean,
                         val experimentalCodegen: Boolean,
+                        val keepIR: Boolean,
                         val compilationTarget: String,
                         val evalStackBaseAddress: UInt?,
                         val symbolDefs: Map<String, String>,
@@ -79,6 +81,7 @@ fun compileProgram(args: CompilerArguments): CompilationResult? {
                 asmQuiet = args.quietAssembler
                 asmListfile = args.asmListfile
                 experimentalCodegen = args.experimentalCodegen
+                keepIR = args.keepIR
                 evalStackBaseAddress = args.evalStackBaseAddress
                 outputDir = args.outputDir.normalize()
                 symbolDefs = args.symbolDefs
@@ -339,7 +342,7 @@ private fun processAst(program: Program, errors: IErrorReporter, compilerOptions
     errors.report()
     program.reorderStatements(errors, compilerOptions)
     errors.report()
-    program.changeNotExpression(errors)
+    program.changeNotExpressionAndIfComparisonExpr(errors, compilerOptions.compTarget)
     errors.report()
     program.addTypecasts(errors, compilerOptions)
     errors.report()
@@ -358,7 +361,7 @@ private fun optimizeAst(program: Program, compilerOptions: CompilationOptions, e
     remover.applyModifications()
     while (true) {
         // keep optimizing expressions and statements until no more steps remain
-        val optsDone1 = program.simplifyExpressions(compTarget)
+        val optsDone1 = program.simplifyExpressions(errors, compTarget)
         val optsDone2 = program.splitBinaryExpressions(compilerOptions)
         val optsDone3 = program.optimizeStatements(errors, functions, compTarget)
         val optsDone4 = program.inlineSubroutines()
@@ -391,7 +394,7 @@ private fun createAssemblyAndAssemble(program: Program,
     compilerOptions.compTarget.machine.initializeZeropage(compilerOptions)
     program.processAstBeforeAsmGeneration(compilerOptions, errors)
     errors.report()
-    val symbolTable = SymbolTableMaker().makeFrom(program)
+    val symbolTable = SymbolTableMaker().makeFrom(program, compilerOptions)
 
     // TODO make removing all VarDecls work, but this needs inferType to be able to get its information from somewhere else as the VarDecl nodes in the Ast,
     //      or don't use inferType at all anymore and "bake the type information" into the Ast somehow.
@@ -445,18 +448,15 @@ internal fun asmGeneratorFor(program: Program,
                              options: CompilationOptions): IAssemblyGenerator
 {
     if(options.experimentalCodegen) {
-        if (options.compTarget.machine.cpu in arrayOf(CpuType.CPU6502, CpuType.CPU65c02)) {
-            // TODO for now, use the new Intermediary Ast for this experimental codegen:
-            val intermediateAst = IntermediateAstMaker(program).transform()
-            return prog8.codegen.experimental.AsmGen(intermediateAst, symbolTable, options, errors)
-        }
+        val intermediateAst = IntermediateAstMaker(program).transform()
+        return prog8.codegen.experimental.CodeGen(intermediateAst, symbolTable, options, errors)
     } else {
         if (options.compTarget.machine.cpu in arrayOf(CpuType.CPU6502, CpuType.CPU65c02))
-            // TODO rewrite 6502 codegen on new Intermediary Ast
+            // TODO rewrite 6502 codegen on new Intermediary Ast or on new Intermediate Representation
             return prog8.codegen.cpu6502.AsmGen(program, symbolTable, options, errors)
         if (options.compTarget.name == VMTarget.NAME) {
             val intermediateAst = IntermediateAstMaker(program).transform()
-            return prog8.codegen.virtual.CodeGen(intermediateAst, symbolTable, options, errors)
+            return VmCodeGen(intermediateAst, symbolTable, options, errors)
         }
     }
 

compiler/src/prog8/compiler/astprocessing/AstChecker.kt

@@ -7,7 +7,6 @@ import prog8.ast.expressions.*
 import prog8.ast.statements.*
 import prog8.ast.walk.IAstVisitor
 import prog8.code.core.*
-import prog8.code.target.VMTarget
 import prog8.compiler.BuiltinFunctions
 import prog8.compiler.InplaceModifyingBuiltinFunctions
 import prog8.compiler.builtinFunctionReturnType
@@ -252,19 +251,8 @@ internal class AstChecker(private val program: Program,
             }
 
             override fun visit(inlineAssembly: InlineAssembly) {
-                val assembly = inlineAssembly.assembly
-                if(compilerOptions.compTarget.name!=VMTarget.NAME) {
-                    if (" rti" in assembly || "\trti" in assembly || " rts" in assembly || "\trts" in assembly ||
-                        " jmp" in assembly || "\tjmp" in assembly || " bra" in assembly || "\tbra" in assembly
-                    )
-                        count++
-                } else {
-                    if(" return" in assembly || "\treturn" in assembly
-                        || " jump" in assembly || "\tjump" in assembly
-                        || " jumpi" in assembly || "\tjumpi" in assembly
-                    )
-                        count++
-                }
+                if(inlineAssembly.hasReturnOrRts(compilerOptions.compTarget))
+                    count++
             }
         }
 
@@ -322,12 +310,12 @@ internal class AstChecker(private val program: Program,
                 }
                 else if(param.second.registerOrPair in arrayOf(RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY)) {
                     if (param.first.type != DataType.UWORD && param.first.type != DataType.WORD
-                            && param.first.type != DataType.STR && param.first.type !in ArrayDatatypes && param.first.type != DataType.FLOAT)
+                            && param.first.type != DataType.STR && param.first.type !in ArrayDatatypes)
                         err("parameter '${param.first.name}' should be (u)word (an address) or str")
                 }
                 else if(param.second.statusflag!=null) {
-                    if (param.first.type != DataType.UBYTE)
-                        err("parameter '${param.first.name}' should be ubyte")
+                    if (param.first.type != DataType.UBYTE && param.first.type != DataType.BOOL)
+                        err("parameter '${param.first.name}' should be bool or ubyte")
                 }
             }
             subroutine.returntypes.zip(subroutine.asmReturnvaluesRegisters).forEachIndexed { index, pair ->
@@ -337,12 +325,12 @@ internal class AstChecker(private val program: Program,
                 }
                 else if(pair.second.registerOrPair in setOf(RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY)) {
                     if (pair.first != DataType.UWORD && pair.first != DataType.WORD
-                            && pair.first != DataType.STR && pair.first !in ArrayDatatypes && pair.first != DataType.FLOAT)
+                            && pair.first != DataType.STR && pair.first !in ArrayDatatypes)
                         err("return type #${index + 1} should be (u)word/address")
                 }
                 else if(pair.second.statusflag!=null) {
-                    if (pair.first != DataType.UBYTE)
-                        err("return type #${index + 1} should be ubyte")
+                    if (pair.first != DataType.UBYTE && pair.first != DataType.BOOL)
+                        err("return type #${index + 1} should be bool or ubyte")
                 }
             }
 
@@ -620,7 +608,7 @@ internal class AstChecker(private val program: Program,
                         err("memory address must be valid integer 0..\$ffff")
                     }
                 } else {
-                    err("value of memory mapped variable can only be a fixed number, perhaps you meant to use an address pointer type instead?")
+                    err("value of memory mapped variable can only be a constant, maybe use an address pointer type instead?")
                 }
             }
         }
@@ -1008,7 +996,7 @@ internal class AstChecker(private val program: Program,
                 // It's not (yet) possible to handle these multiple return values because assignments
                 // are only to a single unique target at the same time.
                 //   EXCEPTION:
-                // if the asmsub returns multiple values and one of them is via a status register bit,
+                // if the asmsub returns multiple values and one of them is via a status register bit (such as carry),
                 // it *is* possible to handle them by just actually assigning the register value and
                 // dealing with the status bit as just being that, the status bit after the call.
                 val (returnRegisters, _) = stmt.asmReturnvaluesRegisters.partition { rr -> rr.registerOrPair != null }

compiler/src/prog8/compiler/astprocessing/AstExtensions.kt

@@ -12,7 +12,6 @@ import prog8.ast.statements.VarDeclOrigin
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
 import prog8.code.core.*
-import prog8.code.target.VMTarget
 
 
 internal fun Program.checkValid(errors: IErrorReporter, compilerOptions: CompilationOptions) {
@@ -50,8 +49,8 @@ internal fun Program.reorderStatements(errors: IErrorReporter, options: Compilat
     }
 }
 
-internal fun Program.changeNotExpression(errors: IErrorReporter) {
-    val changer = NotExpressionChanger(this, errors)
+internal fun Program.changeNotExpressionAndIfComparisonExpr(errors: IErrorReporter, target: ICompilationTarget) {
+    val changer = NotExpressionAndIfComparisonExprChanger(this, errors, target)
     changer.visit(this)
     while(errors.noErrors() && changer.applyModifications()>0) {
         changer.visit(this)
@@ -170,15 +169,8 @@ internal fun IdentifierReference.isSubroutineParameter(program: Program): Boolea
 }
 
 internal fun Subroutine.hasRtsInAsm(compTarget: ICompilationTarget): Boolean {
-    val instructions =
-        if(compTarget.name == VMTarget.NAME)
-            listOf(" return", "\treturn", " jump", "\tjump", " jumpi", "\tjumpi")
-        else
-            listOf(" rti", "\trti", " rts", "\trts", " jmp", "\tjmp", " bra", "\tbra")
     return statements
         .asSequence()
         .filterIsInstance<InlineAssembly>()
-        .any {
-            instructions.any { instr->instr in it.assembly }
-        }
+        .any { it.hasReturnOrRts(compTarget) }
 }

compiler/src/prog8/compiler/astprocessing/AstIdentifiersChecker.kt

@@ -150,6 +150,13 @@ internal class AstIdentifiersChecker(private val errors: IErrorReporter,
     override fun visit(functionCallStatement: FunctionCallStatement) =  visitFunctionCall(functionCallStatement)
 
     private fun visitFunctionCall(call: IFunctionCall) {
+        if(call.target.nameInSource==listOf("rnd") || call.target.nameInSource==listOf("rndw")) {
+            val target = call.target.targetStatement(program)
+            if(target==null) {
+                errors.err("rnd() and rndw() builtin functions have been moved into the math module", call.position)
+                return
+            }
+        }
         when (val target = call.target.targetStatement(program)) {
             is Subroutine -> {
                 val expectedNumberOfArgs: Int = target.parameters.size

compiler/src/prog8/compiler/astprocessing/AstOnetimeTransforms.kt

@@ -18,9 +18,8 @@ internal class AstOnetimeTransforms(private val program: Program, private val op
 
     override fun after(arrayIndexedExpression: ArrayIndexedExpression, parent: Node): Iterable<IAstModification> {
         if(parent !is VarDecl) {
-            // TODO move this / remove this, and make the codegen better instead.
-            // If the expression is pointervar[idx] where pointervar is uword and not a real array,
-            // replace it by a @(pointervar+idx) expression.
+            if(options.compTarget.name == VMTarget.NAME)
+                return noModifications  // vm codegen deals correctly with all cases
             // Don't replace the initializer value in a vardecl - this will be moved to a separate
             // assignment statement soon in after(VarDecl)
             return replacePointerVarIndexWithMemreadOrMemwrite(arrayIndexedExpression, parent)
@@ -29,15 +28,16 @@ internal class AstOnetimeTransforms(private val program: Program, private val op
     }
 
     private fun replacePointerVarIndexWithMemreadOrMemwrite(arrayIndexedExpression: ArrayIndexedExpression, parent: Node): Iterable<IAstModification> {
-        if(options.compTarget.name==VMTarget.NAME)
-            return noModifications  // vm codegen deals correctly with all cases
-
+        // note: The CodeDesugarer already does something similar, but that is meant ONLY to take
+        //       into account the case where the index value is a word type.
+        //       The replacement here is to fix missing cases in the 6502 codegen.
+        // TODO make the 6502 codegen better so this work around can be removed
         val arrayVar = arrayIndexedExpression.arrayvar.targetVarDecl(program)
         if(arrayVar!=null && arrayVar.datatype == DataType.UWORD) {
             if(parent is AssignTarget) {
                 val assignment = parent.parent as? Assignment
                 if(assignment?.value is NumericLiteral || assignment?.value is IdentifierReference) {
-                    // ONLY for a constant assignment, or direct variable assignment, the codegen contains correct optimized code.
+                    // the codegen contains correct optimized code ONLY for a constant assignment, or direct variable assignment.
                     return noModifications
                 }
                 // Other cases aren't covered correctly by the 6502 codegen, and there are a LOT of cases.

compiler/src/prog8/compiler/astprocessing/AstPreprocessor.kt

@@ -10,6 +10,7 @@ import prog8.ast.walk.IAstModification
 import prog8.code.core.*
 import prog8.code.target.C64Target
 import prog8.code.target.Cx16Target
+import prog8.code.target.VMTarget
 
 
 class AstPreprocessor(val program: Program,
@@ -24,7 +25,7 @@ class AstPreprocessor(val program: Program,
                 relocateCx16VirtualRegisters(program, 0x0004u)
             }
         }
-        else if(options.compTarget.name!=Cx16Target.NAME) {
+        else if(options.compTarget.name !in setOf(Cx16Target.NAME, VMTarget.NAME)) {
             relocateCx16VirtualRegisters(program, options.compTarget.machine.ESTACK_HI)
         }
         return noModifications

compiler/src/prog8/compiler/astprocessing/BeforeAsmAstChanger.kt

@@ -1,8 +1,11 @@
 package prog8.compiler.astprocessing
 
-import prog8.ast.*
+import prog8.ast.IStatementContainer
+import prog8.ast.Node
+import prog8.ast.Program
 import prog8.ast.base.FatalAstException
 import prog8.ast.expressions.*
+import prog8.ast.getTempVar
 import prog8.ast.statements.*
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
@@ -132,15 +135,20 @@ internal class BeforeAsmAstChanger(val program: Program,
         val mods = mutableListOf<IAstModification>()
 
         // add the implicit return statement at the end (if it's not there yet), but only if it's not a kernal routine.
-        // and if an assembly block doesn't contain a rts/rti, and some other situations.
+        // and if an assembly block doesn't contain a rts/rti.
         if (!subroutine.isAsmSubroutine) {
-            if(subroutine.statements.isEmpty() ||
-                (!subroutine.hasRtsInAsm(options.compTarget)
-                        && subroutine.statements.lastOrNull { it !is VarDecl } !is Return
-                        && subroutine.statements.last() !is Subroutine
-                        && subroutine.statements.last() !is Return)) {
+            if(subroutine.isEmpty()) {
                 val returnStmt = Return(null, subroutine.position)
                 mods += IAstModification.InsertLast(returnStmt, subroutine)
+            } else {
+                val last = subroutine.statements.last()
+                if((last !is InlineAssembly || !last.hasReturnOrRts(options.compTarget)) && last !is Return) {
+                    val lastStatement = subroutine.statements.reversed().firstOrNull { it !is Subroutine }
+                    if(lastStatement !is Return) {
+                        val returnStmt = Return(null, subroutine.position)
+                        mods += IAstModification.InsertLast(returnStmt, subroutine)
+                    }
+                }
             }
         }
 
@@ -164,8 +172,18 @@ internal class BeforeAsmAstChanger(val program: Program,
             if (subroutine.isAsmSubroutine && subroutine.asmAddress==null && !subroutine.hasRtsInAsm(options.compTarget)) {
                 // make sure the NOT INLINED asm subroutine actually has a rts at the end
                 // (non-asm routines get a Return statement as needed, above)
-                val instruction = if(options.compTarget.name==VMTarget.NAME) "  return\n" else "  rts\n"
-                mods += IAstModification.InsertLast(InlineAssembly(instruction, Position.DUMMY), subroutine)
+                mods += if(options.compTarget.name==VMTarget.NAME)
+                    IAstModification.InsertLast(InlineAssembly("  return\n", true, Position.DUMMY), subroutine)
+                else
+                    IAstModification.InsertLast(InlineAssembly("  rts\n", false, Position.DUMMY), subroutine)
+            }
+        }
+
+        if(subroutine.isNotEmpty() && subroutine.statements.last() is Return) {
+            // maybe the last return can be removed because there is a fall-through prevention above it
+            val lastStatementBefore = subroutine.statements.reversed().drop(1).firstOrNull { it !is Subroutine }
+            if(lastStatementBefore is Return) {
+                mods += IAstModification.Remove(subroutine.statements.last(), subroutine)
             }
         }
 

compiler/src/prog8/compiler/astprocessing/BeforeAsmTypecastCleaner.kt

@@ -129,4 +129,18 @@ internal class BeforeAsmTypecastCleaner(val program: Program,
         }
         return noModifications
     }
+
+    override fun after(expr: BinaryExpression, parent: Node): Iterable<IAstModification> {
+        if(expr.operator=="<<" || expr.operator==">>") {
+            val shifts = expr.right.constValue(program)
+            if(shifts!=null) {
+                val dt = expr.left.inferType(program)
+                if(dt.istype(DataType.UBYTE) && shifts.number>=8.0)
+                    errors.warn("shift always results in 0", expr.position)
+                if(dt.istype(DataType.UWORD) && shifts.number>=16.0)
+                    errors.warn("shift always results in 0", expr.position)
+            }
+        }
+        return noModifications
+    }
 }

compiler/src/prog8/compiler/astprocessing/CodeDesugarer.kt

@@ -10,8 +10,7 @@ import prog8.code.core.IErrorReporter
 import prog8.code.core.Position
 
 
-internal class CodeDesugarer(val program: Program,
-                             private val errors: IErrorReporter) : AstWalker() {
+internal class CodeDesugarer(val program: Program, private val errors: IErrorReporter) : AstWalker() {
 
     // Some more code shuffling to simplify the Ast that the codegenerator has to process.
     // Several changes have already been done by the StatementReorderer !
@@ -23,6 +22,7 @@ internal class CodeDesugarer(val program: Program,
     // - replace while and do-until loops by just jumps.
     // - replace peek() and poke() by direct memory accesses.
     // - repeat-forever loops replaced by label+jump.
+    // - pointer[word] replaced by @(pointer+word)
 
 
     override fun before(breakStmt: Break, parent: Node): Iterable<IAstModification> {
@@ -135,4 +135,32 @@ _after:
         }
         return noModifications
     }
+
+    override fun after(arrayIndexedExpression: ArrayIndexedExpression, parent: Node): Iterable<IAstModification> {
+        // replace pointervar[word] by @(pointervar+word) to avoid the
+        // "array indexing is limited to byte size 0..255" error for pointervariables.
+        val indexExpr = arrayIndexedExpression.indexer.indexExpr
+        val indexerDt = indexExpr.inferType(program)
+        if(indexerDt.isWords) {
+            val arrayVar = arrayIndexedExpression.arrayvar.targetVarDecl(program)!!
+            if(arrayVar.datatype==DataType.UWORD) {
+                val add: Expression =
+                    if(indexExpr.constValue(program)?.number==0.0)
+                        arrayIndexedExpression.arrayvar.copy()
+                    else
+                        BinaryExpression(arrayIndexedExpression.arrayvar.copy(), "+", indexExpr, arrayIndexedExpression.position)
+                return if(parent is AssignTarget) {
+                    // assignment to array
+                    val memwrite = DirectMemoryWrite(add, arrayIndexedExpression.position)
+                    val newtarget = AssignTarget(null, null, memwrite, arrayIndexedExpression.position)
+                    listOf(IAstModification.ReplaceNode(parent, newtarget, parent.parent))
+                } else {
+                    // read from array
+                    val memread = DirectMemoryRead(add, arrayIndexedExpression.position)
+                    listOf(IAstModification.ReplaceNode(arrayIndexedExpression, memread, parent))
+                }
+            }
+        }
+        return noModifications
+    }
 }

compiler/src/prog8/compiler/astprocessing/IntermediateAstMaker.kt

@@ -1,4 +1,4 @@
-package prog8.compiler
+package prog8.compiler.astprocessing
 
 import com.github.michaelbull.result.Ok
 import com.github.michaelbull.result.Result
@@ -12,11 +12,16 @@ import prog8.code.ast.*
 import prog8.code.core.DataType
 import prog8.code.core.Position
 import prog8.code.core.SourceCode
+import prog8.compiler.BuiltinFunctions
+import prog8.compiler.builtinFunctionReturnType
 import java.io.File
 import kotlin.io.path.Path
 import kotlin.io.path.isRegularFile
 
 
+/**
+ *  Convert 'old' compiler-AST into the 'new' simplified AST with baked types.
+ */
 class IntermediateAstMaker(val program: Program) {
     fun transform(): PtProgram {
         val ptProgram = PtProgram(
@@ -175,16 +180,24 @@ class IntermediateAstMaker(val program: Program) {
         return when(directive.directive) {
             "%breakpoint" -> PtBreakpoint(directive.position)
             "%asmbinary" -> {
+                val filename = directive.args[0].str!!
                 val offset: UInt? = if(directive.args.size>=2) directive.args[1].int!! else null
                 val length: UInt? = if(directive.args.size>=3) directive.args[2].int!! else null
-                val sourcePath = Path(directive.definingModule.source.origin)
-                val includedPath = sourcePath.resolveSibling(directive.args[0].str!!)
-                PtIncludeBinary(includedPath, offset, length, directive.position)
+                val abspath = if(File(filename).isFile) {
+                    Path(filename).toAbsolutePath()
+                } else {
+                    val sourcePath = Path(directive.definingModule.source.origin)
+                    sourcePath.resolveSibling(filename).toAbsolutePath()
+                }
+                if(abspath.toFile().isFile)
+                    PtIncludeBinary(abspath, offset, length, directive.position)
+                else
+                    throw FatalAstException("included file doesn't exist")
             }
             "%asminclude" -> {
                 val result = loadAsmIncludeFile(directive.args[0].str!!, directive.definingModule.source)
                 val assembly = result.getOrElse { throw it }
-                PtInlineAssembly(assembly, directive.position)
+                PtInlineAssembly(assembly.trimEnd().trimStart('\r', '\n'), false, directive.position)
             }
             else -> {
                 // other directives don't output any code (but could end up in option flags somewhere else)
@@ -217,7 +230,8 @@ class IntermediateAstMaker(val program: Program) {
         val type = srcCall.inferType(program).getOrElse {
             throw FatalAstException("unknown dt $srcCall")
         }
-        val call = PtFunctionCall(target, type==DataType.UNDEFINED, type, srcCall.position)
+        val isVoid = type==DataType.UNDEFINED
+        val call = PtFunctionCall(target, isVoid, type, srcCall.position)
         for (arg in srcCall.args)
             call.add(transformExpression(arg))
         return call
@@ -237,8 +251,10 @@ class IntermediateAstMaker(val program: Program) {
         return ifelse
     }
 
-    private fun transform(srcNode: InlineAssembly): PtInlineAssembly =
-        PtInlineAssembly(srcNode.assembly, srcNode.position)
+    private fun transform(srcNode: InlineAssembly): PtInlineAssembly {
+        val assembly = srcNode.assembly.trimEnd().trimStart('\r', '\n')
+        return PtInlineAssembly(assembly, srcNode.isIR, srcNode.position)
+    }
 
     private fun transform(srcJump: Jump): PtJump {
         val identifier = if(srcJump.identifier!=null) transform(srcJump.identifier!!) else null
@@ -289,14 +305,29 @@ class IntermediateAstMaker(val program: Program) {
             srcSub.asmReturnvaluesRegisters,
             srcSub.inline,
             srcSub.position)
+        sub.parameters.forEach { it.first.parent=sub }
+
         if(srcSub.asmAddress==null) {
-            var combinedAsm = ""
-            for (asm in srcSub.statements)
-                combinedAsm += (asm as InlineAssembly).assembly + "\n"
-            if(combinedAsm.isNotEmpty())
-                sub.add(PtInlineAssembly(combinedAsm, srcSub.statements[0].position))
-            else
-                sub.add(PtInlineAssembly("", srcSub.position))
+            var combinedTrueAsm = ""
+            var combinedIrAsm = ""
+            for (asm in srcSub.statements) {
+                asm as InlineAssembly
+                if(asm.isIR)
+                    combinedIrAsm += asm.assembly + "\n"
+                else
+                    combinedTrueAsm += asm.assembly + "\n"
+            }
+
+            if(combinedTrueAsm.isNotEmpty()) {
+                combinedTrueAsm = combinedTrueAsm.trimEnd().trimStart('\r', '\n')
+                sub.add(PtInlineAssembly(combinedTrueAsm, false, srcSub.statements[0].position))
+            }
+            if(combinedIrAsm.isNotEmpty()) {
+                combinedIrAsm = combinedIrAsm.trimEnd().trimStart('\r', '\n')
+                sub.add(PtInlineAssembly(combinedIrAsm, true, srcSub.statements[0].position))
+            }
+            if(combinedIrAsm.isEmpty() && combinedTrueAsm.isEmpty())
+                sub.add(PtInlineAssembly("", true, srcSub.position))
         }
 
         return sub
@@ -304,11 +335,15 @@ class IntermediateAstMaker(val program: Program) {
 
     private fun transformSub(srcSub: Subroutine): PtSub {
         val (vardecls, statements) = srcSub.statements.partition { it is VarDecl }
+        var returntype = srcSub.returntypes.singleOrNull()
+        if(returntype==DataType.STR)
+            returntype=DataType.UWORD   // if a sub returns 'str', replace with uword.  Intermediate AST and I.R. don't contain 'str' datatype anymore.
         val sub = PtSub(srcSub.name,
             srcSub.parameters.map { PtSubroutineParameter(it.name, it.type, it.position) },
-            srcSub.returntypes.singleOrNull(),
+            returntype,
             srcSub.inline,
             srcSub.position)
+        sub.parameters.forEach { it.parent=sub }
 
         if(vardecls.isNotEmpty()) sub.add(makeScopeVarsDecls(vardecls, sub.position))
         for (statement in statements)

compiler/src/prog8/compiler/astprocessing/NotExpressionAndIfComparisonExprChanger.kt

@@ -0,0 +1,189 @@
+package prog8.compiler.astprocessing
+
+import prog8.ast.*
+import prog8.ast.base.FatalAstException
+import prog8.ast.expressions.*
+import prog8.ast.statements.AssignTarget
+import prog8.ast.statements.Assignment
+import prog8.ast.statements.AssignmentOrigin
+import prog8.ast.statements.IfElse
+import prog8.ast.walk.AstWalker
+import prog8.ast.walk.IAstModification
+import prog8.code.core.*
+import prog8.code.target.VMTarget
+
+internal class NotExpressionAndIfComparisonExprChanger(val program: Program, val errors: IErrorReporter, val compTarget: ICompilationTarget) : AstWalker() {
+
+    override fun before(expr: BinaryExpression, parent: Node): Iterable<IAstModification> {
+        if(expr.operator=="==" || expr.operator=="!=") {
+            val left = expr.left as? BinaryExpression
+            if (left != null) {
+                val rightValue = expr.right.constValue(program)
+                if (rightValue?.number == 0.0 && rightValue.type in IntegerDatatypes) {
+                    if (left.operator == "==" && expr.operator == "==") {
+                        // (x==something)==0  -->  x!=something
+                        left.operator = "!="
+                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
+                    } else if (left.operator == "!=" && expr.operator == "==") {
+                        // (x!=something)==0  -->  x==something
+                        left.operator = "=="
+                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
+                    } else if (left.operator == "==" && expr.operator == "!=") {
+                        // (x==something)!=0 --> x==something
+                        left.operator = "=="
+                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
+                    } else if (left.operator == "!=" && expr.operator == "!=") {
+                        // (x!=something)!=0 --> x!=something
+                        left.operator = "!="
+                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
+                    }
+                }
+            }
+        }
+        return noModifications
+    }
+
+    override fun after(expr: PrefixExpression, parent: Node): Iterable<IAstModification> {
+        if(expr.operator == "not") {
+            // not(not(x)) -> x
+            if((expr.expression as? PrefixExpression)?.operator=="not")
+                return listOf(IAstModification.ReplaceNode(expr, expr.expression, parent))
+            // not(~x) -> x!=0
+            if((expr.expression as? PrefixExpression)?.operator=="~") {
+                val x = (expr.expression as PrefixExpression).expression
+                val dt = x.inferType(program).getOrElse { throw FatalAstException("invalid dt") }
+                val notZero = BinaryExpression(x, "!=", NumericLiteral(dt, 0.0, expr.position), expr.position)
+                return listOf(IAstModification.ReplaceNode(expr, notZero, parent))
+            }
+            val subBinExpr = expr.expression as? BinaryExpression
+            if(subBinExpr?.operator=="==") {
+                if(subBinExpr.right.constValue(program)?.number==0.0) {
+                    // not(x==0) -> x!=0
+                    subBinExpr.operator = "!="
+                    return listOf(IAstModification.ReplaceNode(expr, subBinExpr, parent))
+                }
+            } else if(subBinExpr?.operator=="!=") {
+                if(subBinExpr.right.constValue(program)?.number==0.0) {
+                    // not(x!=0) -> x==0
+                    subBinExpr.operator = "=="
+                    return listOf(IAstModification.ReplaceNode(expr, subBinExpr, parent))
+                }
+            }
+
+            // all other not(x)  -->  x==0
+            // this means that "not" will never occur anywhere again in the ast after this
+            val replacement = BinaryExpression(expr.expression, "==", NumericLiteral(DataType.UBYTE,0.0, expr.position), expr.position)
+            return listOf(IAstModification.ReplaceNodeSafe(expr, replacement, parent))
+        }
+        return noModifications
+    }
+
+
+    override fun before(ifElse: IfElse, parent: Node): Iterable<IAstModification> {
+        if(compTarget.name == VMTarget.NAME)  // don't apply this optimization for Vm target
+            return noModifications
+
+        val binExpr = ifElse.condition as? BinaryExpression
+        if(binExpr==null || binExpr.operator !in ComparisonOperators)
+            return noModifications
+
+        // Simplify the conditional expression, introduce simple assignments if required.
+        // This is REQUIRED for correct code generation on 6502 because evaluating certain expressions
+        // clobber the handful of temporary variables in the zeropage and leaving everything in one
+        // expression then results in invalid values being compared. VM Codegen doesn't suffer from this.
+        // NOTE: sometimes this increases code size because additional stores/loads are generated for the
+        //       intermediate variables. We assume these are optimized away from the resulting assembly code later.
+        val simplify = simplifyConditionalExpression(binExpr)
+        val modifications = mutableListOf<IAstModification>()
+        if(simplify.rightVarAssignment!=null) {
+            modifications += IAstModification.ReplaceNode(binExpr.right, simplify.rightOperandReplacement!!, binExpr)
+            modifications += IAstModification.InsertBefore(
+                ifElse,
+                simplify.rightVarAssignment,
+                parent as IStatementContainer
+            )
+        }
+        if(simplify.leftVarAssignment!=null) {
+            modifications += IAstModification.ReplaceNode(binExpr.left, simplify.leftOperandReplacement!!, binExpr)
+            modifications += IAstModification.InsertBefore(
+                ifElse,
+                simplify.leftVarAssignment,
+                parent as IStatementContainer
+            )
+        }
+
+        return modifications
+    }
+
+    private class CondExprSimplificationResult(
+        val leftVarAssignment: Assignment?,
+        val leftOperandReplacement: Expression?,
+        val rightVarAssignment: Assignment?,
+        val rightOperandReplacement: Expression?
+    )
+
+    private fun simplifyConditionalExpression(expr: BinaryExpression): CondExprSimplificationResult {
+
+        // TODO: somehow figure out if the expr will result in stack-evaluation STILL after being split off,
+        //       in that case: do *not* split it off but just keep it as it is (otherwise code size increases)
+        // NOTE: do NOT move this to an earler ast transform phase (such as StatementReorderer or StatementOptimizer) - it WILL result in larger code.
+
+        if(compTarget.name == VMTarget.NAME)  // don't apply this optimization for Vm target
+            return CondExprSimplificationResult(null, null, null, null)
+
+        var leftAssignment: Assignment? = null
+        var leftOperandReplacement: Expression? = null
+        var rightAssignment: Assignment? = null
+        var rightOperandReplacement: Expression? = null
+
+        val separateLeftExpr = !expr.left.isSimple
+                && expr.left !is IFunctionCall
+                && expr.left !is ContainmentCheck
+        val separateRightExpr = !expr.right.isSimple
+                && expr.right !is IFunctionCall
+                && expr.right !is ContainmentCheck
+        val leftDt = expr.left.inferType(program)
+        val rightDt = expr.right.inferType(program)
+
+        if(!leftDt.isInteger || !rightDt.isInteger) {
+            // we can't reasonably simplify non-integer expressions
+            return CondExprSimplificationResult(null, null, null, null)
+        }
+
+        if(separateLeftExpr) {
+            val name = getTempRegisterName(leftDt)
+            leftOperandReplacement = IdentifierReference(name, expr.position)
+            leftAssignment = Assignment(
+                AssignTarget(IdentifierReference(name, expr.position), null, null, expr.position),
+                expr.left.copy(),
+                AssignmentOrigin.BEFOREASMGEN, expr.position
+            )
+        }
+        if(separateRightExpr) {
+            val (tempVarName, _) = program.getTempVar(rightDt.getOrElse { throw FatalAstException("invalid dt") }, true)
+            rightOperandReplacement = IdentifierReference(tempVarName, expr.position)
+            rightAssignment = Assignment(
+                AssignTarget(IdentifierReference(tempVarName, expr.position), null, null, expr.position),
+                expr.right.copy(),
+                AssignmentOrigin.BEFOREASMGEN, expr.position
+            )
+        }
+        return CondExprSimplificationResult(
+            leftAssignment, leftOperandReplacement,
+            rightAssignment, rightOperandReplacement
+        )
+    }
+    
+    fun getTempRegisterName(dt: InferredTypes.InferredType): List<String> {
+        return when {
+            // TODO assume (hope) cx16.r9 isn't used for anything else during the use of this temporary variable...
+            dt istype DataType.UBYTE -> listOf("cx16", "r9L")
+            dt istype DataType.BOOL -> listOf("cx16", "r9L")
+            dt istype DataType.BYTE -> listOf("cx16", "r9sL")
+            dt istype DataType.UWORD -> listOf("cx16", "r9")
+            dt istype DataType.WORD -> listOf("cx16", "r9s")
+            dt.isPassByReference -> listOf("cx16", "r9")
+            else -> throw FatalAstException("invalid dt $dt")
+        }
+    }
+}

compiler/src/prog8/compiler/astprocessing/NotExpressionChanger.kt

@@ -1,80 +0,0 @@
-package prog8.compiler.astprocessing
-
-import prog8.ast.Node
-import prog8.ast.Program
-import prog8.ast.base.FatalAstException
-import prog8.ast.expressions.BinaryExpression
-import prog8.ast.expressions.NumericLiteral
-import prog8.ast.expressions.PrefixExpression
-import prog8.ast.walk.AstWalker
-import prog8.ast.walk.IAstModification
-import prog8.code.core.DataType
-import prog8.code.core.IErrorReporter
-import prog8.code.core.IntegerDatatypes
-
-internal class NotExpressionChanger(val program: Program, val errors: IErrorReporter) : AstWalker() {
-
-    override fun before(expr: BinaryExpression, parent: Node): Iterable<IAstModification> {
-        if(expr.operator=="==" || expr.operator=="!=") {
-            val left = expr.left as? BinaryExpression
-            if (left != null) {
-                val rightValue = expr.right.constValue(program)
-                if (rightValue?.number == 0.0 && rightValue.type in IntegerDatatypes) {
-                    if (left.operator == "==" && expr.operator == "==") {
-                        // (x==something)==0  -->  x!=something
-                        left.operator = "!="
-                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
-                    } else if (left.operator == "!=" && expr.operator == "==") {
-                        // (x!=something)==0  -->  x==something
-                        left.operator = "=="
-                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
-                    } else if (left.operator == "==" && expr.operator == "!=") {
-                        // (x==something)!=0 --> x==something
-                        left.operator = "=="
-                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
-                    } else if (left.operator == "!=" && expr.operator == "!=") {
-                        // (x!=something)!=0 --> x!=something
-                        left.operator = "!="
-                        return listOf(IAstModification.ReplaceNode(expr, left, parent))
-                    }
-                }
-            }
-        }
-        return noModifications
-    }
-
-    override fun after(expr: PrefixExpression, parent: Node): Iterable<IAstModification> {
-        if(expr.operator == "not") {
-            // not(not(x)) -> x
-            if((expr.expression as? PrefixExpression)?.operator=="not")
-                return listOf(IAstModification.ReplaceNode(expr, expr.expression, parent))
-            // not(~x) -> x!=0
-            if((expr.expression as? PrefixExpression)?.operator=="~") {
-                val x = (expr.expression as PrefixExpression).expression
-                val dt = x.inferType(program).getOrElse { throw FatalAstException("invalid dt") }
-                val notZero = BinaryExpression(x, "!=", NumericLiteral(dt, 0.0, expr.position), expr.position)
-                return listOf(IAstModification.ReplaceNode(expr, notZero, parent))
-            }
-            val subBinExpr = expr.expression as? BinaryExpression
-            if(subBinExpr?.operator=="==") {
-                if(subBinExpr.right.constValue(program)?.number==0.0) {
-                    // not(x==0) -> x!=0
-                    subBinExpr.operator = "!="
-                    return listOf(IAstModification.ReplaceNode(expr, subBinExpr, parent))
-                }
-            } else if(subBinExpr?.operator=="!=") {
-                if(subBinExpr.right.constValue(program)?.number==0.0) {
-                    // not(x!=0) -> x==0
-                    subBinExpr.operator = "=="
-                    return listOf(IAstModification.ReplaceNode(expr, subBinExpr, parent))
-                }
-            }
-
-            // all other not(x)  -->  x==0
-            // this means that "not" will never occur anywhere again in the ast after this
-            val replacement = BinaryExpression(expr.expression, "==", NumericLiteral(DataType.UBYTE,0.0, expr.position), expr.position)
-            return listOf(IAstModification.ReplaceNodeSafe(expr, replacement, parent))
-        }
-        return noModifications
-    }
-}

compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt

@@ -1,13 +1,11 @@
 package prog8.compiler.astprocessing
 
 import prog8.ast.*
-import prog8.ast.base.FatalAstException
 import prog8.ast.expressions.*
 import prog8.ast.statements.*
 import prog8.ast.walk.AstWalker
 import prog8.ast.walk.IAstModification
 import prog8.code.core.*
-import prog8.compiler.BuiltinFunctions
 
 internal class StatementReorderer(val program: Program,
                                   val errors: IErrorReporter,
@@ -195,54 +193,6 @@ internal class StatementReorderer(val program: Program,
             && maySwapOperandOrder(expr))
             return listOf(IAstModification.SwapOperands(expr))
 
-        // when using a simple bit shift and assigning it to a variable of a different type,
-        // try to make the bit shifting 'wide enough' to fall into the variable's type.
-        // with this, for instance, uword x = 1 << 10  will result in 1024 rather than 0 (the ubyte result).
-        if(expr.operator=="<<" || expr.operator==">>") {
-            val leftDt = expr.left.inferType(program)
-            when (parent) {
-                is Assignment -> {
-                    val targetDt = parent.target.inferType(program)
-                    if(leftDt != targetDt) {
-                        val cast = TypecastExpression(expr.left, targetDt.getOr(DataType.UNDEFINED), true, parent.position)
-                        return listOf(IAstModification.ReplaceNode(expr.left, cast, expr))
-                    }
-                }
-                is VarDecl -> {
-                    if(leftDt isnot parent.datatype) {
-                        val cast = TypecastExpression(expr.left, parent.datatype, true, parent.position)
-                        return listOf(IAstModification.ReplaceNode(expr.left, cast, expr))
-                    }
-                }
-                is IFunctionCall -> {
-                    val argnum = parent.args.indexOf(expr)
-                    when (val callee = parent.target.targetStatement(program)) {
-                        is Subroutine -> {
-                            val paramType = callee.parameters[argnum].type
-                            if(leftDt isAssignableTo paramType) {
-                                val (replaced, cast) = expr.left.typecastTo(paramType, leftDt.getOr(DataType.UNDEFINED), true)
-                                if(replaced)
-                                    return listOf(IAstModification.ReplaceNode(expr.left, cast, expr))
-                            }
-                        }
-                        is BuiltinFunctionPlaceholder -> {
-                            val func = BuiltinFunctions.getValue(callee.name)
-                            val paramTypes = func.parameters[argnum].possibleDatatypes
-                            for(type in paramTypes) {
-                                if(leftDt isAssignableTo type) {
-                                    val (replaced, cast) = expr.left.typecastTo(type, leftDt.getOr(DataType.UNDEFINED), true)
-                                    if(replaced)
-                                        return listOf(IAstModification.ReplaceNode(expr.left, cast, expr))
-                                }
-                            }
-                        }
-                        else -> throw FatalAstException("weird callee")
-                    }
-                }
-                else -> return noModifications
-            }
-        }
-
         return noModifications
     }
 

compiler/src/prog8/compiler/astprocessing/SymbolTableMaker.kt

@@ -7,6 +7,8 @@ import prog8.ast.statements.*
 import prog8.ast.walk.IAstVisitor
 import prog8.code.*
 import prog8.code.core.ArrayDatatypes
+import prog8.code.core.CompilationOptions
+import prog8.code.core.DataType
 import prog8.code.core.Position
 import java.util.*
 
@@ -14,10 +16,12 @@ internal class SymbolTableMaker: IAstVisitor {
 
     private val st = SymbolTable()
     private val scopestack = Stack<StNode>()
+    private var dontReinitGlobals = false
 
-    fun makeFrom(program: Program): SymbolTable {
+    fun makeFrom(program: Program, options: CompilationOptions): SymbolTable {
         scopestack.clear()
         st.children.clear()
+        dontReinitGlobals = options.dontReinitGlobals
         this.visit(program)
         program.builtinFunctions.names.forEach {
             val node = StNode(it, StNodeType.BUILTINFUNC, Position.DUMMY)
@@ -36,12 +40,13 @@ internal class SymbolTableMaker: IAstVisitor {
     }
 
     override fun visit(subroutine: Subroutine) {
-        val parameters = subroutine.parameters.map { StSubroutineParameter(it.name, it.type) }
         if(subroutine.asmAddress!=null) {
-            val node = StRomSub(subroutine.name, subroutine.asmAddress!!, parameters, subroutine.returntypes, subroutine.position)
+            val parameters = subroutine.parameters.zip(subroutine.asmParameterRegisters).map { StRomSubParameter(it.second, it.first.type) }
+            val node = StRomSub(subroutine.name, subroutine.asmAddress!!, parameters, subroutine.asmReturnvaluesRegisters, subroutine.position)
             scopestack.peek().add(node)
             // st.origAstLinks[subroutine] = node
         } else {
+            val parameters = subroutine.parameters.map { StSubroutineParameter(it.name, it.type) }
             val returnType = if(subroutine.returntypes.isEmpty()) null else subroutine.returntypes.first()
             val node = StSub(subroutine.name, parameters, returnType, subroutine.position)
             scopestack.peek().add(node)
@@ -56,7 +61,7 @@ internal class SymbolTableMaker: IAstVisitor {
         val node =
             when(decl.type) {
                 VarDeclType.VAR -> {
-                    val initialNumeric = (decl.value as? NumericLiteral)?.number
+                    var initialNumeric = (decl.value as? NumericLiteral)?.number
                     val initialStringLit = decl.value as? StringLiteral
                     val initialString = if(initialStringLit==null) null else Pair(initialStringLit.value, initialStringLit.encoding)
                     val initialArrayLit = decl.value as? ArrayLiteral
@@ -70,7 +75,15 @@ internal class SymbolTableMaker: IAstVisitor {
                             initialStringLit.value.length+1  // include the terminating 0-byte
                         else
                             null
-                    StStaticVariable(decl.name, decl.datatype, initialNumeric, initialString, initialArray, numElements, decl.zeropage, decl.position)
+                    val bss = if(decl.datatype==DataType.STR)
+                        false
+                    else if(decl.isArray)
+                        initialArray.isNullOrEmpty()
+                    else {
+                        if(dontReinitGlobals) initialNumeric = initialNumeric ?: 0.0
+                        initialNumeric == null
+                    }
+                    StStaticVariable(decl.name, decl.datatype, bss, initialNumeric, initialString, initialArray, numElements, decl.zeropage, decl.position)
                 }
                 VarDeclType.CONST -> StConstant(decl.name, decl.datatype, (decl.value as NumericLiteral).number, decl.position)
                 VarDeclType.MEMORY -> {
@@ -103,4 +116,16 @@ internal class SymbolTableMaker: IAstVisitor {
         scopestack.peek().add(node)
         // st.origAstLinks[label] = node
     }
+
+    override fun visit(bfc: BuiltinFunctionCall) {
+        if(bfc.name=="memory") {
+            // memory slab allocations are a builtin functioncall in the program, but end up named as well in the symboltable
+            val name = (bfc.args[0] as StringLiteral).value
+            require(name.all { it.isLetterOrDigit() || it=='_' }) {"memory name should be a valid symbol name"}
+            val size = (bfc.args[1] as NumericLiteral).number.toUInt()
+            val align = (bfc.args[2] as NumericLiteral).number.toUInt()
+            st.add(StMemorySlab("prog8_memoryslab_$name", size, align, bfc.position))
+        }
+        super.visit(bfc)
+    }
 }

compiler/src/prog8/compiler/astprocessing/VerifyFunctionArgTypes.kt

@@ -2,11 +2,10 @@ package prog8.compiler.astprocessing
 
 import prog8.ast.IFunctionCall
 import prog8.ast.Program
-import prog8.ast.expressions.Expression
-import prog8.ast.expressions.FunctionCallExpression
-import prog8.ast.expressions.TypecastExpression
+import prog8.ast.expressions.*
 import prog8.ast.statements.*
 import prog8.ast.walk.IAstVisitor
+import prog8.code.core.ByteDatatypes
 import prog8.code.core.DataType
 import prog8.code.core.IErrorReporter
 import prog8.code.core.Position
@@ -14,16 +13,43 @@ import prog8.compiler.BuiltinFunctions
 
 internal class VerifyFunctionArgTypes(val program: Program, val errors: IErrorReporter) : IAstVisitor {
 
+    override fun visit(program: Program) {
+        super.visit(program)
+
+        // detect invalid (double) memory slabs
+        for(slab in memorySlabs) {
+            val other = memorySlabs.first { it.name==slab.name }
+            if(other!==slab && (other.size!=slab.size || other.align!=slab.align)) {
+                errors.err("memory block '${slab.name}' already exists with a different size and/or alignment at ${other.position}", slab.position)
+            }
+        }
+    }
+
+    private class Slab(val name: String, val size: Int, val align: Int, val position: Position)
+    private val memorySlabs = mutableListOf<Slab>()
+
     override fun visit(functionCallExpr: FunctionCallExpression) {
         val error = checkTypes(functionCallExpr as IFunctionCall, program)
         if(error!=null)
             errors.err(error.first, error.second)
+        else {
+            if(functionCallExpr.target.nameInSource==listOf("memory")) {
+                val name = (functionCallExpr.args[0] as StringLiteral).value
+                val size = (functionCallExpr.args[1] as NumericLiteral).number.toInt()
+                val align = (functionCallExpr.args[2] as NumericLiteral).number.toInt()
+                memorySlabs.add(Slab(name, size, align, functionCallExpr.position))
+            }
+        }
+
+        super.visit(functionCallExpr)
     }
 
     override fun visit(functionCallStatement: FunctionCallStatement) {
         val error = checkTypes(functionCallStatement as IFunctionCall, program)
         if(error!=null)
             errors.err(error.first, error.second)
+
+        super.visit(functionCallStatement)
     }
 
     companion object {
@@ -57,7 +83,9 @@ internal class VerifyFunctionArgTypes(val program: Program, val errors: IErrorRe
                 if(mismatch>=0) {
                     val actual = argtypes[mismatch]
                     val expected = consideredParamTypes[mismatch]
-                    return if(expected==DataType.BOOL && actual==DataType.UBYTE && call.args[mismatch].constValue(program)?.number in setOf(0.0, 1.0))
+                    return if(actual==DataType.BOOL && expected in ByteDatatypes)
+                        null  // a bool is just 1 or 0.
+                    else if(expected==DataType.BOOL && actual==DataType.UBYTE && call.args[mismatch].constValue(program)?.number in setOf(0.0, 1.0))
                         null  // specifying a 1 or 0 as a BOOL is okay
                     else
                         Pair("argument ${mismatch + 1} type mismatch, was: $actual expected: $expected", call.args[mismatch].position)
@@ -66,6 +94,10 @@ internal class VerifyFunctionArgTypes(val program: Program, val errors: IErrorRe
                     if(target.asmReturnvaluesRegisters.size>1) {
                         // multiple return values will NOT work inside an expression.
                         // they MIGHT work in a regular assignment or just a function call statement.
+                        //   EXCEPTION:
+                        // if the asmsub returns multiple values and one of them is via a status register bit (such as carry),
+                        // it *is* possible to handle them by just actually assigning the register value and
+                        // dealing with the status bit as just being that, the status bit after the call.
                         val parent = if(call is Statement) call.parent else if(call is Expression) call.parent else null
                         if (call !is FunctionCallStatement) {
                             val checkParent =
@@ -74,7 +106,10 @@ internal class VerifyFunctionArgTypes(val program: Program, val errors: IErrorRe
                                 else
                                     parent
                             if (checkParent !is Assignment && checkParent !is VarDecl) {
-                                return Pair("can't use subroutine call that returns multiple return values here", call.position)
+                                val (returnRegisters, _) = target.asmReturnvaluesRegisters.partition { rr -> rr.registerOrPair != null }
+                                if (returnRegisters.size>1) {
+                                    return Pair("can't use subroutine call that returns multiple return values here", call.position)
+                                }
                             }
                         }
                     }

compiler/test/TestBuiltinFunctions.kt

@@ -44,18 +44,18 @@ class TestBuiltinFunctions: FunSpec({
         conv.returns.reg shouldBe RegisterOrPair.A
     }
 
-    test("not-pure func with fixed type") {
-        val func = BuiltinFunctions.getValue("rnd")
-        func.name shouldBe "rnd"
-        func.parameters.size shouldBe 0
+    test("not-pure func with varying result value type") {
+        val func = BuiltinFunctions.getValue("cmp")
+        func.name shouldBe "cmp"
+        func.parameters.size shouldBe 2
         func.pure shouldBe false
-        func.returnType shouldBe DataType.UBYTE
+        func.returnType shouldBe null
 
-        val conv = func.callConvention(emptyList())
-        conv.params.size shouldBe 0
-        conv.returns.dt shouldBe DataType.UBYTE
+        val conv = func.callConvention(listOf(DataType.UWORD, DataType.UWORD))
+        conv.params.size shouldBe 2
+        conv.returns.dt shouldBe null
         conv.returns.floatFac1 shouldBe false
-        conv.returns.reg shouldBe RegisterOrPair.A
+        conv.returns.reg shouldBe null
     }
 
     test("func without return type") {

compiler/test/TestCompilerOnExamples.kt

@@ -3,18 +3,15 @@ package prog8tests
 import io.kotest.core.spec.style.FunSpec
 import io.kotest.matchers.shouldNotBe
 import prog8.code.core.ICompilationTarget
-import prog8.code.target.C64Target
-import prog8.code.target.Cx16Target
+import prog8.code.target.*
 import prog8.compiler.CompilationResult
 import prog8.compiler.CompilerArguments
 import prog8.compiler.compileProgram
-import prog8tests.helpers.assumeDirectory
-import prog8tests.helpers.cartesianProduct
-import prog8tests.helpers.outputDir
-import prog8tests.helpers.workingDir
+import prog8tests.helpers.*
 import java.nio.file.Path
 import kotlin.io.path.absolute
 import kotlin.io.path.exists
+import kotlin.io.path.readText
 
 
 /**
@@ -36,6 +33,7 @@ private fun compileTheThing(filepath: Path, optimize: Boolean, target: ICompilat
         quietAssembler = true,
         asmListfile = false,
         experimentalCodegen = false,
+        keepIR = false,
         compilationTarget = target.name,
         evalStackBaseAddress = null,
         symbolDefs = emptyMap(),
@@ -46,8 +44,11 @@ private fun compileTheThing(filepath: Path, optimize: Boolean, target: ICompilat
 
 private fun prepareTestFiles(source: String, optimize: Boolean, target: ICompilationTarget): Pair<String, Path> {
     val searchIn = mutableListOf(examplesDir)
-    if (target is Cx16Target) {
-        searchIn.add(0, assumeDirectory(examplesDir, "cx16"))
+    when (target) {
+        is Cx16Target -> searchIn.add(0, assumeDirectory(examplesDir, "cx16"))
+        is VMTarget -> searchIn.add(0, assumeDirectory(examplesDir, "vm"))
+        is C128Target -> searchIn.add(0, assumeDirectory(examplesDir, "c128"))
+        is AtariTarget -> searchIn.add(0, assumeDirectory(examplesDir, "atari"))
     }
     val filepath = searchIn.asSequence()
         .map { it.resolve("$source.p8") }
@@ -70,6 +71,7 @@ class TestCompilerOnExamplesC64: FunSpec({
             "cube3d-sprites",
             "plasma",
             "sprites",
+            "starfield",
             "turtle-gfx",
             "wizzine",
         ),
@@ -166,3 +168,24 @@ class TestCompilerOnExamplesBothC64andCx16: FunSpec({
         }
     }
 })
+
+class TestCompilerOnExamplesVirtual: FunSpec({
+
+    val onlyVirtual = listOf(
+            "bouncegfx",
+            "bsieve",
+            "pixelshader",
+            "sincos",
+            "textelite"
+        )
+
+    onlyVirtual.forEach {
+        val target = VMTarget()
+        val (displayName, filepath) = prepareTestFiles(it, false, target)
+        test(displayName) {
+            val src = filepath.readText()
+            compileText(target, false, src, writeAssembly = true, keepIR=false) shouldNotBe null
+            compileText(target, false, src, writeAssembly = true, keepIR=true) shouldNotBe null
+        }
+    }
+})

compiler/test/TestCompilerOptionLibdirs.kt

@@ -50,6 +50,7 @@ class TestCompilerOptionSourcedirs: FunSpec({
             quietAssembler = true,
             asmListfile = false,
             experimentalCodegen = false,
+            keepIR = false,
             compilationTarget = Cx16Target.NAME,
             evalStackBaseAddress = null,
             symbolDefs = emptyMap(),
@@ -86,7 +87,7 @@ class TestCompilerOptionSourcedirs: FunSpec({
 
     test("testFilePathOutsideWorkingDirRelativeTo1stInSourcedirs") {
         val filepath = assumeReadableFile(fixturesDir, "ast_simple_main.p8")
-        val sourcedirs = listOf("${fixturesDir}")
+        val sourcedirs = listOf("$fixturesDir")
         compileFile(filepath.fileName, sourcedirs) shouldNotBe null
     }
 

compiler/test/TestLaunchEmu.kt

@@ -0,0 +1,40 @@
+package prog8tests
+
+import io.kotest.core.spec.style.FunSpec
+import prog8.code.target.VMTarget
+import kotlin.io.path.deleteExisting
+import kotlin.io.path.writeText
+
+
+class TestLaunchEmu: FunSpec({
+
+    test("test launch virtualmachine via target") {
+        val target = VMTarget()
+        val tmpfile = kotlin.io.path.createTempFile(suffix=".p8ir")
+        tmpfile.writeText("""<PROGRAM NAME=test>
+<OPTIONS>
+</OPTIONS>
+
+<ASMSYMBOLS>
+</ASMSYMBOLS>
+
+<VARIABLES>
+</VARIABLES>
+
+<MEMORYMAPPEDVARIABLES>
+</MEMORYMAPPEDVARIABLES>
+
+<MEMORYSLABS>
+</MEMORYSLABS>
+
+<INITGLOBALS>
+</INITGLOBALS>
+
+<BLOCK NAME=main ADDRESS=null ALIGN=NONE POS=[unittest: line 42 col 1-9]>
+</BLOCK>
+</PROGRAM>
+""")
+        target.machine.launchEmulator(0, tmpfile)
+        tmpfile.deleteExisting()
+    }
+})

compiler/test/TestSubroutines.kt

@@ -258,8 +258,8 @@ class TestSubroutines: FunSpec({
               sub start() {
                   label()
                   label(1)
-                  void rnd()
-                  void rnd(1)
+                  void cmp(22,44)
+                  void cmp(11)
               }
             }
         """

compiler/test/TestSymbolTable.kt

@@ -78,10 +78,10 @@ private fun makeSt(): SymbolTable {
     block1.add(sub12)
     block1.add(StConstant("c1", DataType.UWORD, 12345.0, Position.DUMMY))
     block1.add(StConstant("blockc", DataType.UWORD, 999.0, Position.DUMMY))
-    sub11.add(StStaticVariable("v1", DataType.BYTE, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
-    sub11.add(StStaticVariable("v2", DataType.BYTE, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
-    sub12.add(StStaticVariable("v1", DataType.BYTE, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
-    sub12.add(StStaticVariable("v2", DataType.BYTE, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
+    sub11.add(StStaticVariable("v1", DataType.BYTE, true, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
+    sub11.add(StStaticVariable("v2", DataType.BYTE, true, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
+    sub12.add(StStaticVariable("v1", DataType.BYTE, true, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
+    sub12.add(StStaticVariable("v2", DataType.BYTE, true, null, null, null, null, ZeropageWish.DONTCARE, Position.DUMMY))
 
     val block2 = StNode("block2", StNodeType.BLOCK, Position.DUMMY)
     val sub21 = StNode("sub1", StNodeType.SUBROUTINE, Position.DUMMY)

compiler/test/TestTypecasts.kt

@@ -14,7 +14,6 @@ import prog8.ast.statements.VarDecl
 import prog8.code.core.DataType
 import prog8.code.core.Position
 import prog8.code.target.C64Target
-import prog8.code.target.VMTarget
 import prog8tests.helpers.ErrorReporterForTests
 import prog8tests.helpers.compileText
 
@@ -31,7 +30,7 @@ class TestTypecasts: FunSpec({
                 }
             }"""
         val errors = ErrorReporterForTests()
-        val result = compileText(VMTarget(), false, text, writeAssembly = false, errors=errors)
+        val result = compileText(C64Target(), false, text, writeAssembly = false, errors=errors)
         result shouldBe null
         errors.errors.size shouldBe 1
         errors.errors[0] shouldContain "type mismatch, was: FLOAT expected one of: [UBYTE, BYTE, UWORD, WORD]"
@@ -627,9 +626,9 @@ main  {
                     ubyte @shared wordNr2 = (interlaced >= ${'$'}33) + (interlaced >= ${'$'}66) + (interlaced >= ${'$'}99) + (interlaced >= ${'$'}CC)
                 }
             }"""
-        val result = compileText(VMTarget(), false, text, writeAssembly = true)!!
+        val result = compileText(C64Target(), false, text, writeAssembly = true)!!
         val stmts = result.program.entrypoint.statements
-        stmts.size shouldBe 14
+        stmts.size shouldBeGreaterThan 10
     }
 
     test("word to byte casts") {
@@ -920,4 +919,19 @@ main  {
             }"""
         compileText(C64Target(), true, text, writeAssembly = true) shouldNotBe null
     }
+
+    test("memory reads byte into word variable") {
+        val text = """
+            main {
+                sub start() {
+                    uword @shared ww
+                    uword address = $1000
+                    ww = @(address+100)
+                    ww = @(address+1000)
+                    cx16.r0 = @(address+100)
+                    cx16.r0 = @(address+1000)
+                }
+            }"""
+        compileText(C64Target(), false, text, writeAssembly = true) shouldNotBe null
+    }
 })

compiler/test/arithmetic/builtins.p8

@@ -2,6 +2,7 @@
 %import floats
 %import string
 %import syslib
+%import math
 %import test_stack
 %zeropage basicsafe
 
@@ -281,17 +282,17 @@ main {
         txt.nl()
 
 
-        ub = rnd()
+        ub = math.rnd()
         txt.print_ub(ub)
         txt.nl()
-        ub = zero+rnd()*1+zero
+        ub = zero+math.rnd()*1+zero
         txt.print_ub(ub)
         txt.nl()
 
-        uw = rndw()
+        uw = math.rndw()
         txt.print_uw(uw)
         txt.nl()
-        uw = zero+rndw()*1+zero
+        uw = zero+math.rndw()*1+zero
         txt.print_uw(uw)
         txt.nl()